/linux-master/arch/powerpc/kernel/ |
H A D | exceptions-64s.S | 284 std r9,IAREA+EX_R9(r13) /* save r9 */ 286 mfspr r9,SPRN_PPR 318 std r9,IAREA+EX_PPR(r13) 328 mfcr r9 452 /* SEARCH_SOFT_MASK_TABLE clobbers r9,r10,r12 */ 454 stw r9,PACA_EXGEN+EX_CCR(r13) 458 lwz r9,PACA_EXGEN+EX_CCR(r13) 504 std r9,_CCR(r1) /* save CR in stackframe */ 528 kuap_save_amr_and_lock r9, r1 [all...] |
H A D | head_booke.h | 68 stw r9,GPR9(r11); \ 78 mfspr r9,SPRN_SRR1; \ 81 rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\ 95 stw r9,_MSR(r1) variable 108 andi. r12,r9,MSR_PR variable 136 mfspr r9, SPRN_SRR1 variable 196 stw r9,GPR9(r8); /* save various registers */\ 197 mfcr r9; /* save CR in r9 fo [all...] |
/linux-master/arch/nios2/kernel/ |
H A D | insnemu.S | 29 ldw r9, PT_R9(sp) 124 stw r9, 36(sp) 408 movi r9, 0 /* mul_product = 0 */ 419 * r9 = mul_product 438 slli r9, r9, 1 460 add r9, r9, r3 490 * r9 = mul_product 510 mov r9, r1 [all...] |
/linux-master/arch/arm/mach-imx/ |
H A D | suspend-imx6.S | 104 ldr r9, [r7], #0x4 105 str r9, [r11, r8] 165 add r9, r8, r7 182 str r9, [r11, #MX6Q_SRC_GPR1] 216 ldr r9, [r8], #0x8 217 str r6, [r11, r9] 224 ldr r9, [r8], #0x8 225 str r6, [r11, r9] 226 ldr r9, [r8], #0x8 227 str r6, [r11, r9] [all...] |
H A D | ssi-fiq.S | 11 * r9 = bit 0-15: rx offset, bit 16-31: rx buffer size 97 and r10, r10, r9 /* r10: current buffer offset */ 123 lsr r11, r9, #16 /* r11: buffer size */ 125 lslgt r9, r11, #16 126 addle r9, #8
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/linux-master/arch/powerpc/crypto/ |
H A D | aes-spe-keys.S | 33 xor r9,r9,r9; \ 122 LOAD_KEY(r9,r4,16) 128 stw r9,16(r3) 142 xor r9,r9,r8 143 xor r10,r10,r9 151 stw r9,16(r3) 172 LOAD_KEY(r9,r [all...] |
/linux-master/arch/powerpc/lib/ |
H A D | copy_32.S | 18 lwz r9,12(r4); \ 22 stw r9,12(r6); \ 31 lwz r9,12(r4); \ 39 stw r9,12(r6); \ 112 srwi r9,r8,LG_CACHELINE_BYTES 113 addic. r9,r9,-1 /* total number of complete cachelines */ 121 3: mtctr r9 191 70: lbz r9,4(r4) /* do some bytes */ 194 stb r9, [all...] |
H A D | checksum_32.S | 92 lwz r9,12(r4); \ 102 stw r9,12(r6); \ 103 adde r12,r12,r9; \ 143 70: lbz r9,4(r4) /* do some bytes */ 146 rlwimi r3,r9,0,24,31 147 71: stb r9,4(r6) 155 72: lwzu r9,4(r4) /* do some words */ 156 adde r12,r12,r9 157 73: stwu r9,4(r6) 286 lwz r9, [all...] |
H A D | string_32.S | 39 srwi r9, r8, LG_CACHELINE_BYTES 40 addic. r9, r9, -1 /* total number of complete cachelines */ 48 3: mtctr r9
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H A D | checksum_64.S | 68 ld r9,8(r3) 85 adde r0,r0,r9 100 ld r9,8(r3) 112 adde r0,r0,r9 168 sldi r9,r6,8 /* Pad the byte out to 16 bits */ 169 adde r0,r0,r9 229 li r9,4 230 sub r6,r9,r6 261 source; ld r9,8(r3) 278 adde r0,r0,r9 [all...] |
/linux-master/arch/powerpc/boot/ |
H A D | div64.S | 32 addc r9,r4,r10 # rounding up (so the estimate cannot 34 andc r9,r9,r10 35 addze r9,r9 37 rotlw r9,r9,r0 39 divwu r11,r11,r9 # then we divide the shifted quantities 41 mulhwu r9,r11,r4 # multiply the estimate by the divisor, 44 subfe. r5,r9,r [all...] |
/linux-master/arch/sh/kernel/cpu/sh2a/ |
H A D | entry.S | 72 mov r1,r9 ! r9 = interrupt vector 85 mov r1,r9 ! r9 = interrupt vector 98 mov.l r9,@-r8 107 cmp/hs r8,r9 110 cmp/hs r8,r9 114 mov r9,r4 115 shll2 r9 116 add r9,r [all...] |
/linux-master/arch/powerpc/platforms/pseries/ |
H A D | hvCall.S | 42 std r9,STK_PARAM(R9)(r1); \ 54 ld r9,STACK_FRAME_MIN_SIZE+STK_PARAM(R9)(r1); \ 164 mr r8,r9 165 mr r9,r10 191 mr r8,r9 192 mr r9,r10 231 mr r8,r9 232 mr r9,r10 264 mr r8,r9 265 mr r9,r1 [all...] |
/linux-master/arch/arc/lib/ |
H A D | memcpy-archs.S | 115 SHIFT_1 (r9, r8, 24) 116 or r9, r9, r5 120 st.ab r9, [r3, 4] 158 SHIFT_1 (r9, r8, 16) 159 or r9, r9, r5 163 st.ab r9, [r3, 4] 198 SHIFT_1 (r9, r8, 8) 199 or r9, r [all...] |
/linux-master/arch/arm/lib/ |
H A D | memmove.S | 52 stmfd sp!, {r5, r6, r8, r9} 71 4: ldmdb r1!, {r3, r4, r5, r6, r8, r9, ip, lr} 73 stmdb r0!, {r3, r4, r5, r6, r8, r9, ip, lr} 88 W(ldr) r9, [r1, #-4]! 99 W(str) r9, [r0, #-4]! 104 7: ldmfd sp!, {r5, r6, r8, r9} 154 13: ldmdb r1!, {r8, r9, r10, ip} 162 orr r10, r10, r9, lspull #\pull 163 mov r9, r9, lspus [all...] |
/linux-master/tools/testing/selftests/powerpc/mm/ |
H A D | large_vm_gpr_corruption.c | 6 // (r9-r13) due to a SLB fault while saving the PPR. 19 // each, and checks that r9-r13 aren't corrupted. 64 unsigned long r9, r10, r11, r12, r13; local 72 asm volatile("mr %0, %%r9 ;" // Read original GPR values 78 "mr %5, %%r9 ;" // Save possibly corrupted values 83 "mr %%r9, %0 ;" // Restore original values 89 "=&b"(r12_orig), "=&b"(r13_orig), "=&b"(r9), "=&b"(r10), 92 : "r9", "r10", "r11", "r12", "r13"); 94 CHECK_REG(r9);
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/linux-master/arch/arm/include/asm/ |
H A D | processor.h | 54 unsigned long r7, r8, r9; \ 59 r9 = regs->ARM_r9; \ 66 regs->ARM_r9 = r9; \
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/linux-master/arch/x86/include/uapi/asm/ |
H A D | ptrace.h | 58 unsigned long r9; member in struct:pt_regs
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/linux-master/arch/arc/include/uapi/asm/ |
H A D | ptrace.h | 40 unsigned long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0; member in struct:user_regs_struct::__anon131
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/linux-master/arch/alpha/include/uapi/asm/ |
H A D | ptrace.h | 14 * - r9-15: saved by the C compiler 59 unsigned long r9; member in struct:switch_stack
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/linux-master/arch/hexagon/include/uapi/asm/ |
H A D | user.h | 23 unsigned long r9; member in struct:user_regs_struct
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/linux-master/arch/arm/crypto/ |
H A D | blake2s-core.S | 114 // are in r0..r9. The stack pointer points to 8 bytes of scratch space for 134 _blake2s_quarterround r0, r4, r8, r10, r1, r5, r9, r11, \ 136 __strd r8, r9, sp, 0 141 __ldrd r8, r9, sp, 8 // load v[10] and v[11] 143 _blake2s_quarterround r2, r6, r8, r10, r3, r7, r9, r11, \ 154 _blake2s_quarterround r0, r5, r8, r11, r1, r6, r9, r10, \ 156 __strd r8, r9, sp, 8 162 __ldrd r8, r9, sp, 0 // load v[8] and v[9] 164 _blake2s_quarterround r2, r7, r8, r10, r3, r4, r9, r11, \ 200 ldmia r1!, {r2-r9} [all...] |
/linux-master/arch/sh/kernel/cpu/shmobile/ |
H A D | sleep.S | 59 mov.l r9, @-r15 63 mov.l rb_bit, r9 64 not r9, r9 74 mov #-1, r9 80 mov.l rb_bit, r9 81 not r9, r9 220 and r9, r8 342 mov #-1, r9 [all...] |
/linux-master/arch/arc/kernel/ |
H A D | entry-compact.S | 50 * - MMU_SCRATCH0 Reg used for freeing up r9 in Level 1 ISR 169 ld r9, [sp, PT_status32] ; get statu32_l2 (saved in pt_regs) 170 bbit0 r9, STATUS_A1_BIT, 1f ; L1 not active when L2 IRQ, so normal 174 ld r9, [r10, THREAD_INFO_PREEMPT_COUNT] 175 add r9, r9, 1 176 st r9, [r10, THREAD_INFO_PREEMPT_COUNT] 339 ld r9, [sp, PT_event] ; Ensure this is L2 intr context 340 brne r9, event_IRQ2, 149f 349 ld r9, [s [all...] |
/linux-master/arch/microblaze/kernel/ |
H A D | head.S | 180 or r9, r0, r0 /* TLB0 = 0 */ 192 addik r9, r0, 0x0100000 /* TLB0 must be 1MB */ 198 ori r9, r0, 0x400000 /* TLB0 is 4MB */ 201 addik r9, r0, 0x1000000 /* means TLB0 is 16MB */ 232 * TLB0 is always used - check if is not zero (r9 stores TLB0 value) 235 bnei r9, tlb0_not_zero 236 add r9, r10, r0 242 andi r29, r9, 0x100000 245 andi r29, r9, 0x400000 248 andi r29, r9, [all...] |