/linux-master/arch/nios2/include/asm/ |
H A D | syscall.h | 58 *args = regs->r9;
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/linux-master/arch/microblaze/include/asm/ |
H A D | syscall.h | 50 case 4: return regs->r9;
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/linux-master/arch/powerpc/boot/ |
H A D | opal-calls.S | 21 ld r9,8(r11)
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H A D | ppc_asm.h | 34 #define r9 9 macro
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/linux-master/arch/x86/kernel/ |
H A D | asm-offsets_64.c | 37 ENTRY(r9);
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H A D | relocate_kernel_64.S | 91 movq PTR(PA_TABLE_PAGE)(%rsi), %r9 97 movq %r9, CP_PA_TABLE_PAGE(%r11) 102 movq %r9, %cr3 160 movq %r9, %cr3
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/linux-master/arch/s390/kernel/ |
H A D | relocate_kernel.S | 23 * %r9 = PAGE_SIZE 33 lghi %r9,PAGE_SIZE # load PAGE_SIZE in r9
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H A D | entry.S | 123 lg %r9,\sie_control # get control block pointer 124 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE 127 larl %r9,sie_exit # skip forward to sie_exit 277 xgr %r9,%r9 320 lmg %r8,%r9,__LC_PGM_OLD_PSW 350 5: stmg %r8,%r9,__PT_PSW(%r11) 395 lmg %r8,%r9,\lc_old_psw 424 stmg %r8,%r9,__PT_PSW(%r11) 448 lmg %r8,%r9,__LC_MCK_OLD_PS [all...] |
/linux-master/arch/arm/nwfpe/ |
H A D | entry.S | 19 adrsvc al, r9, ret_from_exception @ r9 = normal FP return 32 r9) and the kernel takes care of returning control from the trap to 95 retne r9 @ return ok if not a fp insn 109 .Lfix: ret r9 @ let the user eat segfaults 125 @ r9 = normal "successful" return address 177 @ r9 = normal "successful" return address
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/linux-master/arch/x86/kvm/vmx/ |
H A D | vmenter.S | 153 mov VCPU_R9 (%_ASM_AX), %r9 215 mov %r9, VCPU_R9 (%_ASM_AX) 332 push %r9 349 pop %r9
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/linux-master/arch/arc/kernel/ |
H A D | entry.S | 56 ld r9, [sp, PT_status32] 57 brne r9, 0, 1f 175 ld.as r9, [sys_call_table, r8] 176 jl [r9] 240 ld.as r9,[sys_call_table, r8] 241 jl [r9] 270 GET_CURR_THR_INFO_FLAGS r9 271 and.f 0, r9, _TIF_WORK_MASK 275 bbit0 r9, TIF_NEED_RESCHED, .Lchk_pend_signals 285 GET_CURR_THR_INFO_FLAGS r9 [all...] |
/linux-master/arch/arm/mach-omap2/ |
H A D | sram242x.S | 42 mov r9, #0x1 @ set up for L1 voltage call 50 mvn r9, #0x4 @ mask to get clear bit2 51 and r10, r10, r9 @ clear bit2 for lock mode. 62 mov r9, #0x0 @ shift back to L0-voltage 101 orr r5, r5, r9 @ bulld value for L0/L1-volt operation. 146 movne r9, #0x0 @ if up set flag up for pre up, hi volt 164 moveq r9, #0x1 @ if speed down, post down, drop volt 196 orr r8, r8, r9 @ bulld value for L0/L1-volt operation. 289 mvn r9, #0x4 @ mask to get clear bit2 290 and r10, r10, r9 [all...] |
H A D | sram243x.S | 42 mov r9, #0x1 @ set up for L1 voltage call 50 mvn r9, #0x4 @ mask to get clear bit2 51 and r10, r10, r9 @ clear bit2 for lock mode. 62 mov r9, #0x0 @ shift back to L0-voltage 101 orr r5, r5, r9 @ bulld value for L0/L1-volt operation. 146 movne r9, #0x0 @ if up set flag up for pre up, hi volt 164 moveq r9, #0x1 @ if speed down, post down, drop volt 196 orr r8, r8, r9 @ bulld value for L0/L1-volt operation. 289 mvn r9, #0x4 @ mask to get clear bit2 290 and r10, r10, r9 [all...] |
/linux-master/arch/arm/mm/ |
H A D | cache-v7.S | 96 * Corrupted registers: r0-r6, r9-r10 123 * Corrupted registers: r0-r6, r9-r10 142 save_and_disable_irqs_notrace r9 @ make cssr&csidr read atomic 148 restore_irqs_notrace r9 161 mov r9, r1 @ create working copy of max index 163 mov r5, r9, lsl r2 @ factor set number into r5 167 subs r9, r9, #1 @ decrement the index 198 stmfd sp!, {r4-r6, r9-r10, lr} 203 ldmfd sp!, {r4-r6, r9 [all...] |
H A D | proc-mohawk.S | 352 stmfd sp!, {r4 - r9, lr} 358 mrc p15, 0, r9, c1, c0, 0 @ control reg 360 stmia r0, {r4 - r9} @ store cp regs 361 ldmia sp!, {r4 - r9, pc} 365 ldmia r0, {r4 - r9} @ load cp regs 378 mov r0, r9 @ control register
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H A D | proc-v6.S | 147 stmfd sp!, {r4 - r9, lr} 155 mrc p15, 0, r9, c1, c0, 0 @ control register 156 stmia r0, {r4 - r9} 157 ldmfd sp!, {r4- r9, pc} 167 ldmia r0, {r4 - r9} 180 mov r0, r9 @ control register
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/linux-master/arch/arm/kernel/ |
H A D | head.S | 96 THUMB( badr r9, 1f ) @ Kernel is always entered in ARM. 97 THUMB( bx r9 ) @ If this is a Thumb-2 kernel, 105 safe_svcmode_maskall r9 107 mrc p15, 0, r9, c0, c0 @ get processor id 108 bl __lookup_processor_type @ r5=procinfo r9=cpuid 130 * r8 = phys_offset, r9 = cpuid, r10 = procinfo 153 * r9 - cpuid 158 * r9 will be preserved. r5 will also be preserved if LPAE. 181 * r8 = phys_offset, r9 = cpuid, r10 = procinfo 380 THUMB( badr r9, [all...] |
H A D | head-nommu.S | 45 THUMB( badr r9, 1f ) @ Kernel is always entered in ARM. 46 THUMB( bx r9 ) @ If this is a Thumb-2 kernel, 55 safe_svcmode_maskall r9 58 mrc p15, 0, r9, c0, c0 @ get processor id 60 ldr r9, =BASEADDR_V7M_SCB 61 ldr r9, [r9, V7M_SCB_CPUID] 63 ldr r9, =CONFIG_PROCESSOR_ID 65 bl __lookup_processor_type @ r5=procinfo r9=cpuid 94 safe_svcmode_maskall r9 [all...] |
/linux-master/arch/powerpc/platforms/ps3/ |
H A D | hvcall.S | 121 std r9, -56(r1); \ 139 std r9, 0(r11); \ 288 std r9, -48(r1); \ 306 std r9, 0(r11); \ 323 std r9, -48(r1); \ 342 std r9, 0(r11); \ 458 std r9, -40(r1); \ 600 std r9, -24(r1); \ 645 std r9, -16(r1); \ 668 std r9, [all...] |
/linux-master/arch/powerpc/platforms/52xx/ |
H A D | mpc52xx_sleep.S | 45 mflr r9 /* save LR */ 51 mtlr r9 /* restore LR */
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/linux-master/arch/sh/boot/compressed/ |
H A D | head_32.S | 37 mov.l @(20,r1), r9 45 mov.l r9, @(20,r0)
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/linux-master/arch/microblaze/kernel/ |
H A D | mcount.S | 26 swi r9, r1, 28; \ 57 lwi r9, r1, 28; \
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/linux-master/arch/csky/abiv1/inc/abi/ |
H A D | entry.h | 70 stw r9, (sp, 12) variable 102 ldw r9, (sp, 12) variable
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/linux-master/tools/arch/x86/include/asm/ |
H A D | asm.h | 79 #define _ASM_ARG6 r9 86 #define _ASM_ARG6Q r9
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/linux-master/arch/x86/virt/vmx/tdx/ |
H A D | tdxcall.S | 55 movq TDX_MODULE_r9(%rsi), %r9 142 movq %r9, TDX_MODULE_r9(%rsi)
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