Searched refs:lw (Results 51 - 75 of 75) sorted by relevance

123

/linux-master/arch/riscv/kernel/
H A Dfpu.S69 lw t0, TASK_THREAD_FCSR_F0(a0)
H A Dhead.S256 lw t1, (a3)
/linux-master/arch/mips/net/
H A Dbpf_jit_comp32.c670 emit(ctx, lw, lo(dst), off, src);
676 emit(ctx, lw, dst[0], off + 4, src);
677 emit(ctx, lw, dst[1], off, src);
679 emit(ctx, lw, dst[1], off, src);
680 emit(ctx, lw, dst[0], off + 4, src);
1310 emit(ctx, lw, t1, off, ary); /* t1 = ary->map.max_entries*/
1316 emit(ctx, lw, t2, ctx->stack_size, MIPS_R_SP); /* t2 = *(SP + size) */
1328 emit(ctx, lw, t2, off, t1); /* t2 = *(t1 + off) */
1339 emit(ctx, lw, t1, off, t2); /* t1 = *(t2 + off) */
H A Dbpf_jit_comp.c158 emit(ctx, lw, reg, depth, MIPS_R_SP);
/linux-master/arch/alpha/kernel/
H A Dcore_titan.c791 agp->capability.lw = 0;
800 agp->mode.lw = 0;
H A Dcore_marvel.c978 csrs->AGP_CMD.csr = agp->mode.lw;
1099 agp->capability.lw = csrs->AGP_STAT.csr;
1105 agp->mode.lw = csrs->AGP_CMD.csr;
/linux-master/arch/mips/lib/
H A Dmemcpy.S185 #define LOADK lw /* No exception */
186 #define LOAD(reg, addr, handler) EXC(lw, LD_INSN, reg, addr, handler)
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/diag/
H A Drsc_dump.c237 MLX5_SET(mkc, mkc, lw, 1);
H A Dfw_tracer.c201 MLX5_SET(mkc, mkc, lw, 1);
/linux-master/arch/riscv/kvm/
H A Dvcpu_switch.S324 lw t0, KVM_ARCH_FP_F_FCSR(a0)
366 lw t0, KVM_ARCH_FP_D_FCSR(a0)
/linux-master/drivers/media/rc/img-ir/
H A Dimg-ir-hw.c956 u32 ir_status, len, lw, up; local
998 lw = img_ir_read(priv, IMG_IR_DATA_LW);
1000 img_ir_handle_data(priv, len, (u64)up << 32 | lw);
/linux-master/drivers/vdpa/mlx5/core/
H A Dmr.c66 MLX5_SET(mkc, mkc, lw, !!(mr->perm & VHOST_MAP_WO));
203 MLX5_SET(mkc, mkc, lw, 1);
439 MLX5_SET(mkc, mkc, lw, 1);
/linux-master/arch/mips/include/asm/
H A Dasm-eva.h21 #define kernel_lw(reg, addr) "lw " reg ", " addr "\n"
108 #define kernel_lw(reg, addr) lw reg, addr
/linux-master/kernel/sched/
H A Dfair.c164 static inline void update_load_add(struct load_weight *lw, unsigned long inc) argument
166 lw->weight += inc;
167 lw->inv_weight = 0;
170 static inline void update_load_sub(struct load_weight *lw, unsigned long dec) argument
172 lw->weight -= dec;
173 lw->inv_weight = 0;
176 static inline void update_load_set(struct load_weight *lw, unsigned long w) argument
178 lw->weight = w;
179 lw->inv_weight = 0;
230 static void __update_inv_weight(struct load_weight *lw) argument
259 __calc_delta(u64 delta_exec, unsigned long weight, struct load_weight *lw) argument
[all...]
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/steering/
H A Ddr_icm_pool.c65 MLX5_SET(mkc, mkc, lw, 1);
H A Ddr_send.c1165 MLX5_SET(mkc, mkc, lw, 1);
/linux-master/drivers/infiniband/hw/mlx5/
H A Dumr.c390 MLX5_SET(mkc, seg, lw, !!(access_flags & IB_ACCESS_LOCAL_WRITE));
H A Dmr.c67 MLX5_SET(mkc, mkc, lw, !!(acc & IB_ACCESS_LOCAL_WRITE));
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/fpga/
H A Dconn.c237 MLX5_SET(mkc, mkc, lw, 1);
/linux-master/drivers/vfio/pci/mlx5/
H A Dcmd.c354 MLX5_SET(mkc, mkc, lw, 1);
/linux-master/arch/m68k/ifpsp060/src/
H A Dpfpsp.S461 set neg_mask, 0x08000000 # negative bit mask (lw)
462 set inf_mask, 0x02000000 # infinity bit mask (lw)
463 set z_mask, 0x04000000 # zero bit mask (lw)
464 set nan_mask, 0x01000000 # nan bit mask (lw)
2538 tst.l FP_SRC_HI(%a6) # is lw 2 zero?
2540 tst.l FP_SRC_LO(%a6) # is lw 3 zero?
12942 tst.l FP_SRC_HI(%a6) # is lw 2 zero?
12944 tst.l FP_SRC_LO(%a6) # is lw 3 zero?
13135 dbf.w %d2,md2b # check for last digit in this lw
13137 addq.l &1,%d1 # inc lw pointe
[all...]
H A Dfplsp.S442 set neg_mask, 0x08000000 # negative bit mask (lw)
443 set inf_mask, 0x02000000 # infinity bit mask (lw)
444 set z_mask, 0x04000000 # zero bit mask (lw)
445 set nan_mask, 0x01000000 # nan bit mask (lw)
9279 lsr.l %d0,%d1 # no; bit stays in upper lw
10051 tst.l LOCAL_LO(%a0) # is lo lw of sgl set?
10053 tst.b 3+LOCAL_HI(%a0) # is lo byte of hi lw set?
H A Dfpsp.S462 set neg_mask, 0x08000000 # negative bit mask (lw)
463 set inf_mask, 0x02000000 # infinity bit mask (lw)
464 set z_mask, 0x04000000 # zero bit mask (lw)
465 set nan_mask, 0x01000000 # nan bit mask (lw)
2539 tst.l FP_SRC_HI(%a6) # is lw 2 zero?
2541 tst.l FP_SRC_LO(%a6) # is lw 3 zero?
9638 lsr.l %d0,%d1 # no; bit stays in upper lw
10300 tst.l LOCAL_LO(%a0) # is lo lw of sgl set?
10302 tst.b 3+LOCAL_HI(%a0) # is lo byte of hi lw set?
22982 tst.l FP_SRC_HI(%a6) # is lw
[all...]
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/
H A Den_main.c439 MLX5_SET(mkc, mkc, lw, 1);
526 MLX5_SET(mkc, mkc, lw, 1);
/linux-master/include/linux/mlx5/
H A Dmlx5_ifc.h4118 u8 lw[0x1]; member in struct:mlx5_ifc_mkc_bits

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