1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License.  See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2014 Imagination Technologies Ltd.
7 *
8 */
9
10#ifndef __ASM_ASM_EVA_H
11#define __ASM_ASM_EVA_H
12
13#ifndef __ASSEMBLY__
14
15/* Kernel variants */
16
17#define kernel_cache(op, base)		"cache " op ", " base "\n"
18#define kernel_pref(hint, base)		"pref " hint ", " base "\n"
19#define kernel_ll(reg, addr)		"ll " reg ", " addr "\n"
20#define kernel_sc(reg, addr)		"sc " reg ", " addr "\n"
21#define kernel_lw(reg, addr)		"lw " reg ", " addr "\n"
22#define kernel_lwl(reg, addr)		"lwl " reg ", " addr "\n"
23#define kernel_lwr(reg, addr)		"lwr " reg ", " addr "\n"
24#define kernel_lh(reg, addr)		"lh " reg ", " addr "\n"
25#define kernel_lb(reg, addr)		"lb " reg ", " addr "\n"
26#define kernel_lbu(reg, addr)		"lbu " reg ", " addr "\n"
27#define kernel_sw(reg, addr)		"sw " reg ", " addr "\n"
28#define kernel_swl(reg, addr)		"swl " reg ", " addr "\n"
29#define kernel_swr(reg, addr)		"swr " reg ", " addr "\n"
30#define kernel_sh(reg, addr)		"sh " reg ", " addr "\n"
31#define kernel_sb(reg, addr)		"sb " reg ", " addr "\n"
32
33#ifdef CONFIG_32BIT
34/*
35 * No 'sd' or 'ld' instructions in 32-bit but the code will
36 * do the correct thing
37 */
38#define kernel_sd(reg, addr)		user_sw(reg, addr)
39#define kernel_ld(reg, addr)		user_lw(reg, addr)
40#else
41#define kernel_sd(reg, addr)		"sd " reg", " addr "\n"
42#define kernel_ld(reg, addr)		"ld " reg", " addr "\n"
43#endif /* CONFIG_32BIT */
44
45#ifdef CONFIG_EVA
46
47#define __BUILD_EVA_INSN(insn, reg, addr)				\
48				"	.set	push\n"			\
49				"	.set	mips0\n"		\
50				"	.set	eva\n"			\
51				"	"insn" "reg", "addr "\n"	\
52				"	.set	pop\n"
53
54#define user_cache(op, base)		__BUILD_EVA_INSN("cachee", op, base)
55#define user_pref(hint, base)		__BUILD_EVA_INSN("prefe", hint, base)
56#define user_ll(reg, addr)		__BUILD_EVA_INSN("lle", reg, addr)
57#define user_sc(reg, addr)		__BUILD_EVA_INSN("sce", reg, addr)
58#define user_lw(reg, addr)		__BUILD_EVA_INSN("lwe", reg, addr)
59#define user_lwl(reg, addr)		__BUILD_EVA_INSN("lwle", reg, addr)
60#define user_lwr(reg, addr)		__BUILD_EVA_INSN("lwre", reg, addr)
61#define user_lh(reg, addr)		__BUILD_EVA_INSN("lhe", reg, addr)
62#define user_lb(reg, addr)		__BUILD_EVA_INSN("lbe", reg, addr)
63#define user_lbu(reg, addr)		__BUILD_EVA_INSN("lbue", reg, addr)
64/* No 64-bit EVA instruction for loading double words */
65#define user_ld(reg, addr)		user_lw(reg, addr)
66#define user_sw(reg, addr)		__BUILD_EVA_INSN("swe", reg, addr)
67#define user_swl(reg, addr)		__BUILD_EVA_INSN("swle", reg, addr)
68#define user_swr(reg, addr)		__BUILD_EVA_INSN("swre", reg, addr)
69#define user_sh(reg, addr)		__BUILD_EVA_INSN("she", reg, addr)
70#define user_sb(reg, addr)		__BUILD_EVA_INSN("sbe", reg, addr)
71/* No 64-bit EVA instruction for storing double words */
72#define user_sd(reg, addr)		user_sw(reg, addr)
73
74#else
75
76#define user_cache(op, base)		kernel_cache(op, base)
77#define user_pref(hint, base)		kernel_pref(hint, base)
78#define user_ll(reg, addr)		kernel_ll(reg, addr)
79#define user_sc(reg, addr)		kernel_sc(reg, addr)
80#define user_lw(reg, addr)		kernel_lw(reg, addr)
81#define user_lwl(reg, addr)		kernel_lwl(reg, addr)
82#define user_lwr(reg, addr)		kernel_lwr(reg, addr)
83#define user_lh(reg, addr)		kernel_lh(reg, addr)
84#define user_lb(reg, addr)		kernel_lb(reg, addr)
85#define user_lbu(reg, addr)		kernel_lbu(reg, addr)
86#define user_sw(reg, addr)		kernel_sw(reg, addr)
87#define user_swl(reg, addr)		kernel_swl(reg, addr)
88#define user_swr(reg, addr)		kernel_swr(reg, addr)
89#define user_sh(reg, addr)		kernel_sh(reg, addr)
90#define user_sb(reg, addr)		kernel_sb(reg, addr)
91
92#ifdef CONFIG_32BIT
93#define user_sd(reg, addr)		kernel_sw(reg, addr)
94#define user_ld(reg, addr)		kernel_lw(reg, addr)
95#else
96#define user_sd(reg, addr)		kernel_sd(reg, addr)
97#define user_ld(reg, addr)		kernel_ld(reg, addr)
98#endif /* CONFIG_32BIT */
99
100#endif /* CONFIG_EVA */
101
102#else /* __ASSEMBLY__ */
103
104#define kernel_cache(op, base)		cache op, base
105#define kernel_pref(hint, base)		pref hint, base
106#define kernel_ll(reg, addr)		ll reg, addr
107#define kernel_sc(reg, addr)		sc reg, addr
108#define kernel_lw(reg, addr)		lw reg, addr
109#define kernel_lwl(reg, addr)		lwl reg, addr
110#define kernel_lwr(reg, addr)		lwr reg, addr
111#define kernel_lh(reg, addr)		lh reg, addr
112#define kernel_lb(reg, addr)		lb reg, addr
113#define kernel_lbu(reg, addr)		lbu reg, addr
114#define kernel_sw(reg, addr)		sw reg, addr
115#define kernel_swl(reg, addr)		swl reg, addr
116#define kernel_swr(reg, addr)		swr reg, addr
117#define kernel_sh(reg, addr)		sh reg, addr
118#define kernel_sb(reg, addr)		sb reg, addr
119
120#ifdef CONFIG_32BIT
121/*
122 * No 'sd' or 'ld' instructions in 32-bit but the code will
123 * do the correct thing
124 */
125#define kernel_sd(reg, addr)		user_sw(reg, addr)
126#define kernel_ld(reg, addr)		user_lw(reg, addr)
127#else
128#define kernel_sd(reg, addr)		sd reg, addr
129#define kernel_ld(reg, addr)		ld reg, addr
130#endif /* CONFIG_32BIT */
131
132#ifdef CONFIG_EVA
133
134#define __BUILD_EVA_INSN(insn, reg, addr)			\
135				.set	push;			\
136				.set	mips0;			\
137				.set	eva;			\
138				insn reg, addr;			\
139				.set	pop;
140
141#define user_cache(op, base)		__BUILD_EVA_INSN(cachee, op, base)
142#define user_pref(hint, base)		__BUILD_EVA_INSN(prefe, hint, base)
143#define user_ll(reg, addr)		__BUILD_EVA_INSN(lle, reg, addr)
144#define user_sc(reg, addr)		__BUILD_EVA_INSN(sce, reg, addr)
145#define user_lw(reg, addr)		__BUILD_EVA_INSN(lwe, reg, addr)
146#define user_lwl(reg, addr)		__BUILD_EVA_INSN(lwle, reg, addr)
147#define user_lwr(reg, addr)		__BUILD_EVA_INSN(lwre, reg, addr)
148#define user_lh(reg, addr)		__BUILD_EVA_INSN(lhe, reg, addr)
149#define user_lb(reg, addr)		__BUILD_EVA_INSN(lbe, reg, addr)
150#define user_lbu(reg, addr)		__BUILD_EVA_INSN(lbue, reg, addr)
151/* No 64-bit EVA instruction for loading double words */
152#define user_ld(reg, addr)		user_lw(reg, addr)
153#define user_sw(reg, addr)		__BUILD_EVA_INSN(swe, reg, addr)
154#define user_swl(reg, addr)		__BUILD_EVA_INSN(swle, reg, addr)
155#define user_swr(reg, addr)		__BUILD_EVA_INSN(swre, reg, addr)
156#define user_sh(reg, addr)		__BUILD_EVA_INSN(she, reg, addr)
157#define user_sb(reg, addr)		__BUILD_EVA_INSN(sbe, reg, addr)
158/* No 64-bit EVA instruction for loading double words */
159#define user_sd(reg, addr)		user_sw(reg, addr)
160#else
161
162#define user_cache(op, base)		kernel_cache(op, base)
163#define user_pref(hint, base)		kernel_pref(hint, base)
164#define user_ll(reg, addr)		kernel_ll(reg, addr)
165#define user_sc(reg, addr)		kernel_sc(reg, addr)
166#define user_lw(reg, addr)		kernel_lw(reg, addr)
167#define user_lwl(reg, addr)		kernel_lwl(reg, addr)
168#define user_lwr(reg, addr)		kernel_lwr(reg, addr)
169#define user_lh(reg, addr)		kernel_lh(reg, addr)
170#define user_lb(reg, addr)		kernel_lb(reg, addr)
171#define user_lbu(reg, addr)		kernel_lbu(reg, addr)
172#define user_sw(reg, addr)		kernel_sw(reg, addr)
173#define user_swl(reg, addr)		kernel_swl(reg, addr)
174#define user_swr(reg, addr)		kernel_swr(reg, addr)
175#define user_sh(reg, addr)		kernel_sh(reg, addr)
176#define user_sb(reg, addr)		kernel_sb(reg, addr)
177
178#ifdef CONFIG_32BIT
179#define user_sd(reg, addr)		kernel_sw(reg, addr)
180#define user_ld(reg, addr)		kernel_lw(reg, addr)
181#else
182#define user_sd(reg, addr)		kernel_sd(reg, addr)
183#define user_ld(reg, addr)		kernel_ld(reg, addr)
184#endif /* CONFIG_32BIT */
185
186#endif /* CONFIG_EVA */
187
188#endif /* __ASSEMBLY__ */
189
190#endif /* __ASM_ASM_EVA_H */
191