Searched refs:instruction (Results 101 - 123 of 123) sorted by relevance

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/linux-master/arch/arm/mm/
H A Dproc-xscale.S72 sub pc, pc, #4 @ flush instruction pipeline
78 @ flush instruction pipeline
H A Dproc-xsc3.S59 @ flush instruction pipeline
/linux-master/tools/perf/util/
H A Dparse-events.l255 lc_type (L1-dcache|l1-d|l1d|L1-data|L1-icache|l1-i|l1i|L1-instruction|LLC|L2|dTLB|d-tlb|Data-TLB|iTLB|i-tlb|Instruction-TLB|branch|branches|bpu|btb|bpc|node)
H A Dheader.c2090 fprintf(fp, "# contains AUX area data (e.g. instruction trace)\n");
/linux-master/arch/m68k/fpsp040/
H A Dx_snan.S18 | disabled with the exception posted. If the instruction is not move_
H A Dfpsp.h65 | instruction that generates (say) an underflow. Alternatively,
H A Dtbldo.S46 | instruction ;opcode-stag Notes
H A Dsetox.S178 | Note also that we use the FMOVEM instruction to move X
/linux-master/arch/x86/crypto/
H A Dsha1_ssse3_asm.S4 * SSE3 instruction set extensions introduced in Intel Core Microarchitecture
366 * instruction
372 # blended scheduling of vector and scalar instruction streams, one 4-wide
H A Dsha512-avx-asm.S170 # stitched to take advantage of instruction-level parallelism.
H A Dsha512-ssse3-asm.S165 # stitched to take advantage of instruction-level parallelism.
/linux-master/arch/arm/include/asm/
H A Dassembler.h487 @ explicit IT instruction needed because of the label
/linux-master/arch/sparc/kernel/
H A Dentry.S431 * instruction attempts from user code.
679 /* Advance over the trap instruction. */
694 /* Advance over the trap instruction. */
711 jmp %l2 ! advance over trap instruction
731 jmp %l2 ! advance over trap instruction
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/
H A Dfw.c408 MLX5_SET(mcc_reg, in, instruction, instr);
/linux-master/include/acpi/
H A Dactbl1.h105 u8 instruction; member in struct:acpi_whea_header
110 u64 mask; /* Bitmask required for this register instruction */
/linux-master/arch/arm/crypto/
H A Dsha1-armv4-large.S43 @ [**] While each Thumb instruction is twice smaller, they are not as
H A Dpoly1305-armv4.pl622 @ instruction accepts 2x32-bit input and writes 2x64-bit result.
/linux-master/drivers/gpu/drm/amd/amdkfd/
H A Dcwsr_trap_handler_gfx10.asm231 // Caused by instruction fetch memory violation.
334 // Advance past trap instruction to prevent re-entry.
H A Dcwsr_trap_handler_gfx8.asm221 // Set SPI_PRIO=2 to avoid starving instruction fetch in the waves we're waiting for.
/linux-master/arch/m68k/ifpsp060/src/
H A Dfplsp.S529 set fmovm_flg, 0x40 # flag bit: fmovm instruction
6837 # Note also that we use the FMOVEM instruction to move X #
9838 # a DZ exception should occur for the instruction. If DZ is disabled, #
10122 # instruction of transcendental 060FPLSP emulation, then it has already #
10155 # The last instruction of transcendental emulation for the #
10280 # Native instruction support
/linux-master/arch/x86/kvm/
H A Dx86.c510 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
514 * fault we just panic; during reboot instead the instruction is ignored.
728 that instruction re-execution will regenerate lost
2114 /* Treat an INVD instruction as a NOP and just skip it. */
2133 pr_warn_once("%s instruction emulated as NOP!\n", insn);
5068 * an instruction boundary and will not trigger guest emulation of any
5172 * instruction boundary and with no events half-injected.
5383 * The API doesn't provide the instruction length for software
7624 /* used for instruction fetching */
8645 * instruction
10212 char instruction[3]; local
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/linux-master/drivers/net/ethernet/mellanox/mlxsw/
H A Dreg.h10539 MLXSW_ITEM32(reg, mcc, instruction, 0x00, 0, 8);
10555 * Indicates the successful completion of the instruction, or the reason it
10568 * Component size in bytes. Valid for UPDATE_COMPONENT instruction. Specifying
11914 * IP (instruction pointer) that triggered the timeout.
11943 * The instruction pointer when assert was triggered.
/linux-master/include/linux/mlx5/
H A Dmlx5_ifc.h10938 u8 instruction[0x8]; member in struct:mlx5_ifc_mcc_reg_bits

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