| /linux-master/arch/arm64/kvm/ |
| H A D | guest.c | 68 off < KVM_REG_ARM_CORE_REG(fp_regs.fpsr);
98 case KVM_REG_ARM_CORE_REG(fp_regs.fpsr):
175 case KVM_REG_ARM_CORE_REG(fp_regs.fpsr):
176 return &vcpu->arch.ctxt.fp_regs.fpsr;
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| /linux-master/arch/m68k/ifpsp060/src/ |
| H A D | fpsp.S | 646 fmovm.l %fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
706 fmov.l &0x0,%fpsr
732 fmovm.l USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
747 fmovm.l USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
766 fmovm.l USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
792 fmov.l &0x0,%fpsr
805 fmovm.l USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
886 fmovm.l %fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
949 fmov.l &0x0,%fpsr
982 fmovm.l USER_FPCR(%a6),%fpcr,%fpsr,
[all...] |
| /linux-master/arch/m68k/ifpsp060/ |
| H A D | fskeleton.S | 196 fmove.l %fpsr,-(%sp)
198 fmove.l (%sp)+,%fpsr
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| /linux-master/tools/testing/selftests/arm64/fp/ |
| H A D | sve-ptrace.c | 495 &fpsimd_state.fpsr, &errors);
596 check_u32(vl, "FPSR", &write_fpsimd.fpsr,
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| /linux-master/arch/arm64/kernel/ |
| H A D | signal32.c | 125 /* Create an AArch32 fpscr from the fpsr and the fpcr. */
126 fpscr = (fpsimd->fpsr & VFP_FPSCR_STAT_MASK) |
167 /* Extract the fpsr and the fpcr from the fpscr */
169 fpsimd.fpsr = fpscr & VFP_FPSCR_STAT_MASK;
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| H A D | fpsimd.c | 419 ¤t->thread.uw.fpsimd_state.fpsr,
499 &last->st->fpsr, save_ffr);
2033 &this_cpu_ptr(&efi_fpsimd_state)->fpsr,
2085 &this_cpu_ptr(&efi_fpsimd_state)->fpsr,
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| H A D | ptrace.c | 846 * Copy fpsr, and fpcr which must follow contiguously in
851 membuf_write(&to, &target->thread.uw.fpsimd_state.fpsr,
996 * Copy fpsr, and fpcr which must follow contiguously in
1002 &target->thread.uw.fpsimd_state.fpsr,
1487 * We pretend we have 32-bit registers because the fpsr and
1752 fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
1779 uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
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| /linux-master/tools/testing/selftests/kvm/aarch64/ |
| H A D | get-reg-list.c | 139 case KVM_REG_ARM_CORE_REG(fp_regs.fpsr):
140 return "KVM_REG_ARM_CORE_REG(fp_regs.fpsr)";
314 KVM_REG_ARM64 | KVM_REG_SIZE_U32 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(fp_regs.fpsr),
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| /linux-master/arch/arm64/kvm/hyp/include/hyp/ |
| H A D | switch.h | 319 &vcpu->arch.ctxt.fp_regs.fpsr,
331 &sve_state->fpsr,
|
| /linux-master/arch/m68k/fpsp040/ |
| H A D | fpsp.h | 22 | fmove.l fpsr/fpcr/fpiar,USER_FPSR(a6)
52 | fmove.l USER_FPSR(a6),fpsr/fpcr/fpiar
137 .set FPSR_SHADOW,LV-64 | fpsr shadow reg
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| H A D | gen_except.S | 154 andb FPSR_EXCEPT(%a6),%d0 |and in the fpsr exc byte
233 fmoveml USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
368 fmoveml USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
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| H A D | srem_mod.S | 371 fmovel %fpsr,%d6
374 fmovel %d6,%fpsr | ...put Q in fpsr
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| H A D | decbin.S | 63 | in an inex2 exception. If so, set inex1 in the fpsr and
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| H A D | get_op.S | 539 fmovel #0,%FPSR |clr fpsr from decbin
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| H A D | ssin.S | 162 | 9D25B Fix: Sometimes the previous fmove.s sets fpsr bits
164 fmovel #0,%fpsr
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| H A D | res_func.S | 338 | Write the result to memory, setting the fpsr cc bits. NaN and Inf
854 fmovel %fpsr,%d1
881 fmovel %fpsr,%d1
1028 fmovel %fpsr,%d1
1056 fmovel %fpsr,%d1
1509 fmovel %fpsr,%d1
1555 fmovel %fpsr,%d1
1600 fmovel %fpsr,%d1
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| H A D | bindec.S | 266 fmovel #0,%FPSR |zero all of fpsr - nothing needed
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| /linux-master/arch/arm64/include/asm/ |
| H A D | kvm_host.h | 532 __u32 fpsr; member in struct:cpu_sve_state
|