Searched refs:ecc (Results 76 - 100 of 155) sorted by relevance

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/linux-master/drivers/mtd/nand/spi/
H A Desmt.c101 .ecc = f50l1g41lb_ooblayout_ecc,
H A Dgigadevice.c96 .ecc = gd5fxgq4xa_ooblayout_ecc,
151 .ecc = gd5fxgqx_variant2_ooblayout_ecc,
180 .ecc = gd5fxgq4xc_ooblayout_256_ecc,
H A Dmicron.c86 .ecc = micron_8_ooblayout_ecc,
127 .ecc = micron_4_ooblayout_ecc,
H A Dwinbond.c61 .ecc = w25m02gv_ooblayout_ecc,
104 .ecc = w25n02kv_ooblayout_ecc,
/linux-master/drivers/net/can/spi/mcp251xfd/
H A Dmcp251xfd-tef.c173 struct mcp251xfd_ecc *ecc = &priv->ecc; local
175 ecc->ecc_stat = 0;
H A Dmcp251xfd-core.c626 struct mcp251xfd_ecc *ecc = &priv->ecc; local
631 ecc->ecc_stat = 0;
1177 struct mcp251xfd_ecc *ecc = &priv->ecc; local
1199 * of a ECCIF (which is tracked in ecc->cnt).
1206 ecc->cnt) {
1210 ecc->cnt)
1257 struct mcp251xfd_ecc *ecc = &priv->ecc; local
1306 struct mcp251xfd_ecc *ecc = &priv->ecc; local
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/linux-master/drivers/mtd/nand/raw/
H A Ddiskonchip.c79 /* This is the ecc value computed by the HW ecc generator upon writing an empty
135 static int doc_ecc_decode(struct rs_control *rs, uint8_t *data, uint8_t *ecc) argument
143 /* Convert the ecc bytes into words */
144 ds[0] = ((ecc[4] & 0xff) >> 0) | ((ecc[5] & 0x03) << 8);
145 ds[1] = ((ecc[5] & 0xfc) >> 2) | ((ecc[2] & 0x0f) << 6);
146 ds[2] = ((ecc[2] & 0xf0) >> 4) | ((ecc[
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H A Dintel-nand-controller.c245 oobregion->length = chip->ecc.total;
258 oobregion->offset = chip->ecc.total + HSNAND_ECC_OFFSET;
265 .ecc = ebu_nand_ooblayout_ecc,
399 chip->ecc.read_oob(chip, page);
450 u32 ecc_strength_ds = chip->ecc.strength;
451 u32 ecc_size = chip->ecc.size;
457 if (!chip->ecc.size)
458 chip->ecc.size = 512;
494 chip->ecc.total = ecc_total;
508 chip->ecc
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H A Dcadence-nand-controller.c1151 "Unsupported sector size(ecc step size) %d\n",
1367 chip->ecc.strength);
1521 int ecc_steps = chip->ecc.steps;
1522 int ecc_size = chip->ecc.size;
1523 int ecc_bytes = chip->ecc.bytes;
1543 /* Arrange the buffer for syndrome payload/ecc layout. */
1568 (cdns_chip->sector_size + chip->ecc.bytes)
1714 int ecc_steps = chip->ecc.steps;
1715 int ecc_size = chip->ecc.size;
1716 int ecc_bytes = chip->ecc
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H A Dsh_flctl.c40 oobregion->length = chip->ecc.bytes;
58 .ecc = flctl_4secc_ooblayout_sp_ecc,
67 if (section >= chip->ecc.steps)
71 oobregion->length = chip->ecc.bytes;
81 if (section >= chip->ecc.steps)
96 .ecc = flctl_4secc_ooblayout_lp_ecc,
326 "reading empty sector %d, ecc error ignored\n",
650 "applied ecc on page 0x%x", page_addr);
1038 chip->ecc.size = 512;
1039 chip->ecc
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H A Dgpio.c166 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT &&
167 chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
168 chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
369 chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
H A Dams-delta.c220 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT &&
221 chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
222 chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
377 this->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
H A Dr852.c408 /* enable ecc generation/check*/
411 /* flush ecc buffer */
420 /* disable ecc generation */
487 /* ecc uncorrectable error */
489 dbg("ecc: unrecoverable error, in half %d", i);
498 dbg("ecc: recoverable error, "
820 if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
823 chip->ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;
824 chip->ecc.size = R852_DMA_LEN;
825 chip->ecc
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/linux-master/lib/
H A Dbch.c30 * Call bch_encode to compute and store ecc parity bytes to a given buffer.
131 uint32_t *ecc)
140 p = bch->mod8_tab + (l+1)*(((ecc[0] >> 24)^(tmp)) & 0xff);
143 ecc[i] = ((ecc[i] << 8)|(ecc[i+1] >> 24))^(*p++);
145 ecc[l] = (ecc[l] << 8)^(*p);
150 * convert ecc bytes to aligned, zero-padded 32-bit ecc word
129 bch_encode_unaligned(struct bch_control *bch, const unsigned char *data, unsigned int len, uint32_t *ecc) argument
207 bch_encode(struct bch_control *bch, const uint8_t *data, unsigned int len, uint8_t *ecc) argument
370 compute_syndromes(struct bch_control *bch, uint32_t *ecc, unsigned int *syn) argument
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/linux-master/arch/mips/mm/
H A Dcerr-sb1.c481 uint8_t ecc, lru; local
551 ecc = dc_ecc(datalo);
552 if (ecc != datahi) {
555 ecc ^= datahi;
556 bits = hweight8(ecc);
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dumc_v6_7.c109 mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status;
121 err_addr = ras->umc_ecc.ecc[eccinfo_table_idx].mca_ceumc_addr;
150 mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status;
232 mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status;
244 err_addr = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_addr;
H A Dumc_v8_7.c63 mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status;
80 mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status;
140 mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status;
152 err_addr = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_addr;
H A Dumc_v8_10.c349 ecc_ce_cnt = ras->umc_ecc.ecc[eccinfo_table_idx].ce_count_lo_chip;
368 mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status;
415 mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status;
428 err_addr = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_addr;
/linux-master/drivers/mtd/nand/onenand/
H A Donenand_omap2.c267 int ecc = read_reg(c, ONENAND_REG_ECC_STATUS); local
269 if (ecc) {
274 if (ecc & ONENAND_ECC_2BIT_ALL) {
277 ecc, addr1, addr8);
280 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
283 "addr8 %#x\n", ecc, addr1, addr8);
/linux-master/drivers/net/ethernet/netronome/nfp/
H A Dnfp_asm.c313 u8 ecc = 0; local
317 ecc |= parity(nfp_ustore_ecc_polynomials[i] & insn) << i;
319 return insn | (u64)ecc << NFP_USTORE_OP_BITS;
/linux-master/drivers/crypto/
H A DMakefile7 # __init ordering requires atmel-i2c being before atmel-ecc and atmel-sha204a.
9 obj-$(CONFIG_CRYPTO_DEV_ATMEL_ECC) += atmel-ecc.o
/linux-master/drivers/mtd/nand/
H A Decc-mxic.c19 #include <linux/mtd/nand-ecc-mxic.h>
126 struct nand_ecc_engine *eng = nand->ecc.engine;
170 .ecc = mxic_ecc_ooblayout_ecc,
222 struct nand_ecc_props *conf = &nand->ecc.ctx.conf;
223 struct nand_ecc_props *reqs = &nand->ecc.requirements;
224 struct nand_ecc_props *user = &nand->ecc.user_conf;
237 nand->ecc.ctx.priv = ctx;
363 struct device *dev = nand->ecc.engine->dev;
387 dev = nand_ecc_get_engine_dev(nand->ecc.engine->dev);
752 /* Retrieve the nand-ecc
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/linux-master/include/linux/spi/
H A Dspi-mem.h92 * @data.ecc: whether error correction is required or not
126 u8 ecc : 1; member in struct:spi_mem_op::__anon616
299 * @ecc: Supports operations with error correction
303 bool ecc; member in struct:spi_controller_mem_caps
/linux-master/drivers/net/can/sja1000/
H A Dsja1000.c415 uint8_t ecc, alc; local
465 ecc = priv->read_reg(priv, SJA1000_ECC);
470 switch (ecc & ECC_MASK) {
485 cf->data[3] = ecc & ECC_SEG;
488 if ((ecc & ECC_DIR) == 0)
/linux-master/drivers/mtd/nand/raw/gpmi-nand/
H A Dgpmi-nand.c246 struct nand_ecc_props *conf = &nand->ecc.ctx.conf;
267 /* check if bbm locates in data chunk rather than ecc chunk */
292 dev_dbg(this->dev, "Set ecc to %d and bbm in chunk %d\n",
324 "unsupported nand chip. ecc bits : %d, ecc size : %d\n",
338 "unsupported nand chip. ecc size: %d, oob size : %d\n",
372 * C : the ecc chunk size, aka the "data" above.
461 /* sanity check for the minimum ecc nand required */
470 "unsupported NAND chip, minimum ecc required %d\n",
475 /* calculate the maximum ecc platfor
2256 struct nand_ecc_ctrl *ecc = &chip->ecc; local
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