Searched refs:ctl (Results 126 - 150 of 545) sorted by relevance

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/linux-master/net/sched/
H A Dsch_sfb.c496 const struct tc_sfb_qopt *ctl = &sfb_default_ops; local
509 ctl = nla_data(tb[TCA_SFB_PARMS]);
512 limit = ctl->limit;
528 q->rehash_interval = msecs_to_jiffies(ctl->rehash_interval);
529 q->warmup_time = msecs_to_jiffies(ctl->warmup_time);
532 q->increment = ctl->increment;
533 q->decrement = ctl->decrement;
534 q->max = ctl->max;
535 q->bin_size = ctl->bin_size;
536 q->penalty_rate = ctl
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H A Dsch_plug.c136 struct tc_plug_qopt *ctl = nla_data(opt); local
138 if (nla_len(opt) < sizeof(*ctl))
141 q->limit = ctl->limit;
H A Dsch_sfq.c634 struct tc_sfq_qopt *ctl = nla_data(opt); local
641 if (opt->nla_len < nla_attr_size(sizeof(*ctl)))
645 if (ctl->divisor &&
646 (!is_power_of_2(ctl->divisor) || ctl->divisor > 65536))
650 if (ctl->quantum) {
651 unsigned int scaled = SFQ_ALLOT_SIZE(ctl->quantum);
666 if (ctl->quantum) {
667 q->quantum = ctl->quantum;
670 WRITE_ONCE(q->perturb_period, ctl
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/linux-master/drivers/thunderbolt/
H A Ddomain.c322 tb_ctl_free(tb->ctl);
400 tb->ctl = tb_ctl_alloc(nhi, tb->index, timeout_msec, tb_domain_event_cb, tb);
401 if (!tb->ctl)
447 tb_ctl_start(tb->ctl);
486 tb_ctl_stop(tb->ctl);
505 tb_ctl_stop(tb->ctl);
535 tb_ctl_stop(tb->ctl);
553 tb_ctl_start(tb->ctl);
574 tb_ctl_stop(tb->ctl);
585 tb_ctl_start(tb->ctl);
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H A Dxdomain.c135 static int __tb_xdomain_response(struct tb_ctl *ctl, const void *response, argument
150 return tb_cfg_request(ctl, req, response_ready, req);
168 return __tb_xdomain_response(xd->tb->ctl, response, size, type);
172 static int __tb_xdomain_request(struct tb_ctl *ctl, const void *request, argument
193 res = tb_cfg_request_sync(ctl, req, timeout_msec);
222 return __tb_xdomain_request(xd->tb->ctl, request, request_size,
263 static int tb_xdp_uuid_request(struct tb_ctl *ctl, u64 route, int retry, argument
275 ret = __tb_xdomain_request(ctl, &req, sizeof(req),
292 static int tb_xdp_uuid_response(struct tb_ctl *ctl, u64 route, u8 sequence, argument
305 return __tb_xdomain_response(ctl,
309 tb_xdp_error_response(struct tb_ctl *ctl, u64 route, u8 sequence, enum tb_xdp_error error) argument
323 tb_xdp_properties_request(struct tb_ctl *ctl, u64 route, const uuid_t *src_uuid, const uuid_t *dst_uuid, int retry, u32 **block, u32 *generation) argument
414 tb_xdp_properties_response(struct tb *tb, struct tb_ctl *ctl, struct tb_xdomain *xd, u8 sequence, const struct tb_xdp_properties *req) argument
468 tb_xdp_properties_changed_request(struct tb_ctl *ctl, u64 route, int retry, const uuid_t *uuid) argument
492 tb_xdp_properties_changed_response(struct tb_ctl *ctl, u64 route, u8 sequence) argument
503 tb_xdp_link_state_status_request(struct tb_ctl *ctl, u64 route, u8 sequence, u8 *slw, u8 *tlw, u8 *sls, u8 *tls) argument
537 tb_xdp_link_state_status_response(struct tb *tb, struct tb_ctl *ctl, struct tb_xdomain *xd, u8 sequence) argument
566 tb_xdp_link_state_change_request(struct tb_ctl *ctl, u64 route, u8 sequence, u8 tlw, u8 tls) argument
593 tb_xdp_link_state_change_response(struct tb_ctl *ctl, u64 route, u8 sequence, u32 status) argument
733 struct tb_ctl *ctl = tb->ctl; local
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/linux-master/drivers/net/ethernet/
H A Dlantiq_xrx200.c137 if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) != LTQ_DMA_C)
140 desc->ctl = LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) |
214 ch->dma.desc_base[ch->dma.desc].ctl =
225 u32 ctl = desc->ctl; local
226 int len = (ctl & LTQ_DMA_SIZE_MASK);
253 if (ctl & LTQ_DMA_SOP) {
268 if (ctl & LTQ_DMA_EOP) {
293 if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) {
325 if ((desc->ctl
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/linux-master/drivers/mmc/host/
H A Drenesas_sdhi_internal_dmac.c305 writel(enable ? ~dma_irqs : INFO1_MASK_CLEAR, host->ctl + DM_CM_INFO1_MASK);
318 writel(RST_RESERVED_BITS & ~val, host->ctl + DM_CM_RST);
319 writel(RST_RESERVED_BITS | val, host->ctl + DM_CM_RST);
334 u32 status = readl(host->ctl + DM_CM_INFO1);
337 writel(status ^ dma_irqs, host->ctl + DM_CM_INFO1);
429 writel(dtran_mode, host->ctl + DM_CM_DTRAN_MODE);
430 writel(sg_dma_address(sg), host->ctl + DM_DTRAN_ADDR);
452 writel(DTRAN_CTRL_DM_START, host->ctl + DM_CM_DTRAN_CTRL);
539 writel(INFO1_MASK_CLEAR, host->ctl + DM_CM_INFO1_MASK);
540 writel(INFO2_MASK_CLEAR, host->ctl
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/linux-master/drivers/platform/mellanox/
H A Dmlxbf-tmfifo.c162 * @ctl: control register offset (TMFIFO_RX_CTL / TMFIFO_TX_CTL)
167 void __iomem *ctl; member in struct:mlxbf_tmfifo_io
1293 u64 ctl; local
1296 ctl = readq(fifo->tx.ctl);
1298 FIELD_GET(MLXBF_TMFIFO_TX_CTL__MAX_ENTRIES_MASK, ctl);
1299 ctl = (ctl & ~MLXBF_TMFIFO_TX_CTL__LWM_MASK) |
1302 ctl = (ctl
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/linux-master/drivers/video/backlight/
H A Das3711_bl.c177 u8 ctl = 0; local
192 ctl = 1;
196 ctl = 4;
200 ctl = 0x10;
205 ctl = 2;
207 ctl |= 8;
209 ctl |= 0x20;
217 ret = regmap_write(as3711->regmap, AS3711_CURR_CONTROL, ctl);
/linux-master/sound/core/
H A DMakefile29 snd-ctl-led-y := control_led.o
41 obj-$(CONFIG_SND_CTL_LED) += snd-ctl-led.o
/linux-master/sound/pci/oxygen/
H A Dxonar_pcm179x.c734 static int rolloff_info(struct snd_kcontrol *ctl, argument
744 static int rolloff_get(struct snd_kcontrol *ctl, argument
747 struct oxygen *chip = ctl->private_data;
756 static int rolloff_put(struct snd_kcontrol *ctl, argument
759 struct oxygen *chip = ctl->private_data;
789 static int deemph_get(struct snd_kcontrol *ctl, argument
792 struct oxygen *chip = ctl->private_data;
800 static int deemph_put(struct snd_kcontrol *ctl, argument
803 struct oxygen *chip = ctl->private_data;
841 static int st_output_switch_info(struct snd_kcontrol *ctl, argument
851 st_output_switch_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) argument
868 st_output_switch_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) argument
896 st_hp_volume_offset_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info) argument
906 st_hp_volume_offset_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) argument
926 st_hp_volume_offset_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) argument
965 xense_output_switch_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) argument
981 xense_output_switch_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) argument
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/linux-master/drivers/staging/vme_user/
H A Dvme_tsi148.c593 /* Write ctl reg without enable */
613 unsigned int i, granularity = 0, ctl = 0; local
625 ctl = ioread32be(bridge->base + TSI148_LCSR_IT[i] +
652 if (ctl & TSI148_LCSR_ITAT_EN)
655 if ((ctl & TSI148_LCSR_ITAT_AS_M) == TSI148_LCSR_ITAT_AS_A16) {
659 if ((ctl & TSI148_LCSR_ITAT_AS_M) == TSI148_LCSR_ITAT_AS_A24) {
663 if ((ctl & TSI148_LCSR_ITAT_AS_M) == TSI148_LCSR_ITAT_AS_A32) {
667 if ((ctl & TSI148_LCSR_ITAT_AS_M) == TSI148_LCSR_ITAT_AS_A64) {
675 if ((ctl & TSI148_LCSR_ITAT_2eSSTM_M) == TSI148_LCSR_ITAT_2eSSTM_160)
677 if ((ctl
1037 unsigned int i, ctl; local
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/linux-master/arch/sparc/include/asm/
H A Dsbi.h16 /* 0x0004 */ u32 ctl; /* Control */ member in struct:sbi_regs
/linux-master/drivers/pcmcia/
H A Dricoh.h217 u16 config, ctl; local
222 ctl = RL5C4XX_16CTL_IO_TIMING | RL5C4XX_16CTL_MEM_TIMING;
225 ctl |= RL5C46X_16CTL_LEVEL_1 | RL5C46X_16CTL_LEVEL_2;
230 config_writew(socket, RL5C4XX_16BIT_CTL, ctl);
/linux-master/drivers/dma/ioat/
H A Dhw.h74 uint32_t ctl; member in union:ioat_dma_descriptor::__anon119
108 uint32_t ctl; member in union:ioat_xor_descriptor::__anon122
155 uint32_t ctl; member in union:ioat_pq_descriptor::__anon126
204 uint32_t ctl; member in union:ioat_pq_update_descriptor::__anon129
/linux-master/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_lm.h77 const struct dpu_ctl_cfg *ctl; member in struct:dpu_hw_mixer
/linux-master/drivers/accel/habanalabs/common/
H A Dirq.c504 u32 cur_eqe, ctl; local
510 cur_eqe = le32_to_cpu(eq_base[eq->ci].hdr.ctl);
538 ctl = le32_to_cpu(eq_entry->hdr.ctl);
539 event_type = ((ctl & EQ_CTL_EVENT_TYPE_MASK) >> EQ_CTL_EVENT_TYPE_SHIFT);
557 eq_entry->hdr.ctl =
558 cpu_to_le32(le32_to_cpu(eq_entry->hdr.ctl) &
/linux-master/drivers/parport/
H A Dieee1284_ops.c44 unsigned char ctl = (PARPORT_CONTROL_SELECT local
53 parport_write_control (port, ctl);
122 parport_write_control (port, ctl | PARPORT_CONTROL_STROBE);
125 parport_write_control (port, ctl);
483 unsigned char ctl;
496 ctl = parport_read_control (port);
497 ctl &= ~(PARPORT_CONTROL_STROBE | PARPORT_CONTROL_INIT |
500 ctl | PARPORT_CONTROL_AUTOFD);
572 parport_write_control (port, ctl);
590 ctl | PARPORT_CONTROL_AUTOF
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/linux-master/arch/s390/mm/
H A Dcmm.c246 static int cmm_pages_handler(struct ctl_table *ctl, int write, argument
251 .procname = ctl->procname,
265 static int cmm_timed_pages_handler(struct ctl_table *ctl, int write, argument
271 .procname = ctl->procname,
285 static int cmm_timeout_handler(struct ctl_table *ctl, int write, argument
/linux-master/drivers/net/ethernet/broadcom/
H A Dbgmac.c89 u32 ctl; local
91 ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL);
93 ctl &= ~BGMAC_DMA_TX_BL_MASK;
94 ctl |= BGMAC_DMA_TX_BL_128 << BGMAC_DMA_TX_BL_SHIFT;
96 ctl &= ~BGMAC_DMA_TX_MR_MASK;
97 ctl |= BGMAC_DMA_TX_MR_2 << BGMAC_DMA_TX_MR_SHIFT;
99 ctl &= ~BGMAC_DMA_TX_PC_MASK;
100 ctl |= BGMAC_DMA_TX_PC_16 << BGMAC_DMA_TX_PC_SHIFT;
102 ctl &= ~BGMAC_DMA_TX_PT_MASK;
103 ctl |
309 u32 ctl; local
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/linux-master/fs/btrfs/tests/
H A Dfree-space-tests.c325 static bool test_use_bitmap(struct btrfs_free_space_ctl *ctl, argument
328 return ctl->free_extents > 0;
827 static bool bytes_index_use_bitmap(struct btrfs_free_space_ctl *ctl, argument
839 struct btrfs_free_space_ctl *ctl = cache->free_space_ctl; local
859 for (node = rb_first_cached(&ctl->free_space_bytes), i = 9; node;
882 for (node = rb_first_cached(&ctl->free_space_bytes), i = 1; node;
939 entry = rb_entry(rb_first_cached(&ctl->free_space_bytes),
964 entry = rb_entry(rb_first_cached(&ctl->free_space_bytes),
979 entry = rb_entry(rb_first_cached(&ctl->free_space_bytes),
/linux-master/arch/arc/mm/
H A Dcache.c370 const unsigned int ctl = ARC_REG_DC_CTRL; local
371 write_aux_reg(ctl, read_aux_reg(ctl) | DC_CTRL_INV_MODE_FLUSH);
379 const unsigned int ctl = ARC_REG_DC_CTRL; local
380 unsigned int val = read_aux_reg(ctl);
395 write_aux_reg(ctl, val);
404 const unsigned int ctl = ARC_REG_DC_CTRL; local
408 while ((reg = read_aux_reg(ctl)) & DC_CTRL_FLUSH_STATUS)
413 write_aux_reg(ctl, reg & ~DC_CTRL_INV_MODE_FLUSH);
/linux-master/drivers/ras/amd/atl/
H A Dmap.c234 ctx->inst_id, &ctx->map.ctl))
257 ctx->inst_id, &ctx->map.ctl))
266 if (!FIELD_GET(DF4_REMAP_EN, ctx->map.ctl))
273 remap_sel = FIELD_GET(DF4_REMAP_SEL, ctx->map.ctl);
313 ctx->inst_id, &ctx->map.ctl))
322 if (!FIELD_GET(DF4_REMAP_EN, ctx->map.ctl))
329 remap_sel = FIELD_GET(DF4p5_REMAP_SEL, ctx->map.ctl);
447 return FIELD_GET(DF_ADDR_RANGE_VAL, ctx->map.ctl);
653 pr_debug("ctl=0x%x", map->ctl);
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/linux-master/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_cfg.c33 .ctl = {
122 .ctl = {
203 .ctl = {
298 .ctl = {
390 .ctl = {
462 .ctl = {
550 .ctl = {
635 .ctl = {
748 .ctl = {
843 .ctl
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/linux-master/arch/arm64/kvm/
H A Dtrace_arm.h262 __field( unsigned long, ctl )
268 __entry->ctl = timer_get_ctl(ctx);
274 __entry->ctl,
284 __field( unsigned long, ctl )
290 __entry->ctl = timer_get_ctl(ctx);
296 __entry->ctl,

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