/freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86TargetTransformInfo.cpp | 3045 (ISD == ISD::SINT_TO_FP) ? Instruction::SExt : Instruction::ZExt; 4730 Instruction::SExt, /*Dst=*/PromSrcVecTy, /*Src=*/SrcVecTy, 5596 case Instruction::SExt:
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/freebsd-current/contrib/llvm-project/llvm/lib/Bitcode/Writer/ |
H A D | BitcodeWriter.cpp | 571 case Instruction::SExt : return bitc::CAST_SEXT; 781 case Attribute::SExt:
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/freebsd-current/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAndOrXor.cpp | 2472 auto *SExt = Builder.CreateSExt(X, Ty, X->getName() + ".signext"); local 2481 return BinaryOperator::CreateAnd(SExt, SanitizedSignMask);
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H A D | InstCombineMulDivRem.cpp | 441 return CastInst::Create(Instruction::SExt, And, Ty);
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H A D | InstCombineAddSub.cpp | 929 return CastInst::Create(Instruction::SExt, X, Ty);
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H A D | InstructionCombining.cpp | 2068 CastInst::CastOps CastOpc = IsSext ? Instruction::SExt : Instruction::ZExt;
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/freebsd-current/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGCall.cpp | 2579 RetAttrs.addAttribute(llvm::Attribute::SExt); 2720 Attrs.addAttribute(llvm::Attribute::SExt);
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/freebsd-current/contrib/llvm-project/llvm/lib/ExecutionEngine/Interpreter/ |
H A D | Execution.cpp | 2024 case Instruction::SExt:
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMTargetTransformInfo.cpp | 507 Opcode == Instruction::SExt)) ||
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/freebsd-current/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | NewGVN.cpp | 2026 case Instruction::SExt:
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H A D | GVN.cpp | 638 case Instruction::SExt:
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/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.cpp | 2204 if (F->getAttributes().hasRetAttr(Attribute::SExt)) 3667 // SExt cannot be a no-op cast because sizeof(src) < sizeof(dest). 3668 // SExt also can't be a cast to bool for same reason. So, nothing much to do 10262 Attrs.push_back(Attribute::SExt); 10980 if (Arg.hasAttribute(Attribute::SExt)) 11201 if (Arg.hasAttribute(Attribute::SExt))
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H A D | LegalizeIntegerTypes.cpp | 1684 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, Mul.getValueType(), local 1686 Overflow = DAG.getSetCC(DL, N->getValueType(1), SExt, Mul, ISD::SETNE);
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H A D | DAGCombiner.cpp | 4061 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, N1.getOperand(0)); local 4062 return DAG.getNode(ISD::ADD, DL, VT, N0, SExt); 13634 SDValue SExt = local 13636 SDValue NewAbs = DAG.getNode(ISD::ABS, SDLoc(Abs), LegalVT, SExt); [all...] |
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 2053 case CCValAssign::SExt: 3014 case CCValAssign::SExt: 3126 case CCValAssign::SExt: 3210 case CCValAssign::SExt: 3686 case CCValAssign::SExt:
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 13071 /// SExt. If \p SExt is std::nullopt, this returns the source of this operand. 13075 std::optional<bool> SExt) const { 13076 if (!SExt.has_value()) 13085 unsigned ExtOpc = *SExt ? RISCVISD::VSEXT_VL : RISCVISD::VZEXT_VL; 14363 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, MVT::i64, In, local 14366 return SExt; 14369 ISD::SHL, DL, MVT::i64, SExt,
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/freebsd-current/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | Instructions.h | 4932 return I->getOpcode() == SExt;
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 3646 SDValue SExt = local 3649 Cmp = emitComparison(SExt, DAG.getConstant(ValueofRHS, dl, 6781 case CCValAssign::SExt: 6842 case CCValAssign::SExt: 7771 case CCValAssign::SExt: 15218 if (Opcode == Instruction::SExt) 16947 /// SExt/ZExt rather than the scalar SExt/ZExt 17011 /// making use of the vector SExt/ZExt rather than the scalar SExt/ZEx [all...] |
/freebsd-current/contrib/llvm-project/llvm/lib/IR/ |
H A D | Verifier.cpp | 1905 Attrs.hasAttribute(Attribute::SExt)), 3124 Check(SrcTy->isIntOrIntVectorTy(), "SExt only operates on integer", &I); 3125 Check(DestTy->isIntOrIntVectorTy(), "SExt only produces an integer", &I); 3128 Check(SrcBitSize < DestBitSize, "Type too small for SExt", &I);
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 5282 case CCValAssign::SExt: 6801 LocInfo = ArgFlags.isSExt() ? CCValAssign::LocInfo::SExt 7533 case CCValAssign::SExt: 7728 case CCValAssign::SExt:
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H A D | PPCInstrInfo.cpp | 5221 // We check the ZExt/SExt flags for a method parameter. 5239 // For a method return value, we check the ZExt/SExt flags in attribute. 5263 IsSExt |= Attrs.hasAttribute(Attribute::SExt);
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 1458 if (VA.getLocInfo() == CCValAssign::SExt) 1485 case CCValAssign::SExt:
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/freebsd-current/contrib/llvm-project/llvm/lib/Frontend/OpenMP/ |
H A D | OMPIRBuilder.cpp | 534 bool HasSignExt = AS.hasAttribute(Attribute::SExt);
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/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 500 CallerAttrs.hasRetAttr(Attribute::SExt))
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/freebsd-current/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | InstructionSimplify.cpp | 3937 ConstantFoldCastOperand(CastInst::SExt, Trunc, DstTy, Q.DL);
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