Searched refs:SExt (Results 101 - 125 of 128) sorted by relevance

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/freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp3045 (ISD == ISD::SINT_TO_FP) ? Instruction::SExt : Instruction::ZExt;
4730 Instruction::SExt, /*Dst=*/PromSrcVecTy, /*Src=*/SrcVecTy,
5596 case Instruction::SExt:
/freebsd-current/contrib/llvm-project/llvm/lib/Bitcode/Writer/
H A DBitcodeWriter.cpp571 case Instruction::SExt : return bitc::CAST_SEXT;
781 case Attribute::SExt:
/freebsd-current/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineAndOrXor.cpp2472 auto *SExt = Builder.CreateSExt(X, Ty, X->getName() + ".signext"); local
2481 return BinaryOperator::CreateAnd(SExt, SanitizedSignMask);
H A DInstCombineMulDivRem.cpp441 return CastInst::Create(Instruction::SExt, And, Ty);
H A DInstCombineAddSub.cpp929 return CastInst::Create(Instruction::SExt, X, Ty);
H A DInstructionCombining.cpp2068 CastInst::CastOps CastOpc = IsSext ? Instruction::SExt : Instruction::ZExt;
/freebsd-current/contrib/llvm-project/clang/lib/CodeGen/
H A DCGCall.cpp2579 RetAttrs.addAttribute(llvm::Attribute::SExt);
2720 Attrs.addAttribute(llvm::Attribute::SExt);
/freebsd-current/contrib/llvm-project/llvm/lib/ExecutionEngine/Interpreter/
H A DExecution.cpp2024 case Instruction::SExt:
/freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp507 Opcode == Instruction::SExt)) ||
/freebsd-current/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DNewGVN.cpp2026 case Instruction::SExt:
H A DGVN.cpp638 case Instruction::SExt:
/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp2204 if (F->getAttributes().hasRetAttr(Attribute::SExt))
3667 // SExt cannot be a no-op cast because sizeof(src) < sizeof(dest).
3668 // SExt also can't be a cast to bool for same reason. So, nothing much to do
10262 Attrs.push_back(Attribute::SExt);
10980 if (Arg.hasAttribute(Attribute::SExt))
11201 if (Arg.hasAttribute(Attribute::SExt))
H A DLegalizeIntegerTypes.cpp1684 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, Mul.getValueType(), local
1686 Overflow = DAG.getSetCC(DL, N->getValueType(1), SExt, Mul, ISD::SETNE);
H A DDAGCombiner.cpp4061 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, N1.getOperand(0)); local
4062 return DAG.getNode(ISD::ADD, DL, VT, N0, SExt);
13634 SDValue SExt = local
13636 SDValue NewAbs = DAG.getNode(ISD::ABS, SDLoc(Abs), LegalVT, SExt);
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp2053 case CCValAssign::SExt:
3014 case CCValAssign::SExt:
3126 case CCValAssign::SExt:
3210 case CCValAssign::SExt:
3686 case CCValAssign::SExt:
/freebsd-current/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp13071 /// SExt. If \p SExt is std::nullopt, this returns the source of this operand.
13075 std::optional<bool> SExt) const {
13076 if (!SExt.has_value())
13085 unsigned ExtOpc = *SExt ? RISCVISD::VSEXT_VL : RISCVISD::VZEXT_VL;
14363 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, MVT::i64, In, local
14366 return SExt;
14369 ISD::SHL, DL, MVT::i64, SExt,
/freebsd-current/contrib/llvm-project/llvm/include/llvm/IR/
H A DInstructions.h4932 return I->getOpcode() == SExt;
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp3646 SDValue SExt = local
3649 Cmp = emitComparison(SExt, DAG.getConstant(ValueofRHS, dl,
6781 case CCValAssign::SExt:
6842 case CCValAssign::SExt:
7771 case CCValAssign::SExt:
15218 if (Opcode == Instruction::SExt)
16947 /// SExt/ZExt rather than the scalar SExt/ZExt
17011 /// making use of the vector SExt/ZExt rather than the scalar SExt/ZEx
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/IR/
H A DVerifier.cpp1905 Attrs.hasAttribute(Attribute::SExt)),
3124 Check(SrcTy->isIntOrIntVectorTy(), "SExt only operates on integer", &I);
3125 Check(DestTy->isIntOrIntVectorTy(), "SExt only produces an integer", &I);
3128 Check(SrcBitSize < DestBitSize, "Type too small for SExt", &I);
/freebsd-current/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp5282 case CCValAssign::SExt:
6801 LocInfo = ArgFlags.isSExt() ? CCValAssign::LocInfo::SExt
7533 case CCValAssign::SExt:
7728 case CCValAssign::SExt:
H A DPPCInstrInfo.cpp5221 // We check the ZExt/SExt flags for a method parameter.
5239 // For a method return value, we check the ZExt/SExt flags in attribute.
5263 IsSExt |= Attrs.hasAttribute(Attribute::SExt);
/freebsd-current/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1458 if (VA.getLocInfo() == CCValAssign::SExt)
1485 case CCValAssign::SExt:
/freebsd-current/contrib/llvm-project/llvm/lib/Frontend/OpenMP/
H A DOMPIRBuilder.cpp534 bool HasSignExt = AS.hasAttribute(Attribute::SExt);
/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp500 CallerAttrs.hasRetAttr(Attribute::SExt))
/freebsd-current/contrib/llvm-project/llvm/lib/Analysis/
H A DInstructionSimplify.cpp3937 ConstantFoldCastOperand(CastInst::SExt, Trunc, DstTy, Q.DL);

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