Searched refs:BitVector (Results 226 - 250 of 285) sorted by relevance
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/freebsd-current/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | RDFGraph.h | 908 BitVector ReservedRegs;
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/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | RegAllocPBQP.cpp | 34 #include "llvm/ADT/BitVector.h" 620 BitVector RegMaskOverlaps;
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H A D | EarlyIfConversion.cpp | 18 #include "llvm/ADT/BitVector.h" 131 BitVector ClobberedRegUnits;
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H A D | ModuloSchedule.cpp | 1739 BitVector LS(Schedule.getNumStages(), true); 1740 BitVector AS(Schedule.getNumStages(), true);
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H A D | RDFGraph.cpp | 11 #include "llvm/ADT/BitVector.h" 1285 BitVector DoneDefs(TRI.getNumRegs()); 1314 BitVector DoneClobbers(TRI.getNumRegs());
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H A D | MachineFunction.cpp | 16 #include "llvm/ADT/BitVector.h" 138 for (BitVector::size_type I = 0; I < Properties.size(); ++I) {
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H A D | MachineVerifier.cpp | 23 #include "llvm/ADT/BitVector.h" 129 BitVector regsReserved; 825 BitVector PR = MFI.getPristineRegs(*MF); 2757 // SmallVector, which is a lot cheaper compared to DenseSet or BitVector). 2782 BitVector Sparse;
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/freebsd-current/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGStmt.cpp | 2355 const llvm::BitVector &ResultTypeRequiresCast, 2356 const llvm::BitVector &ResultRegIsFlagReg) { 2504 llvm::BitVector ResultTypeRequiresCast; 2505 llvm::BitVector ResultRegIsFlagReg;
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/freebsd-current/contrib/llvm-project/clang/include/clang/Serialization/ |
H A D | ASTWriter.h | 460 llvm::BitVector IsSLocAffecting;
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/freebsd-current/contrib/llvm-project/clang/lib/Tooling/DependencyScanning/ |
H A D | ModuleDepCollector.cpp | 39 llvm::BitVector SearchPathUsage(Entries.size());
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86DomainReassignment.cpp | 18 #include "llvm/ADT/BitVector.h" 377 BitVector EnclosedEdges{8, false};
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H A D | X86FrameLowering.cpp | 559 void X86FrameLowering::emitZeroCallUsedRegs(BitVector RegsToZero, 588 BitVector GPRsToZero(TRI->getNumRegs()); 3084 BitVector &SavedRegs,
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineFunctionInfo.cpp | 469 BitVector OtherUsedRegs;
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H A D | AMDGPULowerModuleLDSPass.cpp | 183 #include "llvm/ADT/BitVector.h" 1401 BitVector IsPaddingField;
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H A D | SIRegisterInfo.cpp | 383 void SIRegisterInfo::reserveRegisterTuples(BitVector &Reserved, 563 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const { 564 BitVector Reserved(getNumRegs());
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H A D | R600InstrInfo.cpp | 1063 void R600InstrInfo::reserveIndirectRegisters(BitVector &Reserved,
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/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
H A D | InstrRefBasedImpl.h | 1123 BitVector CalleeSavedRegs;
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/freebsd-current/contrib/llvm-project/llvm/tools/llvm-lto/ |
H A D | llvm-lto.cpp | 270 BitVector CanBeHidden;
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/freebsd-current/contrib/llvm-project/llvm/lib/Transforms/Coroutines/ |
H A D | CoroFrame.cpp | 18 #include "llvm/ADT/BitVector.h" 96 BitVector Consumes; 97 BitVector Kills; 124 void dump(StringRef Label, BitVector const &BV) const; 208 BitVector const &BV) const {
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/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LoadStoreOpt.cpp | 942 BitVector LegalSizes(MaxStoreSizeToForm * 2);
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.cpp | 20 #include "llvm/ADT/BitVector.h" 354 BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const { 355 BitVector Reserved(getNumRegs());
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/freebsd-current/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | LoopRerollPass.cpp | 14 #include "llvm/ADT/BitVector.h" 388 using UsesTy = MapVector<Instruction *, BitVector>;
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64FrameLowering.cpp | 940 void AArch64FrameLowering::emitZeroCallUsedRegs(BitVector RegsToZero, 954 BitVector GPRsToZero(TRI.getNumRegs()); 955 BitVector FPRsToZero(TRI.getNumRegs()); 3227 BitVector &SavedRegs,
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMFrameLowering.cpp | 119 #include "llvm/ADT/BitVector.h" 2172 checkNumAlignedDPRCS2Regs(MachineFunction &MF, BitVector &SavedRegs) { 2263 BitVector &SavedRegs, 2815 BitVector &SavedRegs) const {
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonVLIWPacketizer.cpp | 24 #include "llvm/ADT/BitVector.h" 1216 BitVector DeadDefs(Hexagon::NUM_TARGET_REGS);
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