Searched refs:u64 (Results 26 - 50 of 423) sorted by relevance

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/freebsd-9.3-release/sys/contrib/octeon-sdk/
H A Dcvmx-helper-sgmii.c105 gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
107 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
112 pcsx_miscx_ctl_reg.u64 = cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
113 pcsx_linkx_timer_count_reg.u64 = cvmx_read_csr(CVMX_PCSX_LINKX_TIMER_COUNT_REG(index, interface));
124 cvmx_write_csr(CVMX_PCSX_LINKX_TIMER_COUNT_REG(index, interface), pcsx_linkx_timer_count_reg.u64);
136 pcsx_anx_adv_reg.u64 = cvmx_read_csr(CVMX_PCSX_ANX_ADV_REG(index, interface));
141 cvmx_write_csr(CVMX_PCSX_ANX_ADV_REG(index, interface), pcsx_anx_adv_reg.u64);
149 pcsx_sgmx_an_adv_reg.u64 = cvmx_read_csr(CVMX_PCSX_SGMX_AN_ADV_REG(index, interface));
153 cvmx_write_csr(CVMX_PCSX_SGMX_AN_ADV_REG(index, interface), pcsx_sgmx_an_adv_reg.u64);
183 control_reg.u64
[all...]
H A Dcvmx-helper-jtag.c85 jtgc.u64 = 0;
94 cvmx_write_csr(CVMX_CIU_QLM_JTGC, jtgc.u64);
119 jtgc.u64 = cvmx_read_csr(CVMX_CIU_QLM_JTGC);
123 cvmx_write_csr(CVMX_CIU_QLM_JTGC, jtgc.u64);
126 jtgd.u64 = 0;
132 cvmx_write_csr(CVMX_CIU_QLM_JTGD, jtgd.u64);
135 jtgd.u64 = cvmx_read_csr(CVMX_CIU_QLM_JTGD);
176 jtgc.u64 = cvmx_read_csr(CVMX_CIU_QLM_JTGC);
181 cvmx_write_csr(CVMX_CIU_QLM_JTGC, jtgc.u64);
185 jtgd.u64
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H A Dcvmx-dma-engine.c102 dmax_ibuff_saddr.u64 = 0;
104 cvmx_write_csr(CVMX_PEXP_NPEI_DMAX_IBUFF_SADDR(engine), dmax_ibuff_saddr.u64);
109 dpi_dmax_ibuff_saddr.u64 = 0;
112 cvmx_write_csr(CVMX_DPI_DMAX_IBUFF_SADDR(engine), dpi_dmax_ibuff_saddr.u64);
127 dma_control.u64 = 0;
139 cvmx_write_csr(CVMX_PEXP_NPEI_DMA_CONTROL, dma_control.u64);
148 pcie_req_num.u64 = cvmx_read_csr(CVMX_PEXP_NPEI_DMA_PCIE_REQ_NUM);
150 cvmx_write_csr(CVMX_PEXP_NPEI_DMA_PCIE_REQ_NUM, pcie_req_num.u64);
161 dpi_engx_buf.u64 = 0;
163 cvmx_write_csr(CVMX_DPI_ENGX_BUF(0), dpi_engx_buf.u64);
[all...]
H A Dcvmx-helper-loop.c99 port_cfg.u64 = cvmx_read_csr(CVMX_PIP_PRT_CFGX(ipd_port));
102 cvmx_write_csr(CVMX_PIP_PRT_CFGX(ipd_port), port_cfg.u64);
106 ipd_sub_port_fcs.u64 = cvmx_read_csr(CVMX_IPD_SUB_PORT_FCS);
108 cvmx_write_csr(CVMX_IPD_SUB_PORT_FCS, ipd_sub_port_fcs.u64);
H A Dcvmx-key.h78 ptr.u64 = 0;
84 return cvmx_read_csr(ptr.u64);
99 ptr.u64 = 0;
105 cvmx_write_io(ptr.u64, value);
H A Dcvmx-rng.h69 uint64_t u64; member in union:__anon6599
85 rnm_ctl_status.u64 = cvmx_read_csr(CVMX_RNM_CTL_STATUS);
88 cvmx_write_csr(CVMX_RNM_CTL_STATUS, rnm_ctl_status.u64);
156 cvmx_send_single(data.u64);
H A Dcvmx-spi.c236 spxx_int_msk.u64 = cvmx_read_csr(CVMX_SPXX_INT_MSK(interface));
238 stxx_int_msk.u64 = cvmx_read_csr(CVMX_STXX_INT_MSK(interface));
244 spxx_clk_ctl.u64 = 0;
246 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64);
248 spxx_bist_stat.u64 = cvmx_read_csr(CVMX_SPXX_BIST_STAT(interface));
262 srxx_spi4_calx.u64 = 0;
264 cvmx_write_csr(CVMX_SRXX_SPI4_CALX(index, interface), srxx_spi4_calx.u64);
266 stxx_spi4_calx.u64 = 0;
268 cvmx_write_csr(CVMX_STXX_SPI4_CALX(index, interface), stxx_spi4_calx.u64);
273 cvmx_write_csr(CVMX_SPXX_INT_MSK(interface), spxx_int_msk.u64);
[all...]
H A Dcvmx-fpa.h72 uint64_t u64; member in union:__anon6441
145 status.u64 = cvmx_read_csr(CVMX_FPA_CTL_STATUS);
151 status.u64 = 0;
153 cvmx_write_csr(CVMX_FPA_CTL_STATUS, status.u64);
164 status.u64 = cvmx_read_csr(CVMX_FPA_CTL_STATUS);
166 cvmx_write_csr(CVMX_FPA_CTL_STATUS, status.u64);
214 cvmx_send_single(data.u64);
253 newptr.u64 = cvmx_ptr_to_phys(ptr);
257 cvmx_write_io(newptr.u64, num_cache_lines);
272 newptr.u64
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H A Dcvmx-pcie.c107 pcie_addr.u64 = 0;
114 return pcie_addr.u64;
143 pcie_addr.u64 = 0;
148 return pcie_addr.u64;
205 npei_ctl_status2.u64 = cvmx_read_csr(CVMX_PEXP_NPEI_CTL_STATUS2);
213 cvmx_write_csr(CVMX_PEXP_NPEI_CTL_STATUS2, npei_ctl_status2.u64);
221 prt_cfg.u64 = cvmx_read_csr(CVMX_DPI_SLI_PRTX_CFG(pcie_port));
224 cvmx_write_csr(CVMX_DPI_SLI_PRTX_CFG(pcie_port), prt_cfg.u64);
226 sli_s2m_portx_ctl.u64 = cvmx_read_csr(CVMX_PEXP_SLI_S2M_PORTX_CTL(pcie_port));
228 cvmx_write_csr(CVMX_PEXP_SLI_S2M_PORTX_CTL(pcie_port), sli_s2m_portx_ctl.u64);
[all...]
H A Dcvmx-higig.h331 pip_prt_cfg.u64 = cvmx_read_csr(CVMX_PIP_PRT_CFGX(interface*16));
336 cvmx_write_csr(CVMX_PIP_PRT_CFGX(interface*16), pip_prt_cfg.u64);
342 pip_hg_pri_qos.u64 = 0;
346 cvmx_write_csr(CVMX_PIP_HG_PRI_QOS, pip_hg_pri_qos.u64);
350 gmx_rx_udd_skp.u64 = cvmx_read_csr(CVMX_GMXX_RXX_UDD_SKP(0, interface));
353 cvmx_write_csr(CVMX_GMXX_RXX_UDD_SKP(0, interface), gmx_rx_udd_skp.u64);
356 gmx_rx_frm_ctl.u64 = cvmx_read_csr(CVMX_GMXX_RXX_FRM_CTL(0, interface));
358 cvmx_write_csr(CVMX_GMXX_RXX_FRM_CTL(0, interface), gmx_rx_frm_ctl.u64);
361 gmx_tx_min_pkt.u64 = cvmx_read_csr(CVMX_GMXX_TXX_MIN_PKT(0, interface));
363 cvmx_write_csr(CVMX_GMXX_TXX_MIN_PKT(0, interface), gmx_tx_min_pkt.u64);
[all...]
H A Dcvmx-raid.c73 cvmx_write_csr(CVMX_RAD_REG_POLYNOMIAL, polynomial.u64);
81 rad_reg_cmd_buf.u64 = 0;
86 cvmx_write_csr(CVMX_RAD_REG_CMD_BUF, rad_reg_cmd_buf.u64);
107 rad_reg_ctl.u64 = cvmx_read_csr(CVMX_RAD_REG_CTL);
109 cvmx_write_csr(CVMX_RAD_REG_CTL, rad_reg_ctl.u64);
H A Dcvmx-mdio.h329 smi_clk.u64 = cvmx_read_csr(CVMX_SMIX_CLK(bus_id));
332 cvmx_write_csr(CVMX_SMIX_CLK(bus_id), smi_clk.u64);
339 smi_clk.u64 = cvmx_read_csr(CVMX_SMIX_CLK(bus_id));
341 cvmx_write_csr(CVMX_SMIX_CLK(bus_id), smi_clk.u64);
362 smi_rd.u64 = cvmx_read_csr(CVMX_SMIX_RD_DAT(bus_id));
403 smi_cmd.u64 = 0;
407 cvmx_write_csr(CVMX_SMIX_CMD(bus_id), smi_cmd.u64);
455 smi_wr.u64 = 0;
457 cvmx_write_csr(CVMX_SMIX_WR_DAT(bus_id), smi_wr.u64);
459 smi_cmd.u64
[all...]
H A Dcvmx-llm.h78 uint64_t u64; member in union:__anon6476
92 uint64_t u64; member in union:__anon6478
234 CVMX_MT_LLM_DATA(1, data.u64);
235 CVMX_MT_LLM_WRITE_ADDR_INTERNAL(1, address.u64);
239 CVMX_MT_LLM_DATA(0, data.u64);
240 CVMX_MT_LLM_WRITE_ADDR_INTERNAL(0, address.u64);
261 CVMX_MT_LLM_WRITE64_ADDR_INTERNAL(1, address.u64);
266 CVMX_MT_LLM_WRITE64_ADDR_INTERNAL(0, address.u64);
287 CVMX_MT_LLM_READ_ADDR(1, address.u64);
288 CVMX_MF_LLM_DATA(1, value.u64);
[all...]
/freebsd-9.3-release/sys/dev/vxge/include/
H A Dvxgehal-stats.h634 /* 0x000 */ u64 tx_frms;
635 /* 0x008 */ u64 tx_data_octets;
636 /* 0x010 */ u64 tx_mcast_frms;
637 /* 0x018 */ u64 tx_bcast_frms;
638 /* 0x020 */ u64 tx_discarded_frms;
639 /* 0x028 */ u64 tx_errored_frms;
640 /* 0x030 */ u64 rx_frms;
641 /* 0x038 */ u64 rx_data_octets;
642 /* 0x040 */ u64 rx_mcast_frms;
643 /* 0x048 */ u64 rx_bcast_frm
[all...]
/freebsd-9.3-release/sys/contrib/rdma/
H A Dib_fmr_pool.h78 u64 io_virtual_address;
80 u64 page_list[0];
91 u64 *page_list,
93 u64 io_virtual_address);
/freebsd-9.3-release/sys/ofed/include/rdma/
H A Dib_fmr_pool.h74 u64 io_virtual_address;
76 u64 page_list[0];
87 u64 *page_list,
89 u64 io_virtual_address);
/freebsd-9.3-release/sys/dev/e1000/
H A De1000_hw.h357 #define __le64 u64
497 u64 crcerrs;
498 u64 algnerrc;
499 u64 symerrs;
500 u64 rxerrc;
501 u64 mpc;
502 u64 scc;
503 u64 ecol;
504 u64 mcc;
505 u64 lateco
[all...]
H A De1000_vf.h84 u64 pkt_addr; /* Packet buffer address */
85 u64 hdr_addr; /* Header buffer address */
120 u64 buffer_addr; /* Address of descriptor's data buf */
125 u64 rsvd; /* Reserved */
164 u64 base_gprc;
165 u64 base_gptc;
166 u64 base_gorc;
167 u64 base_gotc;
168 u64 base_mprc;
169 u64 base_gotlb
[all...]
/freebsd-9.3-release/sys/dev/nxge/
H A Dif_nxge.h106 #define XGE_DEFAULT_FIFO_ALIGNMENT_SIZE sizeof(u64)
218 u64 isr_filter;
219 u64 isr_line;
220 u64 isr_msi;
223 u64 tx_calls;
224 u64 tx_completions;
225 u64 tx_desc_compl;
226 u64 tx_tcode;
227 u64 tx_defrag;
228 u64 tx_no_tx
[all...]
/freebsd-9.3-release/sys/mips/cavium/octe/
H A Dethernet-mdio.c66 smi_cmd.u64 = 0;
70 cvmx_write_csr(CVMX_SMI_CMD, smi_cmd.u64);
73 smi_rd.u64 = cvmx_read_csr(CVMX_SMI_RD_DAT);
99 smi_wr.u64 = 0;
101 cvmx_write_csr(CVMX_SMI_WR_DAT, smi_wr.u64);
103 smi_cmd.u64 = 0;
107 cvmx_write_csr(CVMX_SMI_CMD, smi_cmd.u64);
110 smi_wr.u64 = cvmx_read_csr(CVMX_SMI_WR_DAT);
/freebsd-9.3-release/sys/dev/cxgbe/common/
H A Dcommon.h76 u64 tx_octets; /* total # of octets in good frames */
77 u64 tx_frames; /* all good frames */
78 u64 tx_bcast_frames; /* all broadcast frames */
79 u64 tx_mcast_frames; /* all multicast frames */
80 u64 tx_ucast_frames; /* all unicast frames */
81 u64 tx_error_frames; /* all error frames */
83 u64 tx_frames_64; /* # of Tx frames in a particular range */
84 u64 tx_frames_65_127;
85 u64 tx_frames_128_255;
86 u64 tx_frames_256_51
[all...]
/freebsd-9.3-release/sys/ofed/drivers/infiniband/hw/mthca/
H A Dmthca_doorbell.h56 __raw_writeq((__force u64) val, dest);
62 __raw_writeq((__force u64) cpu_to_be64((u64) hi << 32 | lo), dest);
67 *(u64 *) db = *(u64 *) val;
H A Dmthca_cmd.h182 u64 max_icm_sz;
196 u64 qpc_base;
197 u64 eec_base;
198 u64 srqc_base;
199 u64 cqc_base;
200 u64 eqpc_base;
201 u64 eeec_base;
202 u64 eqc_base;
203 u64 rdb_base;
204 u64 mc_bas
[all...]
/freebsd-9.3-release/contrib/wpa/src/utils/
H A Dcommon.h102 typedef UINT64 u64; typedef
114 typedef unsigned long long u64; typedef
127 typedef unsigned long long u64; typedef
133 typedef unsigned long u64; typedef
144 typedef TUint64 u64; typedef
157 typedef uint64_t u64; typedef
220 #define le_to_host64(n) ((__force u64) (le64) (n))
221 #define host_to_le64(n) ((__force le64) (u64) (n))
222 #define be_to_host64(n) bswap_64((__force u64) (be64) (n))
292 #define WPA_GET_BE64(a) ((((u64) (
[all...]
/freebsd-9.3-release/sys/dev/nxge/include/
H A Dxgehal-types.h44 #define vBIT(val, loc, sz) (((u64)(val)) << (64-(loc)-(sz)))
50 #define bVAL1(bits, loc) ((((u64)bits) >> (64-(loc+1))) & 0x1)
51 #define bVAL2(bits, loc) ((((u64)bits) >> (64-(loc+2))) & 0x3)
52 #define bVAL3(bits, loc) ((((u64)bits) >> (64-(loc+3))) & 0x7)
53 #define bVAL4(bits, loc) ((((u64)bits) >> (64-(loc+4))) & 0xF)
54 #define bVAL5(bits, loc) ((((u64)bits) >> (64-(loc+5))) & 0x1F)
55 #define bVAL6(bits, loc) ((((u64)bits) >> (64-(loc+6))) & 0x3F)
56 #define bVAL7(bits, loc) ((((u64)bits) >> (64-(loc+7))) & 0x7F)
57 #define bVAL8(bits, loc) ((((u64)bits) >> (64-(loc+8))) & 0xFF)
58 #define bVAL12(bits, loc) ((((u64)bit
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