1/***********************license start*************** 2 * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights 3 * reserved. 4 * 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 13 * * Redistributions in binary form must reproduce the above 14 * copyright notice, this list of conditions and the following 15 * disclaimer in the documentation and/or other materials provided 16 * with the distribution. 17 18 * * Neither the name of Cavium Networks nor the names of 19 * its contributors may be used to endorse or promote products 20 * derived from this software without specific prior written 21 * permission. 22 23 * This Software, including technical data, may be subject to U.S. export control 24 * laws, including the U.S. Export Administration Act and its associated 25 * regulations, and may be subject to export or import regulations in other 26 * countries. 27 28 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29 * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR 30 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31 * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32 * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34 * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35 * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36 * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38 ***********************license end**************************************/ 39 40 41 42 43 44 45 46/** 47 * @file 48 * 49 * Function and structure definitions for random number generator hardware 50 * 51 * <hr>$Revision: 49448 $<hr> 52 */ 53 54 55#ifndef __CMVX_RNG_H__ 56#define __CMVX_RNG_H__ 57 58#ifdef __cplusplus 59extern "C" { 60#endif 61 62#define CVMX_RNG_LOAD_ADDRESS CVMX_ADD_IO_SEG(cvmx_build_io_address(CVMX_OCT_DID_RNG, 0)) 63 64/** 65 * Structure describing the data format used for IOBDMA stores to the RNG. 66 */ 67typedef union 68{ 69 uint64_t u64; 70 struct { 71 uint64_t scraddr : 8; /**< the (64-bit word) location in scratchpad to write to (if len != 0) */ 72 uint64_t len : 8; /**< the number of words in the response (0 => no response) */ 73 uint64_t did : 5; /**< the ID of the device on the non-coherent bus */ 74 uint64_t subdid : 3; /**< the sub ID of the device on the non-coherent bus */ 75 uint64_t addr :40; /**< the address that will appear in the first tick on the NCB bus */ 76 } s; 77} cvmx_rng_iobdma_data_t; 78 79/** 80 * Enables the random number generator. Must be called before RNG is used 81 */ 82static inline void cvmx_rng_enable(void) 83{ 84 cvmx_rnm_ctl_status_t rnm_ctl_status; 85 rnm_ctl_status.u64 = cvmx_read_csr(CVMX_RNM_CTL_STATUS); 86 rnm_ctl_status.s.ent_en = 1; 87 rnm_ctl_status.s.rng_en = 1; 88 cvmx_write_csr(CVMX_RNM_CTL_STATUS, rnm_ctl_status.u64); 89} 90/** 91 * Reads 8 bits of random data from Random number generator 92 * 93 * @return random data 94 */ 95static inline uint8_t cvmx_rng_get_random8(void) 96{ 97 return cvmx_read64_uint8(CVMX_RNG_LOAD_ADDRESS); 98} 99 100/** 101 * Reads 16 bits of random data from Random number generator 102 * 103 * @return random data 104 */ 105static inline uint16_t cvmx_rng_get_random16(void) 106{ 107 return cvmx_read64_uint16(CVMX_RNG_LOAD_ADDRESS); 108} 109 110/** 111 * Reads 32 bits of random data from Random number generator 112 * 113 * @return random data 114 */ 115static inline uint32_t cvmx_rng_get_random32(void) 116{ 117 return cvmx_read64_uint32(CVMX_RNG_LOAD_ADDRESS); 118} 119 120/** 121 * Reads 64 bits of random data from Random number generator 122 * 123 * @return random data 124 */ 125static inline uint64_t cvmx_rng_get_random64(void) 126{ 127 return cvmx_read64_uint64(CVMX_RNG_LOAD_ADDRESS); 128} 129 130/** 131 * Requests random data from the RNG block asynchronously using and IOBDMA operation. 132 * The random data will be written into the cores 133 * local memory at the specified address. A SYNCIOBDMA 134 * operation should be issued to stall for completion of the write. 135 * 136 * @param scr_addr Address in scratch memory to put the result 137 * MUST be a multiple of 8 bytes 138 * @param num_bytes Number of bytes of random data to write at 139 * scr_addr 140 * MUST be a multiple of 8 bytes 141 * 142 * @return 0 on success 143 * 1 on error 144 */ 145static inline int cvmx_rng_request_random_async(uint64_t scr_addr, uint64_t num_bytes) 146{ 147 cvmx_rng_iobdma_data_t data; 148 149 if (num_bytes & 0x7 || scr_addr & 0x7) 150 return(1); 151 152 /* scr_addr must be 8 byte aligned */ 153 data.s.scraddr = scr_addr >> 3; 154 data.s.len = num_bytes >> 3; 155 data.s.did = CVMX_OCT_DID_RNG; 156 cvmx_send_single(data.u64); 157 return(0); 158} 159 160#ifdef __cplusplus 161} 162#endif 163 164#endif /* __CMVX_RNG_H__ */ 165