1/*- 2 * Copyright(c) 2002-2011 Exar Corp. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification are permitted provided the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Exar Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31/*$FreeBSD$*/ 32 33#ifndef VXGE_HAL_STATS_H 34#define VXGE_HAL_STATS_H 35 36__EXTERN_BEGIN_DECLS 37 38#define VXGE_HAL_STATS_OP_READ 0 39#define VXGE_HAL_STATS_OP_CLEAR_STAT 1 40#define VXGE_HAL_STATS_OP_CLEAR_ALL_VPATH_STATS 2 41#define VXGE_HAL_STATS_OP_CLEAR_ALL_STATS_OF_LOC 2 42#define VXGE_HAL_STATS_OP_CLEAR_ALL_STATS 3 43 44#define VXGE_HAL_STATS_LOC_VPATH(n) n 45#define VXGE_HAL_STATS_LOC_AGGR 17 46#define VXGE_HAL_STATS_LOC_PORT 17 47 48#define VXGE_HAL_STATS_AGGRn_TX_FRMS_OFFSET(n) ((0x720+(104*n))>>3) 49#define VXGE_HAL_STATS_GET_AGGRn_TX_FRMS(bits) bits 50 51#define VXGE_HAL_STATS_AGGRn_TX_DATA_OCTETS_OFFSET(n) ((0x728+(104*n))>>3) 52#define VXGE_HAL_STATS_GET_AGGRn_TX_DATA_OCTETS(bits) bits 53 54#define VXGE_HAL_STATS_AGGRn_TX_MCAST_FRMS_OFFSET(n) ((0x730+(104*n))>>3) 55#define VXGE_HAL_STATS_GET_AGGRn_TX_MCAST_FRMS(bits) bits 56 57#define VXGE_HAL_STATS_AGGRn_TX_BCAST_FRMS_OFFSET(n) ((0x738+(104*n))>>3) 58#define VXGE_HAL_STATS_GET_AGGRn_TX_BCAST_FRMS(bits) bits 59 60#define VXGE_HAL_STATS_AGGRn_TX_DISCARDED_FRMS_OFFSET(n) ((0x740+(104*n))>>3) 61#define VXGE_HAL_STATS_GET_AGGRn_TX_DISCARDED_FRMS(bits) bits 62 63#define VXGE_HAL_STATS_AGGRn_TX_ERRORED_FRMS_OFFSET(n) ((0x748+(104*n))>>3) 64#define VXGE_HAL_STATS_GET_AGGRn_TX_ERRORED_FRMS(bits) bits 65 66#define VXGE_HAL_STATS_AGGRn_RX_FRMS_OFFSET(n) ((0x750+(104*n))>>3) 67#define VXGE_HAL_STATS_GET_AGGRn_RX_FRMS(bits) bits 68 69#define VXGE_HAL_STATS_AGGRn_RX_DATA_OCTETS_OFFSET(n) ((0x758+(104*n))>>3) 70#define VXGE_HAL_STATS_GET_AGGRn_RX_DATA_OCTETS(bits) bits 71 72#define VXGE_HAL_STATS_AGGRn_RX_MCAST_FRMS_OFFSET(n) ((0x760+(104*n))>>3) 73#define VXGE_HAL_STATS_GET_AGGRn_RX_MCAST_FRMS(bits) bits 74 75#define VXGE_HAL_STATS_AGGRn_RX_BCAST_FRMS_OFFSET(n) ((0x768+(104*n))>>3) 76#define VXGE_HAL_STATS_GET_AGGRn_RX_BCAST_FRMS(bits) bits 77 78#define VXGE_HAL_STATS_AGGRn_RX_DISCARDED_FRMS_OFFSET(n) ((0x770+(104*n))>>3) 79#define VXGE_HAL_STATS_GET_AGGRn_RX_DISCARDED_FRMS(bits) bits 80 81#define VXGE_HAL_STATS_AGGRn_RX_ERRORED_FRMS_OFFSET(n) ((0x778+(104*n))>>3) 82#define VXGE_HAL_STATS_GET_AGGRn_RX_ERRORED_FRMS(bits) bits 83 84#define VXGE_HAL_STATS_AGGRn_RX_U_SLOW_PROTO_FRMS_OFFSET(n) ((0x780+(104*n))>>3) 85#define VXGE_HAL_STATS_GET_AGGRn_RX_U_SLOW_PROTO_FRMS(bits) bits 86 87#define VXGE_HAL_STATS_GLOBAL_PROG_EVENT_GNUM0_OFFSET (0x7f0>>3) 88#define VXGE_HAL_STATS_GET_GLOBAL_PROG_EVENT_GNUM0(bits) bits 89 90#define VXGE_HAL_STATS_GLOBAL_PROG_EVENT_GNUM1_OFFSET (0x7f8>>3) 91#define VXGE_HAL_STATS_GET_GLOBAL_PROG_EVENT_GNUM1(bits) bits 92 93#define VXGE_HAL_STATS_PORTn_TX_TTL_FRMS_OFFSET(n) ((0x000+(608*n))>>3) 94#define VXGE_HAL_STATS_GET_PORTn_TX_TTL_FRMS(bits) bits 95 96#define VXGE_HAL_STATS_PORTn_TX_TTL_OCTETS_OFFSET(n) ((0x008+(608*n))>>3) 97#define VXGE_HAL_STATS_GET_PORTn_TX_TTL_OCTETS(bits) bits 98 99#define VXGE_HAL_STATS_PORTn_TX_DATA_OCTETS_OFFSET(n) ((0x010+(608*n))>>3) 100#define VXGE_HAL_STATS_GET_PORTn_TX_DATA_OCTETS(bits) bits 101 102#define VXGE_HAL_STATS_PORTn_TX_MCAST_FRMS_OFFSET(n) ((0x018+(608*n))>>3) 103#define VXGE_HAL_STATS_GET_PORTn_TX_MCAST_FRMS(bits) bits 104 105#define VXGE_HAL_STATS_PORTn_TX_BCAST_FRMS_OFFSET(n) ((0x020+(608*n))>>3) 106#define VXGE_HAL_STATS_GET_PORTn_TX_BCAST_FRMS(bits) bits 107 108#define VXGE_HAL_STATS_PORTn_TX_UCAST_FRMS_OFFSET(n) ((0x028+(608*n))>>3) 109#define VXGE_HAL_STATS_GET_PORTn_TX_UCAST_FRMS(bits) bits 110 111#define VXGE_HAL_STATS_PORTn_TX_TAGGED_FRMS_OFFSET(n) ((0x030+(608*n))>>3) 112#define VXGE_HAL_STATS_GET_PORTn_TX_TAGGED_FRMS(bits) bits 113 114#define VXGE_HAL_STATS_PORTn_TX_VLD_IP_OFFSET(n) ((0x038+(608*n))>>3) 115#define VXGE_HAL_STATS_GET_PORTn_TX_VLD_IP(bits) bits 116 117#define VXGE_HAL_STATS_PORTn_TX_VLD_IP_OCTETS_OFFSET(n) ((0x040+(608*n))>>3) 118#define VXGE_HAL_STATS_GET_PORTn_TX_VLD_IP_OCTETS(bits) bits 119 120#define VXGE_HAL_STATS_PORTn_TX_ICMP_OFFSET(n) ((0x048+(608*n))>>3) 121#define VXGE_HAL_STATS_GET_PORTn_TX_ICMP(bits) bits 122 123#define VXGE_HAL_STATS_PORTn_TX_TCP_OFFSET(n) ((0x050+(608*n))>>3) 124#define VXGE_HAL_STATS_GET_PORTn_TX_TCP(bits) bits 125 126#define VXGE_HAL_STATS_PORTn_TX_RST_TCP_OFFSET(n) ((0x058+(608*n))>>3) 127#define VXGE_HAL_STATS_GET_PORTn_TX_RST_TCP(bits) bits 128 129#define VXGE_HAL_STATS_PORTn_TX_UDP_OFFSET(n) ((0x060+(608*n))>>3) 130#define VXGE_HAL_STATS_GET_PORTn_TX_UDP(bits) bits 131 132#define VXGE_HAL_STATS_PORTn_TX_UNKNOWN_PROTOCOL_OFFSET(n) ((0x068+(608*n))>>3) 133#define VXGE_HAL_STATS_GET_PORTn_TX_UNKNOWN_PROTOCOL(bits) bits 134 135#define VXGE_HAL_STATS_PORTn_TX_PARSE_ERROR_OFFSET(n) ((0x068+(608*n))>>3) 136#define VXGE_HAL_STATS_GET_PORTn_TX_PARSE_ERROR(bits) bits 137 138#define VXGE_HAL_STATS_PORTn_TX_PAUSE_CTRL_FRMS_OFFSET(n) ((0x070+(608*n))>>3) 139#define VXGE_HAL_STATS_GET_PORTn_TX_PAUSE_CTRL_FRMS(bits) bits 140 141#define VXGE_HAL_STATS_PORTn_TX_LACPDU_FRMS_OFFSET(n) ((0x078+(608*n))>>3) 142#define VXGE_HAL_STATS_GET_PORTn_TX_LACPDU_FRMS(bits) bits 143 144#define VXGE_HAL_STATS_PORTn_TX_MRKR_PDU_FRMS_OFFSET(n) ((0x078+(608*n))>>3) 145#define VXGE_HAL_STATS_GET_PORTn_TX_MRKR_PDU_FRMS(bits) bits 146 147#define VXGE_HAL_STATS_PORTn_TX_MRKR_RESP_PDU_FRMS_OFFSET(n)\ 148 ((0x080+(608*n))>>3) 149#define VXGE_HAL_STATS_GET_PORTn_TX_MRKR_RESP_PDU_FRMS(bits) bVAL32(bits, 0) 150 151#define VXGE_HAL_STATS_PORTn_TX_DROP_IP_OFFSET(n) ((0x080+(608*n))>>3) 152#define VXGE_HAL_STATS_GET_PORTn_TX_DROP_IP(bits) bVAL32(bits, 32) 153 154#define VXGE_HAL_STATS_PORTn_TX_XGMII_CHAR1_MATCH_OFFSET(n) ((0x088+(608*n))>>3) 155#define VXGE_HAL_STATS_GET_PORTn_TX_XGMII_CHAR1_MATCH(bits) bVAL32(bits, 0) 156 157#define VXGE_HAL_STATS_PORTn_TX_XGMII_CHAR2_MATCH_OFFSET(n) ((0x088+(608*n))>>3) 158#define VXGE_HAL_STATS_GET_PORTn_TX_XGMII_CHAR2_MATCH(bits) bVAL32(bits, 32) 159 160#define VXGE_HAL_STATS_PORTn_TX_XGMII_COL1_MATCH_OFFSET(n) ((0x090+(608*n))>>3) 161#define VXGE_HAL_STATS_GET_PORTn_TX_XGMII_COL1_MATCH(bits) bVAL32(bits, 0) 162 163#define VXGE_HAL_STATS_PORTn_TX_XGMII_COL2_MATCH_OFFSET(n) ((0x090+(608*n))>>3) 164#define VXGE_HAL_STATS_GET_PORTn_TX_XGMII_COL2_MATCH(bits) bVAL32(bits, 32) 165 166#define VXGE_HAL_STATS_PORTn_TX_DROP_FRMS_OFFSET(n) ((0x098+(608*n))>>3) 167#define VXGE_HAL_STATS_GET_PORTn_TX_DROP_FRMS(bits) bVAL32(bits, 0) 168 169#define VXGE_HAL_STATS_PORTn_TX_ANY_ERR_FRMS_OFFSET(n) ((0x098+(608*n))>>3) 170#define VXGE_HAL_STATS_GET_PORTn_TX_ANY_ERR_FRMS(bits) bVAL32(bits, 32) 171 172#define VXGE_HAL_STATS_PORTn_RX_TTL_FRMS_OFFSET(n) ((0x0a0+(608*n))>>3) 173#define VXGE_HAL_STATS_GET_PORTn_RX_TTL_FRMS(bits) bits 174 175#define VXGE_HAL_STATS_PORTn_RX_VLD_FRMS_OFFSET(n) ((0x0a8+(608*n))>>3) 176#define VXGE_HAL_STATS_GET_PORTn_RX_VLD_FRMS(bits) bits 177 178#define VXGE_HAL_STATS_PORTn_RX_OFFLOAD_FRMS_OFFSET(n) ((0x0b0+(608*n))>>3) 179#define VXGE_HAL_STATS_GET_PORTn_RX_OFFLOAD_FRMS(bits) bits 180 181#define VXGE_HAL_STATS_PORTn_RX_TTL_OCTETS_OFFSET(n) ((0x0b8+(608*n))>>3) 182#define VXGE_HAL_STATS_GET_PORTn_RX_TTL_OCTETS(bits) bits 183 184#define VXGE_HAL_STATS_PORTn_RX_DATA_OCTETS_OFFSET(n) ((0x0c0+(608*n))>>3) 185#define VXGE_HAL_STATS_GET_PORTn_RX_DATA_OCTETS(bits) bits 186 187#define VXGE_HAL_STATS_PORTn_RX_OFFLOAD_OCTETS_OFFSET(n) ((0x0c8+(608*n))>>3) 188#define VXGE_HAL_STATS_GET_PORTn_RX_OFFLOAD_OCTETS(bits) bits 189 190#define VXGE_HAL_STATS_PORTn_RX_VLD_MCAST_FRMS_OFFSET(n) ((0x0d0+(608*n))>>3) 191#define VXGE_HAL_STATS_GET_PORTn_RX_VLD_MCAST_FRMS(bits) bits 192 193#define VXGE_HAL_STATS_PORTn_RX_VLD_BCAST_FRMS_OFFSET(n) ((0x0d8+(608*n))>>3) 194#define VXGE_HAL_STATS_GET_PORTn_RX_VLD_BCAST_FRMS(bits) bits 195 196#define VXGE_HAL_STATS_PORTn_RX_ACC_UCAST_FRMS_OFFSET(n) ((0x0e0+(608*n))>>3) 197#define VXGE_HAL_STATS_GET_PORTn_RX_ACC_UCAST_FRMS(bits) bits 198 199#define VXGE_HAL_STATS_PORTn_RX_ACC_NUCAST_FRMS_OFFSET(n) ((0x0e8+(608*n))>>3) 200#define VXGE_HAL_STATS_GET_PORTn_RX_ACC_NUCAST_FRMS(bits) bits 201 202#define VXGE_HAL_STATS_PORTn_RX_TAGGED_FRMS_OFFSET(n) ((0x0f0+(608*n))>>3) 203#define VXGE_HAL_STATS_GET_PORTn_RX_TAGGED_FRMS(bits) bits 204 205#define VXGE_HAL_STATS_PORTn_RX_LONG_FRMS_OFFSET(n) ((0x0f8+(608*n))>>3) 206#define VXGE_HAL_STATS_GET_PORTn_RX_LONG_FRMS(bits) bits 207 208#define VXGE_HAL_STATS_PORTn_RX_USIZED_FRMS_OFFSET(n) ((0x100+(608*n))>>3) 209#define VXGE_HAL_STATS_GET_PORTn_RX_USIZED_FRMS(bits) bits 210 211#define VXGE_HAL_STATS_PORTn_RX_OSIZED_FRMS_OFFSET(n) ((0x108+(608*n))>>3) 212#define VXGE_HAL_STATS_GET_PORTn_RX_OSIZED_FRMS(bits) bits 213 214#define VXGE_HAL_STATS_PORTn_RX_FRAG_FRMS_OFFSET(n) ((0x110+(608*n))>>3) 215#define VXGE_HAL_STATS_GET_PORTn_RX_FRAG_FRMS(bits) bits 216 217#define VXGE_HAL_STATS_PORTn_RX_JABBER_FRMS_OFFSET(n) ((0x118+(608*n))>>3) 218#define VXGE_HAL_STATS_GET_PORTn_RX_JABBER_FRMS(bits) bits 219 220#define VXGE_HAL_STATS_PORTn_RX_TTL_64_FRMS_OFFSET(n) ((0x120+(608*n))>>3) 221#define VXGE_HAL_STATS_GET_PORTn_RX_TTL_64_FRMS(bits) bits 222 223#define VXGE_HAL_STATS_PORTn_RX_TTL_65_127_FRMS_OFFSET(n) ((0x128+(608*n))>>3) 224#define VXGE_HAL_STATS_GET_PORTn_RX_TTL_65_127_FRMS(bits) bits 225 226#define VXGE_HAL_STATS_PORTn_RX_TTL_128_255_FRMS_OFFSET(n) ((0x130+(608*n))>>3) 227#define VXGE_HAL_STATS_GET_PORTn_RX_TTL_128_255_FRMS(bits) bits 228 229#define VXGE_HAL_STATS_PORTn_RX_TTL_256_511_FRMS_OFFSET(n) ((0x138+(608*n))>>3) 230#define VXGE_HAL_STATS_GET_PORTn_RX_TTL_256_511_FRMS(bits) bits 231 232#define VXGE_HAL_STATS_PORTn_RX_TTL_512_1023_FRMS_OFFSET(n) ((0x140+(608*n))>>3) 233#define VXGE_HAL_STATS_GET_PORTn_RX_TTL_512_1023_FRMS(bits) bits 234 235#define VXGE_HAL_STATS_PORTn_RX_TTL_1024_1518_FRMS_OFFSET(n)\ 236 ((0x148+(608*n))>>3) 237#define VXGE_HAL_STATS_GET_PORTn_RX_TTL_1024_1518_FRMS(bits) bits 238 239#define VXGE_HAL_STATS_PORTn_RX_TTL_1519_4095_FRMS_OFFSET(n)\ 240 ((0x150+(608*n))>>3) 241#define VXGE_HAL_STATS_GET_PORTn_RX_TTL_1519_4095_FRMS(bits) bits 242 243#define VXGE_HAL_STATS_PORTn_RX_TTL_4096_81915_FRMS_OFFSET(n)\ 244 ((0x158+(608*n))>>3) 245#define VXGE_HAL_STATS_GET_PORTn_RX_TTL_4096_8191_FRMS(bits) bits 246 247#define VXGE_HAL_STATS_PORTn_RX_TTL_8192_MAX_FRMS_OFFSET(n) ((0x160+(608*n))>>3) 248#define VXGE_HAL_STATS_GET_PORTn_RX_TTL_8192_MAX_FRMS(bits) bits 249 250#define VXGE_HAL_STATS_PORTn_RX_TTL_GT_MAX_FRMS_OFFSET(n) ((0x168+(608*n))>>3) 251#define VXGE_HAL_STATS_GET_PORTn_RX_TTL_GT_MAX_FRMS(bits) bits 252 253#define VXGE_HAL_STATS_PORTn_RX_IP_OFFSET(n) ((0x170+(608*n))>>3) 254#define VXGE_HAL_STATS_GET_PORTn_RX_IP(bits) bits 255 256#define VXGE_HAL_STATS_PORTn_RX_ACC_IP_OFFSET(n) ((0x178+(608*n))>>3) 257#define VXGE_HAL_STATS_GET_PORTn_RX_ACC_IP(bits) bits 258 259#define VXGE_HAL_STATS_PORTn_RX_IP_OCTETS_OFFSET(n) ((0x180+(608*n))>>3) 260#define VXGE_HAL_STATS_GET_PORTn_RX_IP_OCTETS(bits) bits 261 262#define VXGE_HAL_STATS_PORTn_RX_ERR_IP_OFFSET(n) ((0x188+(608*n))>>3) 263#define VXGE_HAL_STATS_GET_PORTn_RX_ERR_IP(bits) bits 264 265#define VXGE_HAL_STATS_PORTn_RX_ICMP_OFFSET(n) ((0x190+(608*n))>>3) 266#define VXGE_HAL_STATS_GET_PORTn_RX_ICMP(bits) bits 267 268#define VXGE_HAL_STATS_PORTn_RX_TCP_OFFSET(n) ((0x198+(608*n))>>3) 269#define VXGE_HAL_STATS_GET_PORTn_RX_TCP(bits) bits 270 271#define VXGE_HAL_STATS_PORTn_RX_UDP_OFFSET(n) ((0x1a0+(608*n))>>3) 272#define VXGE_HAL_STATS_GET_PORTn_RX_UDP(bits) bits 273 274#define VXGE_HAL_STATS_PORTn_RX_ERR_TCP_OFFSET(n) ((0x1a8+(608*n))>>3) 275#define VXGE_HAL_STATS_GET_PORTn_RX_ERR_TCP(bits) bits 276 277#define VXGE_HAL_STATS_PORTn_RX_PAUSE_CNT_OFFSET(n) ((0x1b0+(608*n))>>3) 278#define VXGE_HAL_STATS_GET_PORTn_RX_PAUSE_CNT(bits) bits 279 280#define VXGE_HAL_STATS_PORTn_RX_PAUSE_CTRL_FRMS_OFFSET(n) ((0x1b8+(608*n))>>3) 281#define VXGE_HAL_STATS_GET_PORTn_RX_PAUSE_CTRL_FRMS(bits) bits 282 283#define VXGE_HAL_STATS_PORTn_RX_UNSUP_CTRL_FRMS_OFFSET(n) ((0x1c0+(608*n))>>3) 284#define VXGE_HAL_STATS_GET_PORTn_RX_UNSUP_CTRL_FRMS(bits) bits 285 286#define VXGE_HAL_STATS_PORTn_RX_FCS_ERR_FRMS_OFFSET(n) ((0x1c8+(608*n))>>3) 287#define VXGE_HAL_STATS_GET_PORTn_RX_FCS_ERR_FRMS(bits) bits 288 289#define VXGE_HAL_STATS_PORTn_RX_IN_RNG_LEN_ERR_FRMS_OFFSET(n)\ 290 ((0x1d0+(608*n))>>3) 291#define VXGE_HAL_STATS_GET_PORTn_RX_IN_RNG_LEN_ERR_FRMS(bits) bits 292 293#define VXGE_HAL_STATS_PORTn_RX_OUT_RNG_LEN_ERR_FRMS_OFFSET(n)\ 294 ((0x1d8+(608*n))>>3) 295#define VXGE_HAL_STATS_GET_PORTn_RX_OUT_RNG_LEN_ERR_FRMS(bits) bits 296 297#define VXGE_HAL_STATS_PORTn_RX_DROP_FRMS_OFFSET(n) ((0x1e0+(608*n))>>3) 298#define VXGE_HAL_STATS_GET_PORTn_RX_DROP_FRMS(bits) bits 299 300#define VXGE_HAL_STATS_PORTn_RX_DISCARDED_FRMS_OFFSET(n) ((0x1e8+(608*n))>>3) 301#define VXGE_HAL_STATS_GET_PORTn_RX_DISCARDED_FRMS(bits) bits 302 303#define VXGE_HAL_STATS_PORTn_RX_DROP_IP_OFFSET(n) ((0x1f0+(608*n))>>3) 304#define VXGE_HAL_STATS_GET_PORTn_RX_DROP_IP(bits) bits 305 306#define VXGE_HAL_STATS_PORTn_RX_DRP_UDP_OFFSET(n) ((0x1f8+(608*n))>>3) 307#define VXGE_HAL_STATS_GET_PORTn_RX_DRP_UDP(bits) bits 308 309#define VXGE_HAL_STATS_PORTn_RX_LACPDU_FRMS_OFFSET(n) ((0x200+(608*n))>>3) 310#define VXGE_HAL_STATS_GET_PORTn_RX_LACPDU_FRMS(bits) bVAL32(bits, 0) 311 312#define VXGE_HAL_STATS_PORTn_RX_MRKR_PDU_FRMS_OFFSET(n) ((0x200+(608*n))>>3) 313#define VXGE_HAL_STATS_GET_PORTn_RX_MRKR_PDU_FRMS(bits) bVAL32(bits, 32) 314 315#define VXGE_HAL_STATS_PORTn_RX_MRKR_RESP_PDU_FRMS_OFFSET(n)\ 316 ((0x208+(608*n))>>3) 317#define VXGE_HAL_STATS_GET_PORTn_RX_MRKR_RESP_PDU_FRMS(bits) bVAL32(bits, 0) 318 319#define VXGE_HAL_STATS_PORTn_RX_UNKNOWN_PDU_FRMS_OFFSET(n) ((0x208+(608*n))>>3) 320#define VXGE_HAL_STATS_GET_PORTn_RX_UNKNOWN_PDU_FRMS(bits) bVAL32(bits, 32) 321 322#define VXGE_HAL_STATS_PORTn_RX_ILLEGAL_PDU_FRMS_OFFSET(n) ((0x210+(608*n))>>3) 323#define VXGE_HAL_STATS_GET_PORTn_RX_ILLEGAL_PDU_FRMS(bits) bVAL32(bits, 0) 324 325#define VXGE_HAL_STATS_PORTn_RX_FCS_DISCARD_OFFSET(n) ((0x210+(608*n))>>3) 326#define VXGE_HAL_STATS_GET_PORTn_RX_FCS_DISCARD(bits) bVAL32(bits, 32) 327 328#define VXGE_HAL_STATS_PORTn_RX_LEN_DISCARD_OFFSET(n) ((0x218+(608*n))>>3) 329#define VXGE_HAL_STATS_GET_PORTn_RX_LEN_DISCARD(bits) bVAL32(bits, 0) 330 331#define VXGE_HAL_STATS_PORTn_RX_SWITCH_DISCARD_OFFSET(n) ((0x218+(608*n))>>3) 332#define VXGE_HAL_STATS_GET_PORTn_RX_SWITCH_DISCARD(bits) bVAL32(bits, 32) 333 334#define VXGE_HAL_STATS_PORTn_RX_L2_MGMT_DISCARD_OFFSET(n) ((0x220+(608*n))>>3) 335#define VXGE_HAL_STATS_GET_PORTn_RX_L2_MGMT_DISCARD(bits) bVAL32(bits, 0) 336 337#define VXGE_HAL_STATS_PORTn_RX_RPA_DISCARD_OFFSET(n) ((0x220+(608*n))>>3) 338#define VXGE_HAL_STATS_GET_PORTn_RX_RPA_DISCARD(bits) bVAL32(bits, 32) 339 340#define VXGE_HAL_STATS_PORTn_RX_TRASH_DISCARD_OFFSET(n) ((0x228+(608*n))>>3) 341#define VXGE_HAL_STATS_GET_PORTn_RX_TRASH_DISCARD(bits) bVAL32(bits, 0) 342 343#define VXGE_HAL_STATS_PORTn_RX_RTS_DISCARD_OFFSET(n) ((0x228+(608*n))>>3) 344#define VXGE_HAL_STATS_GET_PORTn_RX_RTS_DISCARD(bits) bVAL32(bits, 32) 345 346#define VXGE_HAL_STATS_PORTn_RX_RED_DISCARD_OFFSET(n) ((0x230+(608*n))>>3) 347#define VXGE_HAL_STATS_GET_PORTn_RX_RED_DISCARD(bits) bVAL32(bits, 0) 348 349#define VXGE_HAL_STATS_PORTn_RX_BUFF_FULL_DISCARD_OFFSET(n) ((0x230+(608*n))>>3) 350#define VXGE_HAL_STATS_GET_PORTn_RX_BUFF_FULL_DISCARD(bits) bVAL32(bits, 32) 351 352#define VXGE_HAL_STATS_PORTn_RX_XGMII_DATA_ERR_CNT_OFFSET(n)\ 353 ((0x238+(608*n))>>3) 354#define VXGE_HAL_STATS_GET_PORTn_RX_XGMII_DATA_ERR_CNT(bits) bVAL32(bits, 0) 355 356#define VXGE_HAL_STATS_PORTn_RX_XGMII_CTRL_ERR_CNT_OFFSET(n)\ 357 ((0x238+(608*n))>>3) 358#define VXGE_HAL_STATS_GET_PORTn_RX_XGMII_CTRL_ERR_CNT(bits) bVAL32(bits, 32) 359 360#define VXGE_HAL_STATS_PORTn_RX_XGMII_ERR_SYM_OFFSET(n) ((0x240+(608*n))>>3) 361#define VXGE_HAL_STATS_GET_PORTn_RX_XGMII_ERR_SYM(bits) bVAL32(bits, 0) 362 363#define VXGE_HAL_STATS_PORTn_RX_XGMII_CHAR1_MATCH_OFFSET(n) ((0x240+(608*n))>>3) 364#define VXGE_HAL_STATS_GET_PORTn_RX_XGMII_CHAR1_MATCH(bits) bVAL32(bits, 32) 365 366#define VXGE_HAL_STATS_PORTn_RX_XGMII_CHAR2_MATCH_OFFSET(n) ((0x248+(608*n))>>3) 367#define VXGE_HAL_STATS_GET_PORTn_RX_XGMII_CHAR2_MATCH(bits) bVAL32(bits, 0) 368 369#define VXGE_HAL_STATS_PORTn_RX_XGMII_COL1_MATCH_OFFSET(n) ((0x248+(608*n))>>3) 370#define VXGE_HAL_STATS_GET_PORTn_RX_XGMII_COL1_MATCH(bits) bVAL32(bits, 32) 371 372#define VXGE_HAL_STATS_PORTn_RX_XGMII_COL2_MATCH_OFFSET(n) ((0x250+(608*n))>>3) 373#define VXGE_HAL_STATS_GET_PORTn_RX_XGMII_COL2_MATCH(bits) bVAL32(bits, 0) 374 375#define VXGE_HAL_STATS_PORTn_RX_LOCAL_FAULT_OFFSET(n) ((0x250+(608*n))>>3) 376#define VXGE_HAL_STATS_GET_PORTn_RX_LOCAL_FAULT(bits) bVAL32(bits, 32) 377 378#define VXGE_HAL_STATS_PORTn_RX_REMOTE_FAULT_OFFSET(n) ((0x258+(608*n))>>3) 379#define VXGE_HAL_STATS_GET_PORTn_RX_REMOTE_FAULT(bits) bVAL32(bits, 0) 380 381#define VXGE_HAL_STATS_PORTn_RX_JETTISON_OFFSET(n) ((0x258+(608*n))>>3) 382#define VXGE_HAL_STATS_GET_PORTn_RX_JETTISON(bits) bVAL32(bits, 32) 383 384#define VXGE_HAL_STATS_VPATH_TX_TTL_ETH_FRMS_OFFSET (0x000>>3) 385#define VXGE_HAL_STATS_GET_VPATH_TX_TTL_ETH_FRMS(bits) bits 386 387#define VXGE_HAL_STATS_VPATH_TX_TTL_ETH_OCTETS_OFFSET (0x008>>3) 388#define VXGE_HAL_STATS_GET_VPATH_TX_TTL_ETH_OCTETS(bits) bits 389 390#define VXGE_HAL_STATS_VPATH_TX_DATA_OCTETS_OFFSET (0x010>>3) 391#define VXGE_HAL_STATS_GET_VPATH_TX_DATA_OCTETS(bits) bits 392 393#define VXGE_HAL_STATS_VPATH_TX_MCAST_FRMS_OFFSET (0x018>>3) 394#define VXGE_HAL_STATS_GET_VPATH_TX_MCAST_FRMS(bits) bits 395 396#define VXGE_HAL_STATS_VPATH_TX_BCAST_FRMS_OFFSET (0x020>>3) 397#define VXGE_HAL_STATS_GET_VPATH_TX_BCAST_FRMS(bits) bits 398 399#define VXGE_HAL_STATS_VPATH_TX_UCAST_FRMS_OFFSET (0x028>>3) 400#define VXGE_HAL_STATS_GET_VPATH_TX_UCAST_FRMS(bits) bits 401 402#define VXGE_HAL_STATS_VPATH_TX_TAGGED_FRMS_OFFSET (0x030>>3) 403#define VXGE_HAL_STATS_GET_VPATH_TX_TAGGED_FRMS(bits) bits 404 405#define VXGE_HAL_STATS_VPATH_TX_VLD_IP_OFFSET (0x038>>3) 406#define VXGE_HAL_STATS_GET_VPATH_TX_VLD_IP(bits) bits 407 408#define VXGE_HAL_STATS_VPATH_TX_VLD_IP_OCTETS_OFFSET (0x040>>3) 409#define VXGE_HAL_STATS_GET_VPATH_TX_VLD_IP_OCTETS(bits) bits 410 411#define VXGE_HAL_STATS_VPATH_TX_ICMP_OFFSET (0x048>>3) 412#define VXGE_HAL_STATS_GET_VPATH_TX_ICMP(bits) bits 413 414#define VXGE_HAL_STATS_VPATH_TX_TCP_OFFSET (0x050>>3) 415#define VXGE_HAL_STATS_GET_VPATH_TX_TCP(bits) bits 416 417#define VXGE_HAL_STATS_VPATH_TX_RST_TCP_OFFSET (0x058>>3) 418#define VXGE_HAL_STATS_GET_VPATH_TX_RST_TCP(bits) bits 419 420#define VXGE_HAL_STATS_VPATH_TX_UDP_OFFSET (0x060>>3) 421#define VXGE_HAL_STATS_GET_VPATH_TX_UDP(bits) bits 422 423#define VXGE_HAL_STATS_VPATH_TX_LOST_IP_OFFSET (0x068>>3) 424#define VXGE_HAL_STATS_GET_VPATH_TX_LOST_IP(bits) bits 425 426#define VXGE_HAL_STATS_VPATH_TX_UNKNOWN_PROTOCOL_OFFSET (0x068>>3) 427#define VXGE_HAL_STATS_GET_VPATH_TX_UNKNOWN_PROTOCOL(bits) bits 428 429#define VXGE_HAL_STATS_VPATH_TX_PARSE_ERROR_OFFSET (0x070>>3) 430#define VXGE_HAL_STATS_GET_VPATH_TX_PARSE_ERROR(bits) bits 431 432#define VXGE_HAL_STATS_VPATH_TX_TCP_OFFLOAD_OFFSET (0x078>>3) 433#define VXGE_HAL_STATS_GET_VPATH_TX_TCP_OFFLOAD(bits) bits 434 435#define VXGE_HAL_STATS_VPATH_TX_RETX_TCP_OFFLOAD_OFFSET (0x080>>3) 436#define VXGE_HAL_STATS_GET_VPATH_TX_RETX_TCP_OFFLOAD(bits) bits 437 438#define VXGE_HAL_STATS_VPATH_TX_LOST_IP_OFFLOAD_OFFSET (0x088>>3) 439#define VXGE_HAL_STATS_GET_VPATH_TX_LOST_IP_OFFLOAD(bits) bits 440 441#define VXGE_HAL_STATS_VPATH_RX_TTL_ETH_FRMS_OFFSET (0x090>>3) 442#define VXGE_HAL_STATS_GET_VPATH_RX_TTL_ETH_FRMS(bits) bits 443 444#define VXGE_HAL_STATS_VPATH_RX_VLD_FRMS_OFFSET (0x098>>3) 445#define VXGE_HAL_STATS_GET_VPATH_RX_VLD_FRMS(bits) bits 446 447#define VXGE_HAL_STATS_VPATH_RX_OFFLOAD_FRMS_OFFSET (0x0a0>>3) 448#define VXGE_HAL_STATS_GET_VPATH_RX_OFFLOAD_FRMS(bits) bits 449 450#define VXGE_HAL_STATS_VPATH_RX_TTL_ETH_OCTETS_OFFSET (0x0a8>>3) 451#define VXGE_HAL_STATS_GET_VPATH_RX_TTL_ETH_OCTETS(bits) bits 452 453#define VXGE_HAL_STATS_VPATH_RX_DATA_OCTETS_OFFSET (0x0b0>>3) 454#define VXGE_HAL_STATS_GET_VPATH_RX_DATA_OCTETS(bits) bits 455 456#define VXGE_HAL_STATS_VPATH_RX_OFFLOAD_OCTETS_OFFSET (0x0b8>>3) 457#define VXGE_HAL_STATS_GET_VPATH_RX_OFFLOAD_OCTETS(bits) bits 458 459#define VXGE_HAL_STATS_VPATH_RX_VLD_MCAST_FRMS_OFFSET (0x0c0>>3) 460#define VXGE_HAL_STATS_GET_VPATH_RX_VLD_MCAST_FRMS(bits) bits 461 462#define VXGE_HAL_STATS_VPATH_RX_VLD_BCAST_FRMS_OFFSET (0x0c8>>3) 463#define VXGE_HAL_STATS_GET_VPATH_RX_VLD_BCAST_FRMS(bits) bits 464 465#define VXGE_HAL_STATS_VPATH_RX_ACC_UCAST_FRMS_OFFSET (0x0d0>>3) 466#define VXGE_HAL_STATS_GET_VPATH_RX_ACC_UCAST_FRMS(bits) bits 467 468#define VXGE_HAL_STATS_VPATH_RX_ACC_NUCAST_FRMS_OFFSET (0x0d8>>3) 469#define VXGE_HAL_STATS_GET_VPATH_RX_ACC_NUCAST_FRMS(bits) bits 470 471#define VXGE_HAL_STATS_VPATH_RX_TAGGED_FRMS_OFFSET (0x0e0>>3) 472#define VXGE_HAL_STATS_GET_VPATH_RX_TAGGED_FRMS(bits) bits 473 474#define VXGE_HAL_STATS_VPATH_RX_LONG_FRMS_OFFSET (0x0e8>>3) 475#define VXGE_HAL_STATS_GET_VPATH_RX_LONG_FRMS(bits) bits 476 477#define VXGE_HAL_STATS_VPATH_RX_USIZED_FRMS_OFFSET (0x0f0>>3) 478#define VXGE_HAL_STATS_GET_VPATH_RX_USIZED_FRMS(bits) bits 479 480#define VXGE_HAL_STATS_VPATH_RX_OSIZED_FRMS_OFFSET (0x0f8>>3) 481#define VXGE_HAL_STATS_GET_VPATH_RX_OSIZED_FRMS(bits) bits 482 483#define VXGE_HAL_STATS_VPATH_RX_FRAG_FRMS_OFFSET (0x100>>3) 484#define VXGE_HAL_STATS_GET_VPATH_RX_FRAG_FRMS(bits) bits 485 486#define VXGE_HAL_STATS_VPATH_RX_JABBER_FRMS_OFFSET (0x108>>3) 487#define VXGE_HAL_STATS_GET_VPATH_RX_JABBER_FRMS(bits) bits 488 489#define VXGE_HAL_STATS_VPATH_RX_TTL_64_FRMS_OFFSET (0x110>>3) 490#define VXGE_HAL_STATS_GET_VPATH_RX_TTL_64_FRMS(bits) bits 491 492#define VXGE_HAL_STATS_VPATH_RX_TTL_65_127_FRMS_OFFSET (0x118>>3) 493#define VXGE_HAL_STATS_GET_VPATH_RX_TTL_65_127_FRMS(bits) bits 494 495#define VXGE_HAL_STATS_VPATH_RX_TTL_128_255_FRMS_OFFSET (0x120>>3) 496#define VXGE_HAL_STATS_GET_VPATH_RX_TTL_128_255_FRMS(bits) bits 497 498#define VXGE_HAL_STATS_VPATH_RX_TTL_256_511_FRMS_OFFSET (0x128>>3) 499#define VXGE_HAL_STATS_GET_VPATH_RX_TTL_256_511_FRMS(bits) bits 500 501#define VXGE_HAL_STATS_VPATH_RX_TTL_512_1023_FRMS_OFFSET (0x130>>3) 502#define VXGE_HAL_STATS_GET_VPATH_RX_TTL_512_1023_FRMS(bits) bits 503 504#define VXGE_HAL_STATS_VPATH_RX_TTL_1024_1518_FRMS_OFFSET (0x138>>3) 505#define VXGE_HAL_STATS_GET_VPATH_RX_TTL_1024_1518_FRMS(bits) bits 506 507#define VXGE_HAL_STATS_VPATH_RX_TTL_1519_4095_FRMS_OFFSET (0x140>>3) 508#define VXGE_HAL_STATS_GET_VPATH_RX_TTL_1519_4095_FRMS(bits) bits 509 510#define VXGE_HAL_STATS_VPATH_RX_TTL_4096_8191_FRMS_OFFSET (0x148>>3) 511#define VXGE_HAL_STATS_GET_VPATH_RX_TTL_4096_8191_FRMS(bits) bits 512 513#define VXGE_HAL_STATS_VPATH_RX_TTL_8192_MAX_FRMS_OFFSET (0x150>>3) 514#define VXGE_HAL_STATS_GET_VPATH_RX_TTL_8192_MAX_FRMS(bits) bits 515 516#define VXGE_HAL_STATS_VPATH_RX_TTL_GT_MAX_FRMS_OFFSET (0x158>>3) 517#define VXGE_HAL_STATS_GET_VPATH_RX_TTL_GT_MAX_FRMS(bits) bits 518 519#define VXGE_HAL_STATS_VPATH_RX_IP_OFFSET (0x160>>3) 520#define VXGE_HAL_STATS_GET_VPATH_RX_IP(bits) bits 521 522#define VXGE_HAL_STATS_VPATH_RX_ACC_IP_OFFSET (0x168>>3) 523#define VXGE_HAL_STATS_GET_VPATH_RX_ACC_IP(bits) bits 524 525#define VXGE_HAL_STATS_VPATH_RX_IP_OCTETS_OFFSET (0x170>>3) 526#define VXGE_HAL_STATS_GET_VPATH_RX_IP_OCTETS(bits) bits 527 528#define VXGE_HAL_STATS_VPATH_RX_ERR_IP_OFFSET (0x178>>3) 529#define VXGE_HAL_STATS_GET_VPATH_RX_ERR_IP(bits) bits 530 531#define VXGE_HAL_STATS_VPATH_RX_ICMP_OFFSET (0x180>>3) 532#define VXGE_HAL_STATS_GET_VPATH_RX_ICMP(bits) bits 533 534#define VXGE_HAL_STATS_VPATH_RX_TCP_OFFSET (0x188>>3) 535#define VXGE_HAL_STATS_GET_VPATH_RX_TCP(bits) bits 536 537#define VXGE_HAL_STATS_VPATH_RX_UDP_OFFSET (0x190>>3) 538#define VXGE_HAL_STATS_GET_VPATH_RX_UDP(bits) bits 539 540#define VXGE_HAL_STATS_VPATH_RX_ERR_TCP_OFFSET (0x198>>3) 541#define VXGE_HAL_STATS_GET_VPATH_RX_ERR_TCP(bits) bits 542 543#define VXGE_HAL_STATS_VPATH_RX_LOST_FRMS_OFFSET (0x1a0>>3) 544#define VXGE_HAL_STATS_GET_VPATH_RX_LOST_FRMS(bits) bits 545 546#define VXGE_HAL_STATS_VPATH_RX_LOST_IP_OFFSET (0x1a8>>3) 547#define VXGE_HAL_STATS_GET_VPATH_RX_LOST_IP(bits) bits 548 549#define VXGE_HAL_STATS_VPATH_RX_LOST_IP_OFFLOAD_OFFSET (0x1b0>>3) 550#define VXGE_HAL_STATS_GET_VPATH_RX_LOST_IP_OFFLOAD(bits) bits 551 552#define VXGE_HAL_STATS_VPATH_RX_QUEUE_FULL_DISCARD_OFFSET (0x1b8>>3) 553#define VXGE_HAL_STATS_GET_VPATH_RX_QUEUE_FULL_DISCARD(bits) bVAL16(bits, 8) 554 555#define VXGE_HAL_STATS_VPATH_RX_RED_DISCARD_OFFSET (0x1b8>>3) 556#define VXGE_HAL_STATS_GET_VPATH_RX_RED_DISCARD(bits) bVAL16(bits, 24) 557 558#define VXGE_HAL_STATS_VPATH_RX_SLEEP_DISCARD_OFFSET (0x1b8>>3) 559#define VXGE_HAL_STATS_GET_VPATH_RX_SLEEP_DISCARD(bits) bVAL16(bits, 42) 560 561#define VXGE_HAL_STATS_VPATH_RX_MPA_OK_FRMS_OFFSET (0x1c0>>3) 562#define VXGE_HAL_STATS_GET_VPATH_RX_MPA_OK_FRMS(bits) bits 563 564#define VXGE_HAL_STATS_VPATH_PROG_EVENT_VNUM0_OFFSET (0x1d0>>3) 565#define VXGE_HAL_STATS_GET_VPATH_PROG_EVENT_VNUM0(bits) bVAL32(bits, 0) 566 567#define VXGE_HAL_STATS_VPATH_PROG_EVENT_VNUM1_OFFSET (0x1d0>>3) 568#define VXGE_HAL_STATS_GET_VPATH_PROG_EVENT_VNUM1(bits) bVAL32(bits, 32) 569 570#define VXGE_HAL_STATS_VPATH_PROG_EVENT_VNUM2_OFFSET (0x1d8>>3) 571#define VXGE_HAL_STATS_GET_VPATH_PROG_EVENT_VNUM2(bits) bVAL32(bits, 0) 572 573#define VXGE_HAL_STATS_VPATH_PROG_EVENT_VNUM3_OFFSET (0x1d8>>3) 574#define VXGE_HAL_STATS_GET_VPATH_PROG_EVENT_VNUM3(bits) bVAL32(bits, 32) 575 576/* 577 * struct vxge_hal_xmac_aggr_stats_t - Per-Aggregator XMAC Statistics 578 * 579 * @tx_frms: Count of data frames transmitted on this Aggregator on all 580 * its Aggregation ports. Does not include LACPDUs or Marker PDUs. 581 * However, does include frames discarded by the Distribution 582 * function. 583 * @tx_data_octets: Count of data and padding octets of frames transmitted 584 * on this Aggregator on all its Aggregation ports.Does not include 585 * octets of LACPDUs or Marker PDUs. However,does include octets of 586 * frames discarded by the Distribution function. 587 * @tx_mcast_frms: Count of data frames transmitted (to a group destination 588 * address other than the broadcast address) on this Aggregator on 589 * all its Aggregation ports. Does not include LACPDUs or Marker 590 * PDUs. However, does include frames discarded by the Distribution 591 * function. 592 * @tx_bcast_frms: Count of broadcast data frames transmitted on this Aggregator 593 * on all its Aggregation ports. Does not include LACPDUs or Marker 594 * PDUs. However, does include frames discarded by the Distribution 595 * function. 596 * @tx_discarded_frms: Count of data frames to be transmitted on this Aggregator 597 * that are discarded by the Distribution function.This occurs when 598 * conversation are allocated to different ports and have to be 599 * flushed on old ports 600 * @tx_errored_frms: Count of data frames transmitted on this Aggregator that 601 * experience transmission errors on its Aggregation ports. 602 * @rx_frms: Count of data frames received on this Aggregator on all its 603 * Aggregation ports. Does not include LACPDUs or Marker PDUs. 604 * Also, does not include frames discarded by the Collection 605 * function. 606 * @rx_data_octets: Count of data and padding octets of frames received on this 607 * Aggregator on all its Aggregation ports. Does not include octets 608 * of LACPDUs or Marker PDUs.Also,does not include octets of frames 609 * discarded by the Collection function. 610 * @rx_mcast_frms: Count of data frames received (from a group destination 611 * address other than the broadcast address) on this Aggregator on 612 * all its Aggregation ports. Does not include LACPDUs or Marker 613 * PDUs. Also, does not include frames discarded by the Collection 614 * function. 615 * @rx_bcast_frms: Count of broadcast data frames received on this Aggregator on 616 * all its Aggregation ports. Does not include LACPDUs or Marker 617 * PDUs. Also, does not include frames discarded by the Collection 618 * function. 619 * @rx_discarded_frms: Count of data frames received on this Aggregator that are 620 * discarded by the Collection function because the Collection 621 * function was disabled on the port which the frames are received. 622 * @rx_errored_frms: Count of data frames received on this Aggregator that are 623 * discarded by its Aggregation ports, or are discarded by the 624 * Collection function of the Aggregator, or that are discarded by 625 * the Aggregator due to detection of an illegal Slow Protocols PDU 626 * @rx_unknown_slow_proto_frms: Count of data frames received on this Aggregator 627 * that are discarded by its Aggregation ports due to detection of 628 * an unknown Slow Protocols PDU. 629 * 630 * Per aggregator XMAC RX statistics. 631 */ 632#pragma pack(1) 633typedef struct vxge_hal_xmac_aggr_stats_t { 634/* 0x000 */ u64 tx_frms; 635/* 0x008 */ u64 tx_data_octets; 636/* 0x010 */ u64 tx_mcast_frms; 637/* 0x018 */ u64 tx_bcast_frms; 638/* 0x020 */ u64 tx_discarded_frms; 639/* 0x028 */ u64 tx_errored_frms; 640/* 0x030 */ u64 rx_frms; 641/* 0x038 */ u64 rx_data_octets; 642/* 0x040 */ u64 rx_mcast_frms; 643/* 0x048 */ u64 rx_bcast_frms; 644/* 0x050 */ u64 rx_discarded_frms; 645/* 0x058 */ u64 rx_errored_frms; 646/* 0x060 */ u64 rx_unknown_slow_proto_frms; 647} vxge_hal_xmac_aggr_stats_t; 648 649#pragma pack() 650 651/* 652 * struct vxge_hal_xmac_port_stats_t - XMAC Port Statistics 653 * 654 * @tx_ttl_frms: Count of successfully transmitted MAC frames 655 * @tx_ttl_octets: Count of total octets of transmitted frames, not including 656 * framing characters (i.e. less framing bits). To determine the 657 * total octets of transmitted frames, including framing characters, 658 * multiply PORTn_TX_TTL_FRMS by 8 and add it to this stat (unless 659 * otherwise configured, this stat only counts frames that have 660 * 8 bytes of preamble for each frame). This stat can be configured 661 * (see XMAC_STATS_GLOBAL_CFG.TTL_FRMS_HANDLING) to count everything 662 * including the preamble octets. 663 * @tx_data_octets: Count of data and padding octets of successfully transmitted 664 * frames. 665 * @tx_mcast_frms: Count of successfully transmitted frames to a group address 666 * other than the broadcast address. 667 * @tx_bcast_frms: Count of successfully transmitted frames to the broadcast 668 * group address. 669 * @tx_ucast_frms: Count of transmitted frames containing a unicast address. 670 * Includes discarded frames that are not sent to the network. 671 * @tx_tagged_frms: Count of transmitted frames containing a VLAN tag. 672 * @tx_vld_ip: Count of transmitted IP datagrams that are passed to the network. 673 * @tx_vld_ip_octets: Count of total octets of transmitted IP datagrams that 674 * are passed to the network. 675 * @tx_icmp: Count of transmitted ICMP messages. Includes messages not sent 676 * due to problems within ICMP. 677 * @tx_tcp: Count of transmitted TCP segments. Does not include segments 678 * containing retransmitted octets. 679 * @tx_rst_tcp: Count of transmitted TCP segments containing the RST flag. 680 * @tx_udp: Count of transmitted UDP datagrams. 681 * @tx_parse_error: Increments when the TPA is unable to parse a packet. This 682 * generally occurs when a packet is corrupt somehow, including 683 * packets that have IP version mismatches, invalid Layer 2 control 684 * fields, etc. L3/L4 checksums are not offloaded, but the packet 685 * is still be transmitted. 686 * @tx_unknown_protocol: Increments when the TPA encounters an unknown 687 * protocol, such as a new IPv6 extension header, or an unsupported 688 * Routing Type. The packet still has a checksum calculated but it 689 * may be incorrect. 690 * @tx_pause_ctrl_frms: Count of MAC PAUSE control frames that are transmitted. 691 * Since, the only control frames supported by this device are 692 * PAUSE frames, this register is a count of all transmitted MAC 693 * control frames. 694 * @tx_marker_pdu_frms: Count of Marker PDUs transmitted on this Aggr port 695 * @tx_lacpdu_frms: Count of LACPDUs transmitted on this Aggregation port. 696 * @tx_drop_ip: Count of transmitted IP datagrams that could not be passed to 697 * the network. Increments because of: 1) An internal processing error 698 * (such as an uncorrectable ECC error). 2) A frame parsing error 699 * during IP checksum calculation. 700 * @tx_marker_resp_pdu_frms: Count of Marker Response PDUs transmitted on this 701 * Aggregation port. 702 * @tx_xgmii_char2_match: Maintains a count of the number of transmitted XGMII 703 * characters that match a pattern that is programmable through 704 * register XMAC_STATS_TX_XGMII_CHAR_PORTn. By default, the pattern 705 * is set to /T/ (i.e. the terminate character), thus the statistic 706 * tracks the number of transmitted Terminate characters. 707 * @tx_xgmii_char1_match: Maintains a count of the number of transmitted XGMII 708 * characters that match a pattern that is programmable through 709 * register XMAC_STATS_TX_XGMII_CHAR_PORTn. By default, the pattern 710 * is set to /S/ (i.e. the start character), thus the statistic tracks 711 * the number of transmitted Start characters. 712 * @tx_xgmii_column2_match: Maintains a count of the number of transmitted XGMII 713 * columns that match a pattern that is programmable through register 714 * XMAC_STATS_TX_XGMII_COLUMN2_PORTn. By default, the pattern is set 715 * to 4 x /E/ (i.e. a column containing all error characters), thus 716 * the statistic tracks the number of Error columns transmitted at 717 * any time. If XMAC_STATS_TX_XGMII_BEHAV_COLUMN2_PORTn.NEAR_COL1 is 718 * set to 1, then this stat increments when COLUMN2 is found within 719 * 'n' clocks after COLUMN1. Here, 'n' is defined by 720 * XMAC_STATS_TX_XGMII_BEHAV_COLUMN2_PORTn.NUM_COL (if 'n' is set 721 * to 0, then it means to search anywhere for COLUMN2). 722 * @tx_xgmii_column1_match: Maintains a count of the number of transmitted XGMII 723 * columns that match a pattern that is programmable through register 724 * XMAC_STATS_TX_XGMII_COLUMN1_PORTn. By default, the pattern is set 725 * to 4 x /I/ (i.e. a column containing all idle characters), thus the 726 * statistic tracks the number of transmitted Idle columns. 727 * @unused1: Reserved 728 * @tx_any_err_frms: Count of transmitted frames containing any error that 729 * prevents them from being passed to the network. Increments if 730 * there is an ECC while reading the frame out of the transmit 731 * buffer. Also increments if the transmit protocol assist (TPA) 732 * block determines that the frame should not be sent. 733 * @tx_drop_frms: Count of frames that could not be sent for no other reason 734 * than internal MAC processing. Increments once whenever the 735 * transmit buffer is flushed (due to an ECC error on a memory 736 * descriptor). 737 * @rx_ttl_frms: Count of total received MAC frames, including frames received 738 * with frame-too-long, FCS, or length errors. This stat can be 739 * configured (see XMAC_STATS_GLOBAL_CFG.TTL_FRMS_HANDLING) to count 740 * everything, even "frames" as small one byte of preamble. 741 * @rx_vld_frms: Count of successfully received MAC frames. Does not include 742 * frames received with frame-too-long, FCS, or length errors. 743 * @rx_offload_frms: Count of offloaded received frames that are passed to 744 * the host. 745 * @rx_ttl_octets: Count of total octets of received frames, not including 746 * framing characters (i.e. less framing bits). To determine the 747 * total octets of received frames, including framing characters, 748 * multiply PORTn_RX_TTL_FRMS by 8 and add it to this stat (unless 749 * otherwise configured, this stat only counts frames that have 8 750 * bytes of preamble for each frame). This stat can be configured 751 * (see XMAC_STATS_GLOBAL_CFG.TTL_FRMS_HANDLING) to count everything, 752 * even the preamble octets of "frames" as small one byte of preamble. 753 * @rx_data_octets: Count of data and padding octets of successfully received 754 * frames. Does not include frames received with frame-too-long, 755 * FCS, or length errors. 756 * @rx_offload_octets: Count of total octets, not including framing 757 * characters, of offloaded received frames that are passed 758 * to the host. 759 * @rx_vld_mcast_frms: Count of successfully received MAC frames containing a 760 * nonbroadcast group address. Does not include frames received 761 * with frame-too-long, FCS, or length errors. 762 * @rx_vld_bcast_frms: Count of successfully received MAC frames containing 763 * the broadcast group address. Does not include frames received 764 * with frame-too-long, FCS, or length errors. 765 * @rx_accepted_ucast_frms: Count of successfully received frames containing 766 * a unicast address. Only includes frames that are passed to 767 * the system. 768 * @rx_accepted_nucast_frms: Count of successfully received frames containing 769 * a non-unicast (broadcast or multicast) address. Only includes 770 * frames that are passed to the system. Could include, for instance, 771 * non-unicast frames that contain FCS errors if the MAC_ERROR_CFG 772 * register is set to pass FCS-errored frames to the host. 773 * @rx_tagged_frms: Count of received frames containing a VLAN tag. 774 * @rx_long_frms: Count of received frames that are longer than RX_MAX_PYLD_LEN 775 * + 18 bytes (+ 22 bytes if VLAN-tagged). 776 * @rx_usized_frms: Count of received frames of length (including FCS, but not 777 * framing bits) less than 64 octets, that are otherwise well-formed. 778 * In other words, counts runts. 779 * @rx_osized_frms: Count of received frames of length (including FCS, but not 780 * framing bits) more than 1518 octets, that are otherwise 781 * well-formed. Note: If register XMAC_STATS_GLOBAL_CFG.VLAN_HANDLING 782 * is set to 1, then "more than 1518 octets" becomes "more than 1518 783 * (1522 if VLAN-tagged) octets". 784 * @rx_frag_frms: Count of received frames of length (including FCS, but not 785 * framing bits) less than 64 octets that had bad FCS. In other 786 * words, counts fragments. 787 * @rx_jabber_frms: Count of received frames of length (including FCS, but not 788 * framing bits) more than 1518 octets that had bad FCS. In other 789 * words, counts jabbers. Note: If register 790 * XMAC_STATS_GLOBAL_CFG.VLAN_HANDLING is set to 1, then "more than 791 * 1518 octets" becomes "more than 1518 (1522 if VLAN-tagged) octets". 792 * @rx_ttl_64_frms: Count of total received MAC frames with length (including 793 * FCS, but not framing bits) of exactly 64 octets. Includes frames 794 * received with frame-too-long, FCS, or length errors. 795 * @rx_ttl_65_127_frms: Count of total received MAC frames with length 796 * (including FCS, but not framing bits) of between 65 and 127 797 * octets inclusive. Includes frames received with frame-too-long, 798 * FCS, or length errors. 799 * @rx_ttl_128_255_frms: Count of total received MAC frames with length 800 * (including FCS, but not framing bits) of between 128 and 255 801 * octets inclusive. Includes frames received with frame-too-long, 802 * FCS, or length errors. 803 * @rx_ttl_256_511_frms: Count of total received MAC frames with length 804 * (including FCS, but not framing bits) of between 256 and 511 805 * octets inclusive. Includes frames received with frame-too-long, 806 * FCS, or length errors. 807 * @rx_ttl_512_1023_frms: Count of total received MAC frames with length 808 * (including FCS, but not framing bits) of between 512 and 1023 809 * octets inclusive. Includes frames received with frame-too-long, 810 * FCS, or length errors. 811 * @rx_ttl_1024_1518_frms: Count of total received MAC frames with length 812 * (including FCS, but not framing bits) of between 1024 and 1518 813 * octets inclusive. Includes frames received with frame-too-long, 814 * FCS, or length errors. 815 * @rx_ttl_1519_4095_frms: Count of total received MAC frames with length 816 * (including FCS, but not framing bits) of between 1519 and 4095 817 * octets inclusive. Includes frames received with frame-too-long, 818 * FCS, or length errors. 819 * @rx_ttl_4096_8191_frms: Count of total received MAC frames with length 820 * (including FCS, but not framing bits) of between 4096 and 8191 821 * octets inclusive. Includes frames received with frame-too-long, 822 * FCS, or length errors. 823 * @rx_ttl_8192_max_frms: Count of total received MAC frames with length 824 * (including FCS, but not framing bits) of between 8192 and 825 * RX_MAX_PYLD_LEN+18 octets inclusive. Includes frames received 826 * with frame-too-long, FCS, or length errors. 827 * @rx_ttl_gt_max_frms: Count of total received MAC frames with length 828 * (including FCS, but not framing bits) exceeding 829 * RX_MAX_PYLD_LEN+18 (+22 bytes if VLAN-tagged) octets inclusive. 830 * Includes frames received with frame-too-long, FCS, or length errors. 831 * @rx_ip: Count of received IP datagrams. Includes errored IP datagrams. 832 * @rx_accepted_ip: Count of received IP datagrams that are passed to the system 833 * @rx_ip_octets: Count of number of octets in received IP datagrams. Includes 834 * errored IP datagrams. 835 * @rx_err_ip: Count of received IP datagrams containing errors. For example, 836 * bad IP checksum. 837 * @rx_icmp: Count of received ICMP messages. Includes errored ICMP messages. 838 * @rx_tcp: Count of received TCP segments. Includes errored TCP segments. 839 * Note: This stat contains a count of all received TCP segments, 840 * regardless of whether or not they pertain to an established 841 * connection. 842 * @rx_udp: Count of received UDP datagrams. 843 * @rx_err_tcp: Count of received TCP segments containing errors. For example, 844 * bad TCP checksum. 845 * @rx_pause_count: Count of number of pause quanta that the MAC has been in 846 * the paused state. Recall, one pause quantum equates to 512 847 * bit times. 848 * @rx_pause_ctrl_frms: Count of received MAC PAUSE control frames. 849 * @rx_unsup_ctrl_frms: Count of received MAC control frames that do not 850 * contain the PAUSE opcode. The sum of RX_PAUSE_CTRL_FRMS and 851 * this register is a count of all received MAC control frames. 852 * Note: This stat may be configured to count all layer 2 errors 853 * (i.e. length errors and FCS errors). 854 * @rx_fcs_err_frms: Count of received MAC frames that do not pass FCS. Does 855 * not include frames received with frame-too-long or 856 * frame-too-short error. 857 * @rx_in_rng_len_err_frms: Count of received frames with a length/type field 858 * value between 46 (42 for VLAN-tagged frames) and 1500 (also 1500 859 * for VLAN-tagged frames), inclusive, that does not match the 860 * number of data octets (including pad) received. Also contains 861 * a count of received frames with a length/type field less than 862 * 46 (42 for VLAN-tagged frames) and the number of data octets 863 * (including pad) received is greater than 46 (42 for VLAN-tagged 864 * frames). 865 * @rx_out_rng_len_err_frms: Count of received frames with length/type field 866 * between 1501 and 1535 decimal, inclusive. 867 * @rx_drop_frms: Count of received frames that could not be passed to the host. 868 * See PORTn_RX_L2_MGMT_DISCARD, PORTn_RX_RPA_DISCARD, 869 * PORTn_RX_TRASH_DISCARD, PORTn_RX_RTS_DISCARD, PORTn_RX_RED_DISCARD 870 * for a list of reasons. Because the RMAC drops one frame at a time, 871 * this stat also indicates the number of drop events. 872 * @rx_discarded_frms: Count of received frames containing error that prevents 873 * them from being passed to the system. See PORTn_RX_FCS_DISCARD, 874 * PORTn_RX_LEN_DISCARD, and PORTn_RX_SWITCH_DISCARD for a list of 875 * reasons. 876 * @rx_drop_ip: Count of received IP datagrams that could not be passed to the 877 * host. See PORTn_RX_DROP_FRMS for a list of reasons. 878 * @rx_drop_udp: Count of received UDP datagrams that are not delivered to the 879 * host. See PORTn_RX_DROP_FRMS for a list of reasons. 880 * @rx_marker_pdu_frms: Count of valid Marker PDUs received on this Aggregation 881 * port. 882 * @rx_lacpdu_frms: Count of valid LACPDUs received on this Aggregation port. 883 * @rx_unknown_pdu_frms: Count of received frames (on this Aggregation port) 884 * that carry the Slow Protocols EtherType, but contain an unknown 885 * PDU. Or frames that contain the Slow Protocols group MAC address, 886 * but do not carry the Slow Protocols EtherType. 887 * @rx_marker_resp_pdu_frms: Count of valid Marker Response PDUs received on 888 * this Aggregation port. 889 * @rx_fcs_discard: Count of received frames that are discarded because the 890 * FCS check failed. 891 * @rx_illegal_pdu_frms: Count of received frames (on this Aggregation port) 892 * that carry the Slow Protocols EtherType, but contain a badly 893 * formed PDU. Or frames that carry the Slow Protocols EtherType, 894 * but contain an illegal value of Protocol Subtype. 895 * @rx_switch_discard: Count of received frames that are discarded by the 896 * internal switch because they did not have an entry in the 897 * Filtering Database. This includes frames that had an invalid 898 * destination MAC address or VLAN ID. It also includes frames are 899 * discarded because they did not satisfy the length requirements 900 * of the target VPATH. 901 * @rx_len_discard: Count of received frames that are discarded because of an 902 * invalid frame length (includes fragments, oversized frames and 903 * mismatch between frame length and length/type field). This stat 904 * can be configured (see XMAC_STATS_GLOBAL_CFG.LEN_DISCARD_HANDLING). 905 * @rx_rpa_discard: Count of received frames that were discarded because the 906 * receive protocol assist (RPA) discovered and error in the frame 907 * or was unable to parse the frame. 908 * @rx_l2_mgmt_discard: Count of Layer 2 management frames (eg. pause frames, 909 * Link Aggregation Control Protocol (LACP) frames, etc.) that are 910 * discarded. 911 * @rx_rts_discard: Count of received frames that are discarded by the receive 912 * traffic steering (RTS) logic. Includes those frame discarded 913 * because the SSC response contradicted the switch table, because 914 * the SSC timed out, or because the target queue could not fit the 915 * frame. 916 * @rx_trash_discard: Count of received frames that are discarded because 917 * receive traffic steering (RTS) steered the frame to the trash 918 * queue. 919 * @rx_buff_full_discard: Count of received frames that are discarded because 920 * internal buffers are full. Includes frames discarded because the 921 * RTS logic is waiting for an SSC lookup that has no timeout bound. 922 * Also, includes frames that are dropped because the MAC2FAU buffer 923 * is nearly full -- this can happen if the external receive buffer 924 * is full and the receive path is backing up. 925 * @rx_red_discard: Count of received frames that are discarded because of RED 926 * (Random Early Discard). 927 * @rx_xgmii_ctrl_err_cnt: Maintains a count of unexpected or misplaced control 928 * characters occuring between times of normal data transmission 929 * (i.e. not included in RX_XGMII_DATA_ERR_CNT). This counter is 930 * incremented when either - 931 * 1) The Reconciliation Sublayer (RS) is expecting one control 932 * character and gets another (i.e. is expecting a Start 933 * character, but gets another control character). 934 * 2) Start control character is not in lane 0 935 * Only increments the count by one for each XGMII column. 936 * @rx_xgmii_data_err_cnt: Maintains a count of unexpected control characters 937 * during normal data transmission. If the Reconciliation Sublayer 938 * (RS) receives a control character, other than a terminate control 939 * character, during receipt of data octets then this register is 940 * incremented. Also increments if the start frame delimiter is not 941 * found in the correct location. Only increments the count by one 942 * for each XGMII column. 943 * @rx_xgmii_char1_match: Maintains a count of the number of XGMII characters 944 * that match a pattern that is programmable through register 945 * XMAC_STATS_RX_XGMII_CHAR_PORTn. By default, the pattern is set 946 * to /E/ (i.e. the error character), thus the statistic tracks the 947 * number of Error characters received at any time. 948 * @rx_xgmii_err_sym: Count of the number of symbol errors in the received 949 * XGMII data (i.e. PHY indicates "Receive Error" on the XGMII). 950 * Only includes symbol errors that are observed between the XGMII 951 * Start Frame Delimiter and End Frame Delimiter, inclusive. And 952 * only increments the count by one for each frame. 953 * @rx_xgmii_column1_match: Maintains a count of the number of XGMII columns 954 * that match a pattern that is programmable through register 955 * XMAC_STATS_RX_XGMII_COLUMN1_PORTn. By default, the pattern is set 956 * to 4 x /E/ (i.e. a column containing all error characters), thus 957 * the statistic tracks the number of Error columns received at any 958 * time. 959 * @rx_xgmii_char2_match: Maintains a count of the number of XGMII characters 960 * that match a pattern that is programmable through register 961 * XMAC_STATS_RX_XGMII_CHAR_PORTn. By default, the pattern is set 962 * to /E/ (i.e. the error character), thus the statistic tracks the 963 * number of Error characters received at any time. 964 * @rx_local_fault: Maintains a count of the number of times that link 965 * transitioned from "up" to "down" due to a local fault. 966 * @rx_xgmii_column2_match: Maintains a count of the number of XGMII columns 967 * that match a pattern that is programmable through register 968 * XMAC_STATS_RX_XGMII_COLUMN2_PORTn. By default, the pattern is set 969 * to 4 x /E/ (i.e. a column containing all error characters), thus 970 * the statistic tracks the number of Error columns received at any 971 * time. If XMAC_STATS_RX_XGMII_BEHAV_COLUMN2_PORTn.NEAR_COL1 is set 972 * to 1, then this stat increments when COLUMN2 is found within 'n' 973 * clocks after COLUMN1. Here, 'n' is defined by 974 * XMAC_STATS_RX_XGMII_BEHAV_COLUMN2_PORTn.NUM_COL (if 'n' is set to 975 * 0, then it means to search anywhere for COLUMN2). 976 * @rx_jettison: Count of received frames that are jettisoned because internal 977 * buffers are full. 978 * @rx_remote_fault: Maintains a count of the number of times that link 979 * transitioned from "up" to "down" due to a remote fault. 980 * 981 * XMAC Port Statistics. 982 */ 983#pragma pack(1) 984typedef struct vxge_hal_xmac_port_stats_t { 985/* 0x000 */ u64 tx_ttl_frms; 986/* 0x008 */ u64 tx_ttl_octets; 987/* 0x010 */ u64 tx_data_octets; 988/* 0x018 */ u64 tx_mcast_frms; 989/* 0x020 */ u64 tx_bcast_frms; 990/* 0x028 */ u64 tx_ucast_frms; 991/* 0x030 */ u64 tx_tagged_frms; 992/* 0x038 */ u64 tx_vld_ip; 993/* 0x040 */ u64 tx_vld_ip_octets; 994/* 0x048 */ u64 tx_icmp; 995/* 0x050 */ u64 tx_tcp; 996/* 0x058 */ u64 tx_rst_tcp; 997/* 0x060 */ u64 tx_udp; 998/* 0x068 */ u32 tx_parse_error; 999/* 0x06c */ u32 tx_unknown_protocol; 1000/* 0x070 */ u64 tx_pause_ctrl_frms; 1001/* 0x078 */ u32 tx_marker_pdu_frms; 1002/* 0x07c */ u32 tx_lacpdu_frms; 1003/* 0x080 */ u32 tx_drop_ip; 1004/* 0x084 */ u32 tx_marker_resp_pdu_frms; 1005/* 0x088 */ u32 tx_xgmii_char2_match; 1006/* 0x08c */ u32 tx_xgmii_char1_match; 1007/* 0x090 */ u32 tx_xgmii_column2_match; 1008/* 0x094 */ u32 tx_xgmii_column1_match; 1009/* 0x098 */ u32 unused1; 1010/* 0x09c */ u16 tx_any_err_frms; 1011/* 0x09e */ u16 tx_drop_frms; 1012/* 0x0a0 */ u64 rx_ttl_frms; 1013/* 0x0a8 */ u64 rx_vld_frms; 1014/* 0x0b0 */ u64 rx_offload_frms; 1015/* 0x0b8 */ u64 rx_ttl_octets; 1016/* 0x0c0 */ u64 rx_data_octets; 1017/* 0x0c8 */ u64 rx_offload_octets; 1018/* 0x0d0 */ u64 rx_vld_mcast_frms; 1019/* 0x0d8 */ u64 rx_vld_bcast_frms; 1020/* 0x0e0 */ u64 rx_accepted_ucast_frms; 1021/* 0x0e8 */ u64 rx_accepted_nucast_frms; 1022/* 0x0f0 */ u64 rx_tagged_frms; 1023/* 0x0f8 */ u64 rx_long_frms; 1024/* 0x100 */ u64 rx_usized_frms; 1025/* 0x108 */ u64 rx_osized_frms; 1026/* 0x110 */ u64 rx_frag_frms; 1027/* 0x118 */ u64 rx_jabber_frms; 1028/* 0x120 */ u64 rx_ttl_64_frms; 1029/* 0x128 */ u64 rx_ttl_65_127_frms; 1030/* 0x130 */ u64 rx_ttl_128_255_frms; 1031/* 0x138 */ u64 rx_ttl_256_511_frms; 1032/* 0x140 */ u64 rx_ttl_512_1023_frms; 1033/* 0x148 */ u64 rx_ttl_1024_1518_frms; 1034/* 0x150 */ u64 rx_ttl_1519_4095_frms; 1035/* 0x158 */ u64 rx_ttl_4096_8191_frms; 1036/* 0x160 */ u64 rx_ttl_8192_max_frms; 1037/* 0x168 */ u64 rx_ttl_gt_max_frms; 1038/* 0x170 */ u64 rx_ip; 1039/* 0x178 */ u64 rx_accepted_ip; 1040/* 0x180 */ u64 rx_ip_octets; 1041/* 0x188 */ u64 rx_err_ip; 1042/* 0x190 */ u64 rx_icmp; 1043/* 0x198 */ u64 rx_tcp; 1044/* 0x1a0 */ u64 rx_udp; 1045/* 0x1a8 */ u64 rx_err_tcp; 1046/* 0x1b0 */ u64 rx_pause_count; 1047/* 0x1b8 */ u64 rx_pause_ctrl_frms; 1048/* 0x1c0 */ u64 rx_unsup_ctrl_frms; 1049/* 0x1c8 */ u64 rx_fcs_err_frms; 1050/* 0x1d0 */ u64 rx_in_rng_len_err_frms; 1051/* 0x1d8 */ u64 rx_out_rng_len_err_frms; 1052/* 0x1e0 */ u64 rx_drop_frms; 1053/* 0x1e8 */ u64 rx_discarded_frms; 1054/* 0x1f0 */ u64 rx_drop_ip; 1055/* 0x1f8 */ u64 rx_drop_udp; 1056/* 0x200 */ u32 rx_marker_pdu_frms; 1057/* 0x204 */ u32 rx_lacpdu_frms; 1058/* 0x208 */ u32 rx_unknown_pdu_frms; 1059/* 0x20c */ u32 rx_marker_resp_pdu_frms; 1060/* 0x210 */ u32 rx_fcs_discard; 1061/* 0x214 */ u32 rx_illegal_pdu_frms; 1062/* 0x218 */ u32 rx_switch_discard; 1063/* 0x21c */ u32 rx_len_discard; 1064/* 0x220 */ u32 rx_rpa_discard; 1065/* 0x224 */ u32 rx_l2_mgmt_discard; 1066/* 0x228 */ u32 rx_rts_discard; 1067/* 0x22c */ u32 rx_trash_discard; 1068/* 0x230 */ u32 rx_buff_full_discard; 1069/* 0x234 */ u32 rx_red_discard; 1070/* 0x238 */ u32 rx_xgmii_ctrl_err_cnt; 1071/* 0x23c */ u32 rx_xgmii_data_err_cnt; 1072/* 0x240 */ u32 rx_xgmii_char1_match; 1073/* 0x244 */ u32 rx_xgmii_err_sym; 1074/* 0x248 */ u32 rx_xgmii_column1_match; 1075/* 0x24c */ u32 rx_xgmii_char2_match; 1076/* 0x250 */ u32 rx_local_fault; 1077/* 0x254 */ u32 rx_xgmii_column2_match; 1078/* 0x258 */ u32 rx_jettison; 1079/* 0x25c */ u32 rx_remote_fault; 1080} vxge_hal_xmac_port_stats_t; 1081 1082#pragma pack() 1083 1084/* 1085 * struct vxge_hal_mrpcim_xmac_stats_t - XMAC Statistics 1086 * 1087 * @aggr_stats: Statistics on aggregate port(port 0, port 1) 1088 * @port_stats: Staticstics on ports(wire 0, wire 1, lag) 1089 * 1090 * XMAC Statistics. 1091 */ 1092typedef struct vxge_hal_mrpcim_xmac_stats_t { 1093 vxge_hal_xmac_aggr_stats_t aggr_stats[VXGE_HAL_MAC_MAX_AGGR_PORTS]; 1094 vxge_hal_xmac_port_stats_t port_stats[VXGE_HAL_MAC_MAX_PORTS]; 1095} vxge_hal_mrpcim_xmac_stats_t; 1096 1097/* 1098 * struct vxge_hal_xmac_vpath_tx_stats_t - XMAC Vpath Tx Statistics 1099 * 1100 * @tx_ttl_eth_frms: Count of successfully transmitted MAC frames. 1101 * @tx_ttl_eth_octets: Count of total octets of transmitted frames, 1102 * not including framing characters (i.e. less framing bits). 1103 * To determine the total octets of transmitted frames, including 1104 * framing characters, multiply TX_TTL_ETH_FRMS by 8 and add it to 1105 * this stat (the device always prepends 8 bytes of preamble for 1106 * each frame) 1107 * @tx_data_octets: Count of data and padding octets of successfully transmitted 1108 * frames. 1109 * @tx_mcast_frms: Count of successfully transmitted frames to a group address 1110 * other than the broadcast address. 1111 * @tx_bcast_frms: Count of successfully transmitted frames to the broadcast 1112 * group address. 1113 * @tx_ucast_frms: Count of transmitted frames containing a unicast address. 1114 * Includes discarded frames that are not sent to the network. 1115 * @tx_tagged_frms: Count of transmitted frames containing a VLAN tag. 1116 * @tx_vld_ip: Count of transmitted IP datagrams that are passed to the network. 1117 * @tx_vld_ip_octets: Count of total octets of transmitted IP datagrams that 1118 * are passed to the network. 1119 * @tx_icmp: Count of transmitted ICMP messages. Includes messages not sent due 1120 * to problems within ICMP. 1121 * @tx_tcp: Count of transmitted TCP segments. Does not include segments 1122 * containing retransmitted octets. 1123 * @tx_rst_tcp: Count of transmitted TCP segments containing the RST flag. 1124 * @tx_udp: Count of transmitted UDP datagrams. 1125 * @tx_unknown_protocol: Increments when the TPA encounters an unknown protocol, 1126 * such as a new IPv6 extension header, or an unsupported Routing 1127 * Type. The packet still has a checksum calculated but it may be 1128 * incorrect. 1129 * @tx_lost_ip: Count of transmitted IP datagrams that could not be passed 1130 * to the network. Increments because of: 1) An internal processing 1131 * error (such as an uncorrectable ECC error). 2) A frame parsing 1132 * error during IP checksum calculation. 1133 * @unused1: Reserved. 1134 * @tx_parse_error: Increments when the TPA is unable to parse a packet. This 1135 * generally occurs when a packet is corrupt somehow, including 1136 * packets that have IP version mismatches, invalid Layer 2 control 1137 * fields, etc. L3/L4 checksums are not offloaded, but the packet 1138 * is still be transmitted. 1139 * @tx_tcp_offload: For frames belonging to offloaded sessions only, a count 1140 * of transmitted TCP segments. Does not include segments containing 1141 * retransmitted octets. 1142 * @tx_retx_tcp_offload: For frames belonging to offloaded sessions only, the 1143 * total number of segments retransmitted. Retransmitted segments 1144 * that are sourced by the host are counted by the host. 1145 * @tx_lost_ip_offload: For frames belonging to offloaded sessions only, a count 1146 * of transmitted IP datagrams that could not be passed to the 1147 * network. 1148 * 1149 * XMAC Vpath TX Statistics. 1150 */ 1151#pragma pack(1) 1152typedef struct vxge_hal_xmac_vpath_tx_stats_t { 1153 u64 tx_ttl_eth_frms; 1154 u64 tx_ttl_eth_octets; 1155 u64 tx_data_octets; 1156 u64 tx_mcast_frms; 1157 u64 tx_bcast_frms; 1158 u64 tx_ucast_frms; 1159 u64 tx_tagged_frms; 1160 u64 tx_vld_ip; 1161 u64 tx_vld_ip_octets; 1162 u64 tx_icmp; 1163 u64 tx_tcp; 1164 u64 tx_rst_tcp; 1165 u64 tx_udp; 1166 u32 tx_unknown_protocol; 1167 u32 tx_lost_ip; 1168 u32 unused1; 1169 u32 tx_parse_error; 1170 u64 tx_tcp_offload; 1171 u64 tx_retx_tcp_offload; 1172 u64 tx_lost_ip_offload; 1173} vxge_hal_xmac_vpath_tx_stats_t; 1174 1175#pragma pack() 1176 1177/* 1178 * struct vxge_hal_xmac_vpath_rx_stats_t - XMAC Vpath RX Statistics 1179 * 1180 * @rx_ttl_eth_frms: Count of successfully received MAC frames. 1181 * @rx_vld_frms: Count of successfully received MAC frames. Does not include 1182 * frames received with frame-too-long, FCS, or length errors. 1183 * @rx_offload_frms: Count of offloaded received frames that are passed to 1184 * the host. 1185 * @rx_ttl_eth_octets: Count of total octets of received frames, not including 1186 * framing characters (i.e. less framing bits). Only counts octets 1187 * of frames that are at least 14 bytes (18 bytes for VLAN-tagged) 1188 * before FCS. To determine the total octets of received frames, 1189 * including framing characters, multiply RX_TTL_ETH_FRMS by 8 and 1190 * add it to this stat (the stat RX_TTL_ETH_FRMS only counts frames 1191 * that have the required 8 bytes of preamble). 1192 * @rx_data_octets: Count of data and padding octets of successfully received 1193 * frames. Does not include frames received with frame-too-long, 1194 * FCS, or length errors. 1195 * @rx_offload_octets: Count of total octets, not including framing characters, 1196 * of offloaded received frames that are passed to the host. 1197 * @rx_vld_mcast_frms: Count of successfully received MAC frames containing a 1198 * nonbroadcast group address. Does not include frames received with 1199 * frame-too-long, FCS, or length errors. 1200 * @rx_vld_bcast_frms: Count of successfully received MAC frames containing the 1201 * broadcast group address. Does not include frames received with 1202 * frame-too-long, FCS, or length errors. 1203 * @rx_accepted_ucast_frms: Count of successfully received frames containing 1204 * a unicast address. Only includes frames that are passed to the 1205 * system. 1206 * @rx_accepted_nucast_frms: Count of successfully received frames containing 1207 * a non-unicast (broadcast or multicast) address. Only includes 1208 * frames that are passed to the system. Could include, for instance, 1209 * non-unicast frames that contain FCS errors if the MAC_ERROR_CFG 1210 * register is set to pass FCS-errored frames to the host. 1211 * @rx_tagged_frms: Count of received frames containing a VLAN tag. 1212 * @rx_long_frms: Count of received frames that are longer than RX_MAX_PYLD_LEN 1213 * + 18 bytes (+ 22 bytes if VLAN-tagged). 1214 * @rx_usized_frms: Count of received frames of length (including FCS, but not 1215 * framing bits) less than 64 octets, that are otherwise well-formed. 1216 * In other words, counts runts. 1217 * @rx_osized_frms: Count of received frames of length (including FCS, but not 1218 * framing bits) more than 1518 octets, that are otherwise 1219 * well-formed. 1220 * @rx_frag_frms: Count of received frames of length (including FCS, but not 1221 * framing bits) less than 64 octets that had bad FCS. In other words, 1222 * counts fragments. 1223 * @rx_jabber_frms: Count of received frames of length (including FCS, but not 1224 * framing bits) more than 1518 octets that had bad FCS. In other 1225 * words, counts jabbers. 1226 * @rx_ttl_64_frms: Count of total received MAC frames with length (including 1227 * FCS, but not framing bits) of exactly 64 octets. Includes frames 1228 * received with frame-too-long, FCS, or length errors. 1229 * @rx_ttl_65_127_frms: Count of total received MAC frames with length(including 1230 * FCS, but not framing bits) of between 65 and 127 octets inclusive. 1231 * Includes frames received with frame-too-long, FCS, or length errors. 1232 * @rx_ttl_128_255_frms: Count of total received MAC frames with length 1233 * (including FCS, but not framing bits) of between 128 and 255 octets 1234 * inclusive. Includes frames received with frame-too-long, FCS, 1235 * or length errors. 1236 * @rx_ttl_256_511_frms: Count of total received MAC frames with length 1237 * (including FCS, but not framing bits) of between 256 and 511 octets 1238 * inclusive. Includes frames received with frame-too-long, FCS, or 1239 * length errors. 1240 * @rx_ttl_512_1023_frms: Count of total received MAC frames with length 1241 * (including FCS, but not framing bits) of between 512 and 1023 1242 * octets inclusive. Includes frames received with frame-too-long, 1243 * FCS, or length errors. 1244 * @rx_ttl_1024_1518_frms: Count of total received MAC frames with length 1245 * (including FCS, but not framing bits) of between 1024 and 1518 1246 * octets inclusive. Includes frames received with frame-too-long, 1247 * FCS, or length errors. 1248 * @rx_ttl_1519_4095_frms: Count of total received MAC frames with length 1249 * (including FCS, but not framing bits) of between 1519 and 4095 1250 * octets inclusive. Includes frames received with frame-too-long, 1251 * FCS, or length errors. 1252 * @rx_ttl_4096_8191_frms: Count of total received MAC frames with length 1253 * (including FCS, but not framing bits) of between 4096 and 8191 1254 * octets inclusive. Includes frames received with frame-too-long, 1255 * FCS, or length errors. 1256 * @rx_ttl_8192_max_frms: Count of total received MAC frames with length 1257 * (including FCS, but not framing bits) of between 8192 and 1258 * RX_MAX_PYLD_LEN+18 octets inclusive. Includes frames received 1259 * with frame-too-long, FCS, or length errors. 1260 * @rx_ttl_gt_max_frms: Count of total received MAC frames with length 1261 * (including FCS, but not framing bits) exceeding RX_MAX_PYLD_LEN+18 1262 * (+22 bytes if VLAN-tagged) octets inclusive. Includes frames 1263 * received with frame-too-long, FCS, or length errors. 1264 * @rx_ip: Count of received IP datagrams. Includes errored IP datagrams. 1265 * @rx_accepted_ip: Count of received IP datagrams that are passed to the system 1266 * @rx_ip_octets: Count of number of octets in received IP datagrams. 1267 * Includes errored IP datagrams. 1268 * @rx_err_ip: Count of received IP datagrams containing errors. For example, 1269 * bad IP checksum. 1270 * @rx_icmp: Count of received ICMP messages. Includes errored ICMP messages. 1271 * @rx_tcp: Count of received TCP segments. Includes errored TCP segments. 1272 * Note: This stat contains a count of all received TCP segments, 1273 * regardless of whether or not they pertain to an established 1274 * connection. 1275 * @rx_udp: Count of received UDP datagrams. 1276 * @rx_err_tcp: Count of received TCP segments containing errors. For example, 1277 * bad TCP checksum. 1278 * @rx_lost_frms: Count of received frames that could not be passed to the host. 1279 * See RX_QUEUE_FULL_DISCARD and RX_RED_DISCARD for list of reasons 1280 * @rx_lost_ip: Count of received IP datagrams that could not be passed to 1281 * the host. See RX_LOST_FRMS for a list of reasons. 1282 * @rx_lost_ip_offload: For frames belonging to offloaded sessions only, a count 1283 * of received IP datagrams that could not be passed to the host. 1284 * See RX_LOST_FRMS for a list of reasons. 1285 * @rx_various_discard: Count of received frames that are discarded because 1286 * the target receive queue is full. 1287 * @rx_sleep_discard: Count of received frames that are discarded because the 1288 * target VPATH is asleep (a Wake-on-LAN magic packet can be used 1289 * to awaken the VPATH). 1290 * @rx_red_discard: Count of received frames that are discarded because of RED 1291 * (Random Early Discard). 1292 * @rx_queue_full_discard: Count of received frames that are discarded because 1293 * the target receive queue is full. 1294 * @rx_mpa_ok_frms: Count of received frames that pass the MPA checks. 1295 * 1296 * XMAC Vpath RX Statistics. 1297 */ 1298#pragma pack(1) 1299typedef struct vxge_hal_xmac_vpath_rx_stats_t { 1300 u64 rx_ttl_eth_frms; 1301 u64 rx_vld_frms; 1302 u64 rx_offload_frms; 1303 u64 rx_ttl_eth_octets; 1304 u64 rx_data_octets; 1305 u64 rx_offload_octets; 1306 u64 rx_vld_mcast_frms; 1307 u64 rx_vld_bcast_frms; 1308 u64 rx_accepted_ucast_frms; 1309 u64 rx_accepted_nucast_frms; 1310 u64 rx_tagged_frms; 1311 u64 rx_long_frms; 1312 u64 rx_usized_frms; 1313 u64 rx_osized_frms; 1314 u64 rx_frag_frms; 1315 u64 rx_jabber_frms; 1316 u64 rx_ttl_64_frms; 1317 u64 rx_ttl_65_127_frms; 1318 u64 rx_ttl_128_255_frms; 1319 u64 rx_ttl_256_511_frms; 1320 u64 rx_ttl_512_1023_frms; 1321 u64 rx_ttl_1024_1518_frms; 1322 u64 rx_ttl_1519_4095_frms; 1323 u64 rx_ttl_4096_8191_frms; 1324 u64 rx_ttl_8192_max_frms; 1325 u64 rx_ttl_gt_max_frms; 1326 u64 rx_ip; 1327 u64 rx_accepted_ip; 1328 u64 rx_ip_octets; 1329 u64 rx_err_ip; 1330 u64 rx_icmp; 1331 u64 rx_tcp; 1332 u64 rx_udp; 1333 u64 rx_err_tcp; 1334 u64 rx_lost_frms; 1335 u64 rx_lost_ip; 1336 u64 rx_lost_ip_offload; 1337 u16 rx_various_discard; 1338 u16 rx_sleep_discard; 1339 u16 rx_red_discard; 1340 u16 rx_queue_full_discard; 1341 u64 rx_mpa_ok_frms; 1342} vxge_hal_xmac_vpath_rx_stats_t; 1343 1344#pragma pack() 1345 1346/* 1347 * struct vxge_hal_device_xmac_stats_t - XMAC Statistics 1348 * 1349 * @vpath_tx_stats: Per vpath XMAC TX stats 1350 * @vpath_rx_stats: Per vpath XMAC RX stats 1351 * 1352 * XMAC Statistics. 1353 */ 1354typedef struct vxge_hal_device_xmac_stats_t { 1355 vxge_hal_xmac_vpath_tx_stats_t vpath_tx_stats[VXGE_HAL_MAX_VIRTUAL_PATHS]; 1356 vxge_hal_xmac_vpath_rx_stats_t vpath_rx_stats[VXGE_HAL_MAX_VIRTUAL_PATHS]; 1357} vxge_hal_device_xmac_stats_t; 1358 1359/* 1360 * struct vxge_hal_vpath_stats_hw_info_t - X3100 vpath hardware statistics. 1361 * @ini_num_mwr_sent: The number of PCI memory writes initiated by the PIC block 1362 * for the given VPATH 1363 * @unused1: Reserved 1364 * @ini_num_mrd_sent: The number of PCI memory reads initiated by the PIC block 1365 * @unused2: Reserved 1366 * @ini_num_cpl_rcvd: The number of PCI read completions received by the 1367 * PIC block 1368 * @unused3: Reserved 1369 * @ini_num_mwr_byte_sent: The number of PCI memory write bytes sent by the PIC 1370 * block to the host 1371 * @ini_num_cpl_byte_rcvd: The number of PCI read completion bytes received by 1372 * the PIC block 1373 * @wrcrdtarb_xoff: TBD 1374 * @unused4: Reserved 1375 * @rdcrdtarb_xoff: TBD 1376 * @unused5: Reserved 1377 * @vpath_genstats_count0: Configurable statistic #1. Refer to the GENSTATS0_CFG 1378 * for information on configuring this statistic 1379 * @vpath_genstats_count1: Configurable statistic #2. Refer to the GENSTATS1_CFG 1380 * for information on configuring this statistic 1381 * @vpath_genstats_count2: Configurable statistic #3. Refer to the GENSTATS2_CFG 1382 * for information on configuring this statistic 1383 * @vpath_genstats_count3: Configurable statistic #4. Refer to the GENSTATS3_CFG 1384 * for information on configuring this statistic 1385 * @vpath_genstats_count4: Configurable statistic #5. Refer to the GENSTATS4_CFG 1386 * for information on configuring this statistic 1387 * @unused6: Reserved 1388 * @vpath_gennstats_count5: Configurable statistic #6. Refer to the 1389 * GENSTATS5_CFG for information on configuring this statistic 1390 * @unused7: Reserved 1391 * @tx_stats: Transmit stats 1392 * @rx_stats: Receive stats 1393 * @unused9: Reserved 1394 * @prog_event_vnum1: Programmable statistic. Increments when internal logic 1395 * detects a certain event. See register 1396 * XMAC_STATS_CFG.EVENT_VNUM1_CFG for more information. 1397 * @prog_event_vnum0: Programmable statistic. Increments when internal logic 1398 * detects a certain event. See register 1399 * XMAC_STATS_CFG.EVENT_VNUM0_CFG for more information. 1400 * @prog_event_vnum3: Programmable statistic. Increments when internal logic 1401 * detects a certain event. See register 1402 * XMAC_STATS_CFG.EVENT_VNUM3_CFG for more information. 1403 * @prog_event_vnum2: Programmable statistic. Increments when internal logic 1404 * detects a certain event. See register 1405 * XMAC_STATS_CFG.EVENT_VNUM2_CFG for more information. 1406 * @rx_multi_cast_frame_discard: TBD 1407 * @unused10: Reserved 1408 * @rx_frm_transferred: TBD 1409 * @unused11: Reserved 1410 * @rxd_returned: TBD 1411 * @unused12: Reserved 1412 * @rx_mpa_len_fail_frms: Count of received frames failed the MPA length check 1413 * @rx_mpa_mrk_fail_frms: Count of received frames failed the MPA marker check 1414 * @rx_mpa_crc_fail_frms: Count of received frames failed the MPA CRC check 1415 * @rx_permitted_frms: Count of frames that pass through the FAU and on to the 1416 * frame buffer (and subsequently to the host). 1417 * @rx_vp_reset_discarded_frms: Count of receive frames that are discarded 1418 * because the VPATH is in reset 1419 * @rx_wol_frms: Count of received "magic packet" frames. Stat increments 1420 * whenever the received frame matches the VPATH's Wake-on-LAN 1421 * signature(s) CRC. 1422 * @tx_vp_reset_discarded_frms: Count of transmit frames that are discarded 1423 * because the VPATH is in reset.Includes frames that are discarded 1424 * because the current VPIN does not match that VPIN of the frame 1425 * 1426 * X3100 vpath hardware statistics. 1427 */ 1428#pragma pack(1) 1429typedef struct vxge_hal_vpath_stats_hw_info_t { 1430/* 0x000 */ u32 ini_num_mwr_sent; 1431/* 0x004 */ u32 unused1; 1432/* 0x008 */ u32 ini_num_mrd_sent; 1433/* 0x00c */ u32 unused2; 1434/* 0x010 */ u32 ini_num_cpl_rcvd; 1435/* 0x014 */ u32 unused3; 1436/* 0x018 */ u64 ini_num_mwr_byte_sent; 1437/* 0x020 */ u64 ini_num_cpl_byte_rcvd; 1438/* 0x028 */ u32 wrcrdtarb_xoff; 1439/* 0x02c */ u32 unused4; 1440/* 0x030 */ u32 rdcrdtarb_xoff; 1441/* 0x034 */ u32 unused5; 1442/* 0x038 */ u32 vpath_genstats_count0; 1443/* 0x03c */ u32 vpath_genstats_count1; 1444/* 0x040 */ u32 vpath_genstats_count2; 1445/* 0x044 */ u32 vpath_genstats_count3; 1446/* 0x048 */ u32 vpath_genstats_count4; 1447/* 0x04c */ u32 unused6; 1448/* 0x050 */ u32 vpath_genstats_count5; 1449/* 0x054 */ u32 unused7; 1450/* 0x058 */ vxge_hal_xmac_vpath_tx_stats_t tx_stats; 1451/* 0x0e8 */ vxge_hal_xmac_vpath_rx_stats_t rx_stats; 1452/* 0x220 */ u64 unused9; 1453/* 0x228 */ u32 prog_event_vnum1; 1454/* 0x22c */ u32 prog_event_vnum0; 1455/* 0x230 */ u32 prog_event_vnum3; 1456/* 0x234 */ u32 prog_event_vnum2; 1457/* 0x238 */ u16 rx_multi_cast_frame_discard; 1458/* 0x23a */ u8 unused10[6]; 1459/* 0x240 */ u32 rx_frm_transferred; 1460/* 0x244 */ u32 unused11; 1461/* 0x248 */ u16 rxd_returned; 1462/* 0x24a */ u8 unused12[6]; 1463/* 0x252 */ u16 rx_mpa_len_fail_frms; 1464/* 0x254 */ u16 rx_mpa_mrk_fail_frms; 1465/* 0x256 */ u16 rx_mpa_crc_fail_frms; 1466/* 0x258 */ u16 rx_permitted_frms; 1467/* 0x25c */ u64 rx_vp_reset_discarded_frms; 1468/* 0x25e */ u64 rx_wol_frms; 1469/* 0x260 */ u64 tx_vp_reset_discarded_frms; 1470} vxge_hal_vpath_stats_hw_info_t; 1471 1472#pragma pack() 1473 1474/* 1475 * struct vxge_hal_device_stats_mrpcim_info_t - X3100 mrpcim hardware 1476 * statistics. 1477 * @pic_ini_rd_drop: Number of DMA reads initiated by the adapter that were 1478 * discarded because the VPATH is out of service 1479 * @pic_ini_wr_drop: Number of DMA writes initiated by the adapter that were 1480 * discared because the VPATH is out of service 1481 * @pic_wrcrdtarb_ph_crdt_depleted: Number of times the posted header credits 1482 * for upstream PCI writes were depleted 1483 * @unused1: Reserved 1484 * @pic_wrcrdtarb_ph_crdt_depleted_vplane: Array of structures containing above 1485 * two fields. 1486 * @pic_wrcrdtarb_pd_crdt_depleted: Number of times the posted data credits for 1487 * upstream PCI writes were depleted 1488 * @unused2: Reserved 1489 * @pic_wrcrdtarb_pd_crdt_depleted_vplane: Array of structures containing above 1490 * two fields. 1491 * @pic_rdcrdtarb_nph_crdt_depleted: Number of times the non-posted header 1492 * credits for upstream PCI reads were depleted 1493 * @unused3: Reserved 1494 * @pic_rdcrdtarb_nph_crdt_depleted_vplane: Array of structures containing above 1495 * two fields. 1496 * @pic_ini_rd_vpin_drop: Number of DMA reads initiated by the adapter that were 1497 * discarded because the VPATH instance number does not match 1498 * @pic_ini_wr_vpin_drop: Number of DMA writes initiated by the adapter that 1499 * were discarded because the VPATH instance number does not match 1500 * @pic_genstats_count0: Configurable statistic #1. Refer to the GENSTATS0_CFG 1501 * for information on configuring this statistic 1502 * @pic_genstats_count1: Configurable statistic #2. Refer to the GENSTATS1_CFG 1503 * for information on configuring this statistic 1504 * @pic_genstats_count2: Configurable statistic #3. Refer to the GENSTATS2_CFG 1505 * for information on configuring this statistic 1506 * @pic_genstats_count3: Configurable statistic #4. Refer to the GENSTATS3_CFG 1507 * for information on configuring this statistic 1508 * @pic_genstats_count4: Configurable statistic #5. Refer to the GENSTATS4_CFG 1509 * for information on configuring this statistic 1510 * @unused4: Reserved 1511 * @pic_genstats_count5: Configurable statistic #6. Refer to the GENSTATS5_CFG 1512 * for information on configuring this statistic 1513 * @unused5: Reserved 1514 * @pci_rstdrop_cpl: TBD 1515 * @pci_rstdrop_msg: TBD 1516 * @pci_rstdrop_client1: TBD 1517 * @pci_rstdrop_client0: TBD 1518 * @pci_rstdrop_client2: TBD 1519 * @unused6: Reserved 1520 * @unused7: Reserved 1521 * @pci_depl_cplh: Number of times completion header credits were depleted 1522 * @pci_depl_nph: Number of times non posted header credits were depleted 1523 * @pci_depl_ph: Number of times the posted header credits were depleted 1524 * @pci_depl_h_vplane: Array of structures containing above four fields. 1525 * @unused8: Reserved 1526 * @pci_depl_cpld: Number of times completion data credits were depleted 1527 * @pci_depl_npd: Number of times non posted data credits were depleted 1528 * @pci_depl_pd: Number of times the posted data credits were depleted 1529 * @pci_depl_d_vplane: Array of structures containing above four fields. 1530 * @xgmac_port: Array of xmac port stats 1531 * @xgmac_aggr: Array of aggr port stats 1532 * @xgmac_global_prog_event_gnum0: Programmable statistic. Increments when 1533 * internal logic detects a certain event. See register 1534 * XMAC_STATS_GLOBAL_CFG.EVENT_GNUM0_CFG for more information. 1535 * @xgmac_global_prog_event_gnum1: Programmable statistic. Increments when 1536 * internal logic detects a certain event. See register 1537 * XMAC_STATS_GLOBAL_CFG.EVENT_GNUM1_CFG for more information. 1538 * @unused9: Reserved 1539 * @xgmac.orp_lro_events: TBD 1540 * @xgmac.orp_bs_events: TBD 1541 * @xgmac.orp_iwarp_events: TBD 1542 * @unused10: Reserved 1543 * @xgmac.tx_permitted_frms: TBD 1544 * @unused11: Reserved 1545 * @unused12: Reserved 1546 * @xgmac.port2_tx_any_frms: TBD 1547 * @xgmac.port1_tx_any_frms: TBD 1548 * @xgmac.port0_tx_any_frms: TBD 1549 * @unused13: Reserved 1550 * @unused14: Reserved 1551 * @xgmac.port2_rx_any_frms: TBD 1552 * @xgmac.port1_rx_any_frms: TBD 1553 * @xgmac.port0_rx_any_frms: TBD 1554 * 1555 * X3100 mrpcim hardware statistics. 1556 */ 1557#pragma pack(1) 1558typedef struct vxge_hal_mrpcim_stats_hw_info_t { 1559/* 0x0000 */ u32 pic_ini_rd_drop; 1560/* 0x0004 */ u32 pic_ini_wr_drop; 1561/* 0x0008 */ struct { 1562 /* 0x0000 */ u32 pic_wrcrdtarb_ph_crdt_depleted; 1563 /* 0x0004 */ u32 unused1; 1564 } pic_wrcrdtarb_ph_crdt_depleted_vplane[17]; 1565/* 0x0090 */ struct { 1566 /* 0x0000 */ u32 pic_wrcrdtarb_pd_crdt_depleted; 1567 /* 0x0004 */ u32 unused2; 1568 } pic_wrcrdtarb_pd_crdt_depleted_vplane[17]; 1569/* 0x0118 */ struct { 1570 /* 0x0000 */ u32 pic_rdcrdtarb_nph_crdt_depleted; 1571 /* 0x0004 */ u32 unused3; 1572 } pic_rdcrdtarb_nph_crdt_depleted_vplane[17]; 1573/* 0x01a0 */ u32 pic_ini_rd_vpin_drop; 1574/* 0x01a4 */ u32 pic_ini_wr_vpin_drop; 1575/* 0x01a8 */ u32 pic_genstats_count0; 1576/* 0x01ac */ u32 pic_genstats_count1; 1577/* 0x01b0 */ u32 pic_genstats_count2; 1578/* 0x01b4 */ u32 pic_genstats_count3; 1579/* 0x01b8 */ u32 pic_genstats_count4; 1580/* 0x01bc */ u32 unused4; 1581/* 0x01c0 */ u32 pic_genstats_count5; 1582/* 0x01c4 */ u32 unused5; 1583/* 0x01c8 */ u32 pci_rstdrop_cpl; 1584/* 0x01cc */ u32 pci_rstdrop_msg; 1585/* 0x01d0 */ u32 pci_rstdrop_client1; 1586/* 0x01d4 */ u32 pci_rstdrop_client0; 1587/* 0x01d8 */ u32 pci_rstdrop_client2; 1588/* 0x01dc */ u32 unused6; 1589/* 0x01e0 */ struct { 1590 /* 0x0000 */ u16 unused7; 1591 /* 0x0002 */ u16 pci_depl_cplh; 1592 /* 0x0004 */ u16 pci_depl_nph; 1593 /* 0x0006 */ u16 pci_depl_ph; 1594 } pci_depl_h_vplane[17]; 1595/* 0x0268 */ struct { 1596 /* 0x0000 */ u16 unused8; 1597 /* 0x0002 */ u16 pci_depl_cpld; 1598 /* 0x0004 */ u16 pci_depl_npd; 1599 /* 0x0006 */ u16 pci_depl_pd; 1600 } pci_depl_d_vplane[17]; 1601/* 0x02f0 */ vxge_hal_xmac_port_stats_t xgmac_port[3]; 1602/* 0x0a10 */ vxge_hal_xmac_aggr_stats_t xgmac_aggr[2]; 1603/* 0x0ae0 */ u64 xgmac_global_prog_event_gnum0; 1604/* 0x0ae8 */ u64 xgmac_global_prog_event_gnum1; 1605/* 0x0af0 */ u64 unused9; 1606/* 0x0af8 */ u64 xgmac_orp_lro_events; 1607/* 0x0b00 */ u64 xgmac_orp_bs_events; 1608/* 0x0b08 */ u64 xgmac_orp_iwarp_events; 1609/* 0x0b10 */ u32 unused10; 1610/* 0x0b14 */ u32 xgmac_tx_permitted_frms; 1611/* 0x0b18 */ u32 unused11; 1612/* 0x0b1c */ u8 unused12; 1613/* 0x0b1d */ u8 xgmac_port2_tx_any_frms; 1614/* 0x0b1e */ u8 xgmac_port1_tx_any_frms; 1615/* 0x0b1f */ u8 xgmac_port0_tx_any_frms; 1616/* 0x0b20 */ u32 unused13; 1617/* 0x0b24 */ u8 unused14; 1618/* 0x0b25 */ u8 xgmac_port2_rx_any_frms; 1619/* 0x0b26 */ u8 xgmac_port1_rx_any_frms; 1620/* 0x0b27 */ u8 xgmac_port0_rx_any_frms; 1621} vxge_hal_mrpcim_stats_hw_info_t; 1622 1623#pragma pack() 1624 1625/* 1626 * struct vxge_hal_mrpcim_xpak_stats_t - HAL xpak stats 1627 * @excess_temp: excess transceiver_temperature count 1628 * @excess_bias_current: excess laser_bias_current count 1629 * @excess_laser_output: excess laser_output_power count 1630 * @alarm_transceiver_temp_high: alarm_transceiver_temp_high count value 1631 * @alarm_transceiver_temp_low : alarm_transceiver_temp_low count value 1632 * @alarm_laser_bias_current_high: alarm_laser_bias_current_high count value 1633 * @alarm_laser_bias_current_low: alarm_laser_bias_current_low count value 1634 * @alarm_laser_output_power_high: alarm_laser_output_power_high count value 1635 * @alarm_laser_output_power_low: alarm_laser_output_power_low count value 1636 * @warn_transceiver_temp_high: warn_transceiver_temp_high count value 1637 * @warn_transceiver_temp_low: warn_transceiver_temp_low count value 1638 * @warn_laser_bias_current_high: warn_laser_bias_current_high count value 1639 * @warn_laser_bias_current_low: warn_laser_bias_current_low count value 1640 * @warn_laser_output_power_high: warn_laser_output_power_high count value 1641 * @warn_laser_output_power_low: warn_laser_output_power_low count value 1642 */ 1643typedef struct vxge_hal_mrpcim_xpak_stats_t { 1644 u32 excess_temp; 1645 u32 excess_bias_current; 1646 u32 excess_laser_output; 1647 u16 alarm_transceiver_temp_high; 1648 u16 alarm_transceiver_temp_low; 1649 u16 alarm_laser_bias_current_high; 1650 u16 alarm_laser_bias_current_low; 1651 u16 alarm_laser_output_power_high; 1652 u16 alarm_laser_output_power_low; 1653 u16 warn_transceiver_temp_high; 1654 u16 warn_transceiver_temp_low; 1655 u16 warn_laser_bias_current_high; 1656 u16 warn_laser_bias_current_low; 1657 u16 warn_laser_output_power_high; 1658 u16 warn_laser_output_power_low; 1659} vxge_hal_mrpcim_xpak_stats_t; 1660 1661/* 1662 * struct vxge_hal_device_stats_hw_info_t - X3100 hardware statistics. 1663 * @vpath_info: VPath statistics 1664 * @vpath_info_sav: Vpath statistics saved 1665 * 1666 * X3100 hardware statistics. 1667 */ 1668typedef struct vxge_hal_device_stats_hw_info_t { 1669 vxge_hal_vpath_stats_hw_info_t *vpath_info[VXGE_HAL_MAX_VIRTUAL_PATHS]; 1670 vxge_hal_vpath_stats_hw_info_t vpath_info_sav[VXGE_HAL_MAX_VIRTUAL_PATHS]; 1671} vxge_hal_device_stats_hw_info_t; 1672 1673/* 1674 * struct vxge_hal_vpath_stats_sw_common_info_t - HAL common stats for queues. 1675 * @full_cnt: Number of times the queue was full 1676 * @usage_cnt: usage count. 1677 * @usage_max: Maximum usage 1678 * @avg_compl_per_intr_cnt: Average number of completions per interrupt. 1679 * Note that a total number of completed descriptors 1680 * for the given channel can be calculated as 1681 * (@traffic_intr_cnt * @avg_compl_per_intr_cnt). 1682 * @total_compl_cnt: Total completion count. 1683 * @total_compl_cnt == (@traffic_intr_cnt * @avg_compl_per_intr_cnt). 1684 * 1685 * HAL common counters for queues 1686 * See also: vxge_hal_vpath_stats_sw_fifo_info_t {}, 1687 * vxge_hal_vpath_stats_sw_ring_info_t {}, 1688 * vxge_hal_vpath_stats_sw_dmq_info_t {}, 1689 * vxge_hal_vpath_stats_sw_umq_info_t {}, 1690 * vxge_hal_vpath_stats_sw_srq_info_t {}, 1691 * vxge_hal_vpath_stats_sw_cqrq_info_t {}. 1692 */ 1693typedef struct vxge_hal_vpath_stats_sw_common_info_t { 1694 u32 full_cnt; 1695 u32 usage_cnt; 1696 u32 usage_max; 1697 u32 avg_compl_per_intr_cnt; 1698 u32 total_compl_cnt; 1699} vxge_hal_vpath_stats_sw_common_info_t; 1700 1701/* 1702 * struct vxge_hal_vpath_stats_sw_fifo_info_t - HAL fifo statistics 1703 * @common_stats: Common counters for all queues 1704 * @total_posts: Total number of postings on the queue. 1705 * @total_buffers: Total number of buffers posted. 1706 * @avg_buffers_per_post: Average number of buffers transferred in a single 1707 * post operation. Calculated as @total_buffers/@total_posts. 1708 * @copied_buffers: Number of buffers copied 1709 * @avg_buffer_size: Average buffer size transferred by a single post 1710 * operation. Calculated as a total number of transmitted octets 1711 * divided by @total_buffers. 1712 * @avg_post_size: Average amount of data transferred by a single post. 1713 * Calculated as a total number of transmitted octets divided by 1714 * @total_posts. 1715 * @total_frags: Total number of fragments 1716 * @copied_frags: Number of fragments copied 1717 * @total_posts_dang_dtrs: Total number of posts involving dangling descriptors. 1718 * @total_posts_dang_frags: Total number of dangling fragments posted during 1719 * post request containing multiple descriptors. 1720 * @txd_t_code_err_cnt: Array of transmit transfer codes. The position 1721 * (index) in this array reflects the transfer code type, for instance 1722 * 0xA - "loss of link". 1723 * Value txd_t_code_err_cnt[i] reflects the 1724 * number of times the corresponding transfer code was encountered. 1725 * 1726 * HAL fifo counters 1727 * See also: vxge_hal_vpath_stats_sw_common_info_t {}, 1728 * vxge_hal_vpath_stats_sw_ring_info_t {}, 1729 * vxge_hal_vpath_stats_sw_dmq_info_t {}, 1730 * vxge_hal_vpath_stats_sw_umq_info_t {}, 1731 * vxge_hal_vpath_stats_sw_sq_info_t {}, 1732 * vxge_hal_vpath_stats_sw_srq_info_t {}, 1733 * vxge_hal_vpath_stats_sw_cqrq_info_t {}. 1734 */ 1735typedef struct vxge_hal_vpath_stats_sw_fifo_info_t { 1736 vxge_hal_vpath_stats_sw_common_info_t common_stats; 1737 u32 total_posts; 1738 u32 total_buffers; 1739 u32 avg_buffers_per_post; 1740 u32 copied_buffers; 1741 u32 avg_buffer_size; 1742 u32 avg_post_size; 1743 u32 total_frags; 1744 u32 copied_frags; 1745 u32 total_posts_dang_dtrs; 1746 u32 total_posts_dang_frags; 1747 u32 txd_t_code_err_cnt[16]; 1748} vxge_hal_vpath_stats_sw_fifo_info_t; 1749 1750/* 1751 * struct vxge_hal_vpath_stats_sw_ring_info_t - HAL ring statistics 1752 * @common_stats: Common counters for all queues 1753 * @rxd_t_code_err_cnt: Array of receive transfer codes. The position 1754 * (index) in this array reflects the transfer code type, 1755 * for instance 1756 * 0x7 - for "invalid receive buffer size", or 0x8 - for ECC. 1757 * Value rxd_t_code_err_cnt[i] reflects the 1758 * number of times the corresponding transfer code was encountered. 1759 * @lro_clubbed_frms_cnt: Total no of Aggregated packets 1760 * @lro_sending_both: Number of times the aggregation of packets broken 1761 * @lro_outof_sequence_pkts: Number of out of order packets 1762 * @lro_flush_max_pkts: Number of times we reached upper packet limit for 1763 * aggregation per session 1764 * @lro_sum_avg_pkts_aggregated: Total number of packets considered for 1765 * aggregation 1766 * @lro_num_aggregations: Number of packets sent to the stack 1767 * @lro_max_pkts_aggr: Max number of aggr packet per ring 1768 * @lro_avg_agr_pkts: Average Aggregate packet 1769 * 1770 * HAL ring counters 1771 * See also: vxge_hal_vpath_stats_sw_common_info_t {}, 1772 * vxge_hal_vpath_stats_sw_fifo_info_t {}, 1773 * vxge_hal_vpath_stats_sw_dmq_info_t {}, 1774 * vxge_hal_vpath_stats_sw_umq_info_t {}, 1775 * vxge_hal_vpath_stats_sw_sq_info_t {}, 1776 * vxge_hal_vpath_stats_sw_srq_info_t {}, 1777 * vxge_hal_vpath_stats_sw_cqrq_info_t {}. 1778 */ 1779typedef struct vxge_hal_vpath_stats_sw_ring_info_t { 1780 vxge_hal_vpath_stats_sw_common_info_t common_stats; 1781 u32 rxd_t_code_err_cnt[16]; 1782} vxge_hal_vpath_stats_sw_ring_info_t; 1783 1784/* 1785 * struct vxge_hal_vpath_stats_sw_dmq_info_t - HAL dmq statistics 1786 * @common_stats: Common counters for all queues 1787 * 1788 * HAL dmq counters 1789 * See also: vxge_hal_vpath_stats_sw_common_info_t {}, 1790 * vxge_hal_vpath_stats_sw_fifo_info_t {}, 1791 * vxge_hal_vpath_stats_sw_ring_info_t {}, 1792 * vxge_hal_vpath_stats_sw_umq_info_t {}, 1793 * vxge_hal_vpath_stats_sw_sq_info_t {}, 1794 * vxge_hal_vpath_stats_sw_srq_info_t {}, 1795 * vxge_hal_vpath_stats_sw_cqrq_info_t {}. 1796 */ 1797typedef struct vxge_hal_vpath_stats_sw_dmq_info_t { 1798 vxge_hal_vpath_stats_sw_common_info_t common_stats; 1799} vxge_hal_vpath_stats_sw_dmq_info_t; 1800 1801/* 1802 * struct vxge_hal_vpath_stats_sw_umq_info_t - HAL umq statistics 1803 * @common_stats: Common counters for all queues 1804 * 1805 * HAL dmq counters 1806 * See also: vxge_hal_vpath_stats_sw_common_info_t {}, 1807 * vxge_hal_vpath_stats_sw_fifo_info_t {}, 1808 * vxge_hal_vpath_stats_sw_ring_info_t {}, 1809 * vxge_hal_vpath_stats_sw_dmq_info_t {}, 1810 * vxge_hal_vpath_stats_sw_sq_info_t {}, 1811 * vxge_hal_vpath_stats_sw_srq_info_t {}, 1812 * vxge_hal_vpath_stats_sw_cqrq_info_t {}. 1813 */ 1814typedef struct vxge_hal_vpath_stats_sw_umq_info_t { 1815 vxge_hal_vpath_stats_sw_common_info_t common_stats; 1816} vxge_hal_vpath_stats_sw_umq_info_t; 1817 1818/* 1819 * struct vxge_hal_vpath_stats_sw_sq_info_t - HAL sq statistics 1820 * @common_stats: Common counters for all queues 1821 * 1822 * HAL srq counters 1823 * See also: vxge_hal_vpath_stats_sw_common_info_t {}, 1824 * vxge_hal_vpath_stats_sw_fifo_info_t {}, 1825 * vxge_hal_vpath_stats_sw_ring_info_t {}, 1826 * vxge_hal_vpath_stats_sw_dmq_info_t {}, 1827 * vxge_hal_vpath_stats_sw_umq_info_t {}, 1828 * vxge_hal_vpath_stats_sw_srq_info_t {}, 1829 * vxge_hal_vpath_stats_sw_cqrq_info_t {}. 1830 */ 1831typedef struct vxge_hal_vpath_stats_sw_sq_info_t { 1832 vxge_hal_vpath_stats_sw_common_info_t common_stats; 1833} vxge_hal_vpath_stats_sw_sq_info_t; 1834 1835/* 1836 * struct vxge_hal_vpath_stats_sw_srq_info_t - HAL srq statistics 1837 * @common_stats: Common counters for all queues 1838 * 1839 * HAL srq counters 1840 * See also: vxge_hal_vpath_stats_sw_common_info_t {}, 1841 * vxge_hal_vpath_stats_sw_fifo_info_t {}, 1842 * vxge_hal_vpath_stats_sw_ring_info_t {}, 1843 * vxge_hal_vpath_stats_sw_dmq_info_t {}, 1844 * vxge_hal_vpath_stats_sw_umq_info_t {}, 1845 * vxge_hal_vpath_stats_sw_sq_info_t {}, 1846 * vxge_hal_vpath_stats_sw_cqrq_info_t {}. 1847 */ 1848typedef struct vxge_hal_vpath_stats_sw_srq_info_t { 1849 vxge_hal_vpath_stats_sw_common_info_t common_stats; 1850} vxge_hal_vpath_stats_sw_srq_info_t; 1851 1852/* 1853 * struct vxge_hal_vpath_stats_sw_cqrq_info_t - HAL cqrq statistics 1854 * @common_stats: Common counters for all queues 1855 * 1856 * HAL cqrq counters 1857 * See also: vxge_hal_vpath_stats_sw_common_info_t {}, 1858 * vxge_hal_vpath_stats_sw_fifo_info_t {}, 1859 * vxge_hal_vpath_stats_sw_ring_info_t {}, 1860 * vxge_hal_vpath_stats_sw_dmq_info_t {}, 1861 * vxge_hal_vpath_stats_sw_umq_info_t {}, 1862 * vxge_hal_vpath_stats_sw_sq_info_t {}, 1863 * vxge_hal_vpath_stats_sw_srq_info_t {}. 1864 */ 1865typedef struct vxge_hal_vpath_stats_sw_cqrq_info_t { 1866 vxge_hal_vpath_stats_sw_common_info_t common_stats; 1867} vxge_hal_vpath_stats_sw_cqrq_info_t; 1868 1869/* 1870 * struct vxge_hal_vpath_sw_obj_count_t - Usage count of obj ids in virtual path 1871 * 1872 * @no_nces: Number of NCEs on Adapter in this VP 1873 * @no_sqs: Number of SQs on Adapter in this VP 1874 * @no_srqs: Number of SRQs on Adapter in this VP 1875 * @no_cqrqs: Number of CQRQs on Adapter in this VP 1876 * @no_sessions: Number of sessions on Adapter in this VP 1877 * 1878 * This structure contains fields to keep the usage count of objects in 1879 * a virtual path 1880 */ 1881typedef struct vxge_hal_vpath_sw_obj_count_t { 1882 u32 no_nces; 1883 u32 no_sqs; 1884 u32 no_srqs; 1885 u32 no_cqrqs; 1886 u32 no_sessions; 1887} vxge_hal_vpath_sw_obj_count_t; 1888 1889/* 1890 * struct vxge_hal_vpath_stats_sw_err_t - HAL vpath error statistics 1891 * @unknown_alarms: Unknown Alarm count 1892 * @network_sustained_fault: Network sustained fault count 1893 * @network_sustained_ok: Network sustained ok count 1894 * @kdfcctl_fifo0_overwrite: Fifo 0 overwrite count 1895 * @kdfcctl_fifo0_poison: Fifo 0 poison count 1896 * @kdfcctl_fifo0_dma_error: Fifo 0 dma error count 1897 * @kdfcctl_fifo1_overwrite: Fifo 1 overwrite count 1898 * @kdfcctl_fifo1_poison: Fifo 1 poison count 1899 * @kdfcctl_fifo1_dma_error: Fifo 1 dma error count 1900 * @kdfcctl_fifo2_overwrite: Fifo 2 overwrite count 1901 * @kdfcctl_fifo2_poison: Fifo 2 overwrite count 1902 * @kdfcctl_fifo2_dma_error: Fifo 2 dma error count 1903 * @dblgen_fifo0_overflow: Dblgen Fifo 0 overflow count 1904 * @dblgen_fifo1_overflow: Dblgen Fifo 1 overflow count 1905 * @dblgen_fifo2_overflow: Dblgen Fifo 2 overflow count 1906 * @statsb_pif_chain_error: Statsb pif chain error count 1907 * @statsb_drop_timeout: Statsb drop timeout count 1908 * @target_illegal_access: Target illegal access count 1909 * @ini_serr_det: Serious error detected count 1910 * @pci_config_status_err: PCI config status error count 1911 * @pci_config_uncor_err: PCI config uncorrectable error count 1912 * @pci_config_cor_err: PCI config correctable error count 1913 * @mrpcim_to_vpath_alarms: MRPCIM to vpath alarm count 1914 * @srpcim_to_vpath_alarms: SRPCIM to vpath alarm count 1915 * @srpcim_msg_to_vpath: SRPCIM to vpath message count 1916 * @prc_ring_bumps: Ring controller ring bumps count 1917 * @prc_rxdcm_sc_err: Ring controller rxdsm sc error count 1918 * @prc_rxdcm_sc_abort: Ring controller rxdsm sc abort count 1919 * @prc_quanta_size_err: Ring controller quanta size count 1920 * 1921 * HAL vpath error statistics 1922 */ 1923typedef struct vxge_hal_vpath_stats_sw_err_t { 1924 u32 unknown_alarms; 1925 u32 network_sustained_fault; 1926 u32 network_sustained_ok; 1927 u32 kdfcctl_fifo0_overwrite; 1928 u32 kdfcctl_fifo0_poison; 1929 u32 kdfcctl_fifo0_dma_error; 1930 u32 kdfcctl_fifo1_overwrite; 1931 u32 kdfcctl_fifo1_poison; 1932 u32 kdfcctl_fifo1_dma_error; 1933 u32 kdfcctl_fifo2_overwrite; 1934 u32 kdfcctl_fifo2_poison; 1935 u32 kdfcctl_fifo2_dma_error; 1936 u32 dblgen_fifo0_overflow; 1937 u32 dblgen_fifo1_overflow; 1938 u32 dblgen_fifo2_overflow; 1939 u32 statsb_pif_chain_error; 1940 u32 statsb_drop_timeout; 1941 u32 target_illegal_access; 1942 u32 ini_serr_det; 1943 u32 pci_config_status_err; 1944 u32 pci_config_uncor_err; 1945 u32 pci_config_cor_err; 1946 u32 mrpcim_to_vpath_alarms; 1947 u32 srpcim_to_vpath_alarms; 1948 u32 srpcim_msg_to_vpath; 1949 u32 prc_ring_bumps; 1950 u32 prc_rxdcm_sc_err; 1951 u32 prc_rxdcm_sc_abort; 1952 u32 prc_quanta_size_err; 1953} vxge_hal_vpath_stats_sw_err_t; 1954 1955/* 1956 * struct vxge_hal_vpath_stats_sw_info_t - HAL vpath sw statistics 1957 * @soft_reset_cnt: Number of times soft reset is done on this vpath. 1958 * @obj_counts: Statistics for the VP 1959 * @error_stats: error counters for the vpath 1960 * @ring_stats: counters for ring belonging to the vpath 1961 * @fifo_stats: counters for fifo belonging to the vpath 1962 * @dmq_stats: counters for dmq belonging to the vpath 1963 * @umq_stats: counters for umq belonging to the vpath 1964 * 1965 * HAL vpath sw statistics 1966 * See also: vxge_hal_device_info_t {}}. 1967 */ 1968typedef struct vxge_hal_vpath_stats_sw_info_t { 1969 u32 soft_reset_cnt; 1970 vxge_hal_vpath_sw_obj_count_t obj_counts; 1971 vxge_hal_vpath_stats_sw_err_t error_stats; 1972 vxge_hal_vpath_stats_sw_ring_info_t ring_stats; 1973 vxge_hal_vpath_stats_sw_fifo_info_t fifo_stats; 1974 vxge_hal_vpath_stats_sw_dmq_info_t dmq_stats; 1975 vxge_hal_vpath_stats_sw_umq_info_t umq_stats; 1976} vxge_hal_vpath_stats_sw_info_t; 1977 1978/* 1979 * struct vxge_hal_device_stats_sw_info_t - HAL own per-device statistics. 1980 * 1981 * @soft_reset_cnt: Number of times soft reset is done on this device. 1982 * @vpath_info: please see vxge_hal_vpath_stats_sw_info_t {} 1983 * HAL per-device statistics. 1984 */ 1985typedef struct vxge_hal_device_stats_sw_info_t { 1986 u32 soft_reset_cnt; 1987 vxge_hal_vpath_stats_sw_info_t vpath_info[VXGE_HAL_MAX_VIRTUAL_PATHS]; 1988} vxge_hal_device_stats_sw_info_t; 1989 1990/* 1991 * struct vxge_hal_device_stats_sw_err_t - HAL device error statistics. 1992 * @mrpcim_alarms: Number of mrpcim alarms 1993 * @srpcim_alarms: Number of srpcim alarms 1994 * @vpath_alarms: Number of vpath alarms 1995 * 1996 * HAL Device error stats 1997 */ 1998typedef struct vxge_hal_device_stats_sw_err_t { 1999 u32 mrpcim_alarms; 2000 u32 srpcim_alarms; 2001 u32 vpath_alarms; 2002} vxge_hal_device_stats_sw_err_t; 2003 2004/* 2005 * struct vxge_hal_device_stats_t - Contains HAL per-device statistics, 2006 * including hw. 2007 * @devh: HAL device handle. 2008 * 2009 * @hw_dev_info_stats: X3100 statistics maintained by the hardware. 2010 * @sw_dev_err_stats: HAL's "soft" device error statistics. 2011 * @sw_dev_info_stats: HAL's "soft" device informational statistics, e.g. number 2012 * of completions per interrupt. 2013 * 2014 * @is_enabled: True, if device stats collection is enabled. 2015 * 2016 * Structure-container of HAL per-device statistics. Note that per-channel 2017 * statistics are kept in separate structures under HAL's fifo and ring 2018 * channels. 2019 */ 2020typedef struct vxge_hal_device_stats_t { 2021 /* handles */ 2022 vxge_hal_device_h devh; 2023 2024 /* HAL device hardware statistics */ 2025 vxge_hal_device_stats_hw_info_t hw_dev_info_stats; 2026 2027 /* HAL device "soft" stats */ 2028 vxge_hal_device_stats_sw_err_t sw_dev_err_stats; 2029 vxge_hal_device_stats_sw_info_t sw_dev_info_stats; 2030 2031 /* flags */ 2032 int is_enabled; 2033} vxge_hal_device_stats_t; 2034 2035/* 2036 * vxge_hal_vpath_hw_stats_enable - Enable vpath h/w statistics. 2037 * @vpath_handle: Virtual Path handle. 2038 * 2039 * Enable the DMA vpath statistics. The function is to be called to re-enable 2040 * the adapter to update stats into the host memory 2041 * 2042 * See also: vxge_hal_vpath_hw_stats_disable() 2043 */ 2044vxge_hal_status_e 2045vxge_hal_vpath_hw_stats_enable( 2046 vxge_hal_vpath_h vpath_handle); 2047 2048/* 2049 * vxge_hal_vpath_hw_stats_disable - Disable vpath h/w statistics. 2050 * @vpath_handle: Virtual Path handle. 2051 * 2052 * Enable the DMA vpath statistics. The function is to be called to disable 2053 * the adapter to update stats into the host memory. This function is not 2054 * needed to be called, normally. 2055 * 2056 * See also: vxge_hal_vpath_hw_stats_enable() 2057 */ 2058vxge_hal_status_e 2059vxge_hal_vpath_hw_stats_disable( 2060 vxge_hal_vpath_h vpath_handle); 2061 2062/* 2063 * vxge_hal_vpath_hw_stats_get - Get the vpath hw statistics. 2064 * @vpath_handle: Virtual Path handle. 2065 * @hw_stats: Hardware stats 2066 * 2067 * Returns the vpath h/w stats. 2068 * 2069 * See also: vxge_hal_vpath_hw_stats_enable(), vxge_hal_vpath_hw_stats_disable() 2070 */ 2071vxge_hal_status_e 2072vxge_hal_vpath_hw_stats_get( 2073 vxge_hal_vpath_h vpath_handle, 2074 vxge_hal_vpath_stats_hw_info_t *hw_stats); 2075 2076/* 2077 * vxge_hal_vpath_sw_stats_get - Get the vpath sw statistics. 2078 * @vpath_handle: Virtual Path handle. 2079 * @sw_stats: Software stats 2080 * 2081 * Returns the vpath s/w stats. 2082 * 2083 * See also: vxge_hal_vpath_hw_stats_get() 2084 */ 2085vxge_hal_status_e 2086vxge_hal_vpath_sw_stats_get( 2087 vxge_hal_vpath_h vpath_handle, 2088 vxge_hal_vpath_stats_sw_info_t *sw_stats); 2089 2090/* 2091 * vxge_hal_vpath_stats_access - Get the statistics from the given location 2092 * and offset and perform an operation 2093 * @vpath_handle: Virtual path handle. 2094 * @operation: Operation to be performed 2095 * @offset: Offset with in the location 2096 * @stat: Pointer to a buffer to return the value 2097 * 2098 * Get the statistics from the given location and offset. 2099 * 2100 */ 2101vxge_hal_status_e 2102vxge_hal_vpath_stats_access( 2103 vxge_hal_vpath_h vpath_handle, 2104 u32 operation, 2105 u32 offset, 2106 u64 *stat); 2107 2108/* 2109 * vxge_hal_vpath_xmac_tx_stats_get - Get the TX Statistics of a vpath 2110 * @virtual_path: vpath handle. 2111 * @vpath_tx_stats: Buffer to return TX Statistics of vpath. 2112 * 2113 * Get the TX Statistics of a vpath 2114 * 2115 */ 2116vxge_hal_status_e 2117vxge_hal_vpath_xmac_tx_stats_get(vxge_hal_vpath_h virtual_path, 2118 vxge_hal_xmac_vpath_tx_stats_t *vpath_tx_stats); 2119 2120/* 2121 * vxge_hal_vpath_xmac_rx_stats_get - Get the RX Statistics of a vpath 2122 * @virtual_path: vpath handle. 2123 * @vpath_rx_stats: Buffer to return RX Statistics of vpath. 2124 * 2125 * Get the RX Statistics of a vpath 2126 * 2127 */ 2128vxge_hal_status_e 2129vxge_hal_vpath_xmac_rx_stats_get(vxge_hal_vpath_h virtual_path, 2130 vxge_hal_xmac_vpath_rx_stats_t *vpath_rx_stats); 2131 2132/* 2133 * vxge_hal_vpath_stats_clear - Clear all the statistics of vpath 2134 * @vpath_handle: Virtual path handle. 2135 * 2136 * Clear the statistics of the given vpath. 2137 * 2138 */ 2139vxge_hal_status_e 2140vxge_hal_vpath_stats_clear( 2141 vxge_hal_vpath_h vpath_handle); 2142 2143/* 2144 * vxge_hal_device_hw_stats_enable - Enable device h/w statistics. 2145 * @devh: HAL Device. 2146 * 2147 * Enable the DMA vpath statistics for the device. The function is to be called 2148 * to re-enable the adapter to update stats into the host memory 2149 * 2150 * See also: vxge_hal_device_hw_stats_disable() 2151 */ 2152vxge_hal_status_e 2153vxge_hal_device_hw_stats_enable( 2154 vxge_hal_device_h devh); 2155 2156/* 2157 * vxge_hal_device_hw_stats_disable - Disable device h/w statistics. 2158 * @devh: HAL Device. 2159 * 2160 * Enable the DMA vpath statistics for the device. The function is to be called 2161 * to disable the adapter to update stats into the host memory. This function 2162 * is not needed to be called, normally. 2163 * 2164 * See also: vxge_hal_device_hw_stats_enable() 2165 */ 2166vxge_hal_status_e 2167vxge_hal_device_hw_stats_disable( 2168 vxge_hal_device_h devh); 2169 2170/* 2171 * vxge_hal_device_hw_stats_get - Get the device hw statistics. 2172 * @devh: HAL Device. 2173 * @hw_stats: Hardware stats 2174 * 2175 * Returns the vpath h/w stats for the device. 2176 * 2177 * See also: vxge_hal_device_hw_stats_enable(), 2178 * vxge_hal_device_hw_stats_disable(), 2179 * vxge_hal_device_sw_stats_get(), 2180 * vxge_hal_device_stats_get() 2181 */ 2182vxge_hal_status_e 2183vxge_hal_device_hw_stats_get( 2184 vxge_hal_device_h devh, 2185 vxge_hal_device_stats_hw_info_t *hw_stats); 2186 2187/* 2188 * vxge_hal_device_sw_stats_get - Get the device sw statistics. 2189 * @devh: HAL Device. 2190 * @sw_stats: Software stats 2191 * 2192 * Returns the device s/w stats for the device. 2193 * 2194 * See also: vxge_hal_device_hw_stats_get(), vxge_hal_device_stats_get() 2195 */ 2196vxge_hal_status_e 2197vxge_hal_device_sw_stats_get( 2198 vxge_hal_device_h devh, 2199 vxge_hal_device_stats_sw_info_t *sw_stats); 2200 2201/* 2202 * vxge_hal_device_stats_get - Get the device statistics. 2203 * @devh: HAL Device. 2204 * @stats: Device stats 2205 * 2206 * Returns the device stats for the device. 2207 * 2208 * See also: vxge_hal_device_hw_stats_get(), vxge_hal_device_sw_stats_get() 2209 */ 2210vxge_hal_status_e 2211vxge_hal_device_stats_get( 2212 vxge_hal_device_h devh, 2213 vxge_hal_device_stats_t *stats); 2214 2215/* 2216 * vxge_hal_device_xmac_stats_get - Get the XMAC Statistics 2217 * @devh: HAL device handle. 2218 * @xmac_stats: Buffer to return XMAC Statistics. 2219 * 2220 * Get the XMAC Statistics 2221 * 2222 */ 2223vxge_hal_status_e 2224vxge_hal_device_xmac_stats_get(vxge_hal_device_h devh, 2225 vxge_hal_device_xmac_stats_t *xmac_stats); 2226 2227/* 2228 * vxge_hal_mrpcim_stats_enable - Enable mrpcim statistics. 2229 * @devh: HAL Device. 2230 * 2231 * Enable the DMA mrpcim statistics for the device. The function is to be called 2232 * to re-enable the adapter to update stats into the host memory 2233 * 2234 * See also: vxge_hal_mrpcim_stats_disable() 2235 */ 2236vxge_hal_status_e 2237vxge_hal_mrpcim_stats_enable( 2238 vxge_hal_device_h devh); 2239 2240/* 2241 * vxge_hal_mrpcim_stats_disable - Disable mrpcim statistics. 2242 * @devh: HAL Device. 2243 * 2244 * Enable the DMA mrpcim statistics for the device. The function is to be called 2245 * to disable the adapter to update stats into the host memory. This function 2246 * is not needed to be called, normally. 2247 * 2248 * See also: vxge_hal_mrpcim_stats_enable() 2249 */ 2250vxge_hal_status_e 2251vxge_hal_mrpcim_stats_disable( 2252 vxge_hal_device_h devh); 2253 2254/* 2255 * vxge_hal_mrpcim_stats_get - Get the mrpcim statistics. 2256 * @devh: HAL Device. 2257 * @stats: mrpcim stats 2258 * 2259 * Returns the device mrpcim stats for the device. 2260 * 2261 * See also: vxge_hal_device_stats_get() 2262 */ 2263vxge_hal_status_e 2264vxge_hal_mrpcim_stats_get( 2265 vxge_hal_device_h devh, 2266 vxge_hal_mrpcim_stats_hw_info_t *stats); 2267 2268/* 2269 * vxge_hal_mrpcim_stats_access - Access the statistics from the given location 2270 * and offset and perform an operation 2271 * @devh: HAL Device handle. 2272 * @operation: Operation to be performed 2273 * @location: Location (one of vpath id, aggregate or port) 2274 * @offset: Offset with in the location 2275 * @stat: Pointer to a buffer to return the value 2276 * 2277 * Get the statistics from the given location and offset. 2278 * 2279 */ 2280vxge_hal_status_e 2281vxge_hal_mrpcim_stats_access( 2282 vxge_hal_device_h devh, 2283 u32 operation, 2284 u32 location, 2285 u32 offset, 2286 u64 *stat); 2287 2288/* 2289 * vxge_hal_mrpcim_xmac_aggr_stats_get - Get the Statistics on aggregate port 2290 * @devh: HAL device handle. 2291 * @port: Number of the port (0 or 1) 2292 * @aggr_stats: Buffer to return Statistics on aggregate port. 2293 * 2294 * Get the Statistics on aggregate port 2295 * 2296 */ 2297vxge_hal_status_e 2298vxge_hal_mrpcim_xmac_aggr_stats_get(vxge_hal_device_h devh, 2299 u32 port, 2300 vxge_hal_xmac_aggr_stats_t *aggr_stats); 2301 2302/* 2303 * vxge_hal_mrpcim_xmac_port_stats_get - Get the Statistics on a port 2304 * @devh: HAL device handle. 2305 * @port: Number of the port (wire 0, wire 1 or LAG) 2306 * @port_stats: Buffer to return Statistics on a port. 2307 * 2308 * Get the Statistics on port 2309 * 2310 */ 2311vxge_hal_status_e 2312vxge_hal_mrpcim_xmac_port_stats_get(vxge_hal_device_h devh, 2313 u32 port, 2314 vxge_hal_xmac_port_stats_t *port_stats); 2315 2316/* 2317 * vxge_hal_mrpcim_xmac_stats_get - Get the XMAC Statistics 2318 * @devh: HAL device handle. 2319 * @xmac_stats: Buffer to return XMAC Statistics. 2320 * 2321 * Get the XMAC Statistics 2322 * 2323 */ 2324vxge_hal_status_e 2325vxge_hal_mrpcim_xmac_stats_get(vxge_hal_device_h devh, 2326 vxge_hal_mrpcim_xmac_stats_t *xmac_stats); 2327 2328/* 2329 * vxge_hal_mrpcim_stats_clear - Clear the statistics of the device 2330 * @devh: HAL Device handle. 2331 * 2332 * Clear the statistics of the given Device. 2333 * 2334 */ 2335vxge_hal_status_e 2336vxge_hal_mrpcim_stats_clear( 2337 vxge_hal_device_h devh); 2338 2339/* 2340 * vxge_hal_mrpcim_xpak_stats_poll - Poll and update the Xpak error count. 2341 * @devh: HAL device handle 2342 * @port: Port number 2343 * 2344 * It is used to update the xpak stats value. Called by ULD periodically 2345 */ 2346vxge_hal_status_e 2347vxge_hal_mrpcim_xpak_stats_poll( 2348 vxge_hal_device_h devh, u32 port); 2349 2350__EXTERN_END_DECLS 2351 2352#endif /* VXGE_HAL_STATS_H */ 2353