| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb2ITBlockPass.cpp | 115 if (!MO.isReg() || MO.isDef() || !MO.isKill())
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVectorPrint.cpp | 111 if (MI.getOperand(0).isReg() && MI.getOperand(0).isDef()) {
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| H A D | HexagonVLIWPacketizer.cpp | 151 if (!MO.isReg() || !MO.isDef())
586 if (MO.isReg() && MO.isDef())
799 if (!MO.isReg() || !MO.isDef() || !MO.isImplicit())
844 if (CheckDef == MO.isDef())
1212 if (!MO.isReg() || !MO.isDef() || !MO.isDead())
1218 if (!MO.isReg() || !MO.isDef() || !MO.isDead())
1596 if (Op.isReg() && Op.isDef()) {
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| H A D | HexagonGenPredicate.cpp | 259 assert(DefI->getOperand(0).isDef() && DefI->getOperand(1).isUse());
415 assert(Op0.isDef());
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| H A D | HexagonSubtarget.cpp | 245 } else if (MO.isDef() && Register::isPhysicalRegister(MO.getReg())) {
435 if (MO.isDef() && IsSameOrSubReg)
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | BreakFalseDeps.cpp | 140 if (!CurrMO.isReg() || CurrMO.isDef() || CurrMO.isUndef() ||
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| H A D | ExpandPostRAPseudos.cpp | 78 assert((MI->getOperand(0).isReg() && MI->getOperand(0).isDef()) &&
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| H A D | LiveIntervals.cpp | 797 assert(MO.isDef());
862 float LiveIntervals::getSpillWeight(bool isDef, bool isUse, argument
865 return getSpillWeight(isDef, isUse, MBFI, MI.getParent());
868 float LiveIntervals::getSpillWeight(bool isDef, bool isUse, argument
873 return (isDef + isUse) * (Freq.getFrequency() * Scale);
1575 if (MO.isDef()) {
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| H A D | ReachingDefAnalysis.cpp | 37 return isValidReg(MO) && MO.isDef();
539 if (MO.isDef())
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| H A D | PeepholeOptimizer.cpp | 1360 if (!MO.isReg() || MO.isDef())
1668 if (MO.isDef() && isNAPhysCopy(Reg)) {
1859 assert(!MO.isDef() && "We should have skipped all the definitions by now");
2057 assert(((Def->getOperand(DefIdx).isDef() &&
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| H A D | LiveVariables.cpp | 216 if (!MO.isReg() || !MO.isDef() || MO.getReg() == 0)
530 assert(MO.isDef());
786 if (I->isDef())
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64DeadRegisterDefinitionsPass.cpp | 144 if (!MO.isReg() || !MO.isDef())
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| H A D | AArch64LoadStoreOptimizer.cpp | 757 bool isDef = any_of(I.operands(), [DefReg, TRI](MachineOperand &MOP) {
758 return MOP.isReg() && MOP.isDef() && !MOP.isDebug() && MOP.getReg() &&
761 if (!Fn(I, isDef))
763 if (isDef)
826 (!SeenDef || (MOP.isDef() && MOP.isImplicit())) &&
1349 if (!MOP.isReg() || !MOP.isDef() || MOP.isDebug() || !MOP.getReg() ||
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| H A D | AArch64RedundantCopyElimination.cpp | 407 return !O.isDead() && O.isReg() && O.isDef() &&
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | GVN.cpp | 396 if (!local_dep.isDef() && !local_dep.isNonLocal()) {
401 if (local_dep.isDef()) {
438 if (!I->getResult().isDef() || cdep != nullptr) {
883 assert((DepInfo.isDef() || DepInfo.isClobber()) &&
947 assert(DepInfo.isDef() && "follows from above");
1022 if (!DepInfo.isDef() && !DepInfo.isClobber()) {
1354 !Deps[0].getResult().isDef() && !Deps[0].getResult().isClobber()) {
1609 if (!Dep.isDef() && !Dep.isClobber()) {
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips16InstrInfo.cpp | 356 if (MO.isReg() && MO.getReg() != 0 && !MO.isDef() &&
372 if (MO.isReg() && MO.isDef()) {
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZElimCompare.cpp | 135 MI.getOperand(0).isDef() && MI.getOperand(0).getReg() == Reg)
154 else if (MO.isDef())
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| /freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | MemoryDependenceAnalysis.h | 155 bool isDef() const { return Value.is<Def>(); } function in class:llvm::MemDepResult
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DbgEntityHistoryCalculator.cpp | 274 if (MO.isReg() && MO.isDef() && MO.getReg()) {
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNHazardRecognizer.cpp | 779 if (Op.isReg() && Op.isDef()) {
973 if (MO.isDef() && TRI->isSGPRClass(TRI->getPhysRegClass(MO.getReg()))) {
1058 if (MO.isDef() && TRI->isSGPRClass(TRI->getPhysRegClass(MO.getReg())))
1246 if (Op.isDef() && Opc != AMDGPU::V_ACCVGPR_WRITE_B32)
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| H A D | R600EmitClauseMarkers.cpp | 203 if (!MOI->isReg() || !MOI->isDef() ||
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| H A D | SIFixSGPRCopies.cpp | 217 if (MO.isDef() || UseMI->getParent() != MI.getParent() ||
440 if ((MO.isReg() && ((MO.isDef() && MO.getReg() != Reg) || !MO.isDef())) ||
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| H A D | SIInsertWaitcnts.cpp | 577 if (Op.isReg() && !Op.isDef() && TRI->isVGPR(*MRI, Op.getReg())) {
624 if (DefMO.isReg() && DefMO.isDef() &&
633 if (MO.isReg() && !MO.isDef() && TRI->isVGPR(*MRI, MO.getReg())) {
654 if (!Op.isReg() || !Op.isDef())
1040 if (Op.isDef()) {
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCPreEmitPeephole.cpp | 151 if (DeadOrKillToUnset->isDef())
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | MemoryDependenceAnalysis.cpp | 258 if (InvariantGroupDependency.isDef())
264 if (SimpleDep.isDef())
957 if (!Dep.isDef() && !Dep.isClobber())
|