/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelDAGToDAG.h | 35 unsigned getMSACtrlReg(const SDValue RegIdx) const; 45 bool selectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset) const; 46 bool selectAddrFrameIndexOffset(SDValue Addr, SDValue &Base, SDValue &Offset, 50 bool selectAddrRegImm(SDValue Addr, SDValue &Base, 51 SDValue [all...] |
H A D | MipsISelDAGToDAG.h | 58 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base, 59 SDValue &Offset) const; 62 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base, 63 SDValue &Offset) const; 66 virtual bool selectIntAddr(SDValue Addr, SDValue &Base, 67 SDValue &Offset) const; 69 virtual bool selectIntAddr11MM(SDValue Add [all...] |
H A D | MipsISelDAGToDAG.cpp | 76 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base, 77 SDValue &Offset) const { 82 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base, 83 SDValue &Offset) const { 88 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base, 89 SDValue &Offset) const { 94 bool MipsDAGToDAGISel::selectIntAddr11MM(SDValue Add [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.h | 43 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, 44 std::vector<SDValue> &OutOps) override; 46 bool SelectAddrFI(SDValue Addr, SDValue &Base); 48 bool SelectSLOI(SDValue N, SDValue &RS1, SDValue &Shamt); 49 bool SelectSROI(SDValue N, SDValue &RS1, SDValue [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiSelectionDAGInfo.cpp | 21 SDValue LanaiSelectionDAGInfo::EmitTargetCodeForMemcpy( 22 SelectionDAG & /*DAG*/, const SDLoc & /*dl*/, SDValue /*Chain*/, 23 SDValue /*Dst*/, SDValue /*Src*/, SDValue Size, Align /*Alignment*/, 29 return SDValue(); 31 return SDValue();
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H A D | LanaiISelLowering.h | 72 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 78 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 79 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 80 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const; 81 SDValue LowerDYNAMIC_STACKALLOC(SDValue O [all...] |
H A D | LanaiSelectionDAGInfo.h | 25 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, 26 SDValue Chain, SDValue Dst, SDValue Src, 27 SDValue Size, Align Alignment,
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGTargetInfo.h | 42 /// SDValue if the target declines to use custom code and a different 51 virtual SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, 52 SDValue Chain, SDValue Op1, 53 SDValue Op2, SDValue Op3, 58 return SDValue(); 65 /// SDValue if the target declines to use custom code and a different 67 virtual SDValue EmitTargetCodeForMemmove( 68 SelectionDAG &DAG, const SDLoc &dl, SDValue Chai [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblySelectionDAGInfo.h | 25 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, 26 SDValue Chain, SDValue Op1, SDValue Op2, 27 SDValue Op3, Align Alignment, bool isVolatile, 31 SDValue 32 EmitTargetCodeForMemmove(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, 33 SDValue Op1, SDValue Op2, SDValue Op [all...] |
H A D | WebAssemblySelectionDAGInfo.cpp | 21 SDValue WebAssemblySelectionDAGInfo::EmitTargetCodeForMemcpy( 22 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, 23 SDValue Size, Align Alignment, bool IsVolatile, bool AlwaysInline, 27 return SDValue(); 29 SDValue MemIdx = DAG.getConstant(0, DL, MVT::i32); 36 SDValue WebAssemblySelectionDAGInfo::EmitTargetCodeForMemmove( 37 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Op [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypes.h | 86 // Bijection from SDValue to unique id. As each created node gets a 93 SmallDenseMap<SDValue, TableId, 8> ValueToIdMap; 94 SmallDenseMap<TableId, SDValue, 8> IdToValueMap; 140 TableId getTableId(SDValue V) { 141 assert(V.getNode() && "Getting TableId on SDValue()"); 159 const SDValue &getSDValue(TableId &Id) { 183 TableId NewId = getTableId(SDValue(New, i)); 184 TableId OldId = getTableId(SDValue(Old, i)); 204 ValueToIdMap.erase(SDValue(Old, i)); 212 void AnalyzeNewValue(SDValue [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZSelectionDAGInfo.h | 26 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &DL, 27 SDValue Chain, SDValue Dst, SDValue Src, 28 SDValue Size, Align Alignment, 33 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &DL, 34 SDValue Chain, SDValue Dst, SDValue Byte, 35 SDValue Siz [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.h | 35 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 36 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 38 SmallVectorImpl<SDValue> &Results, 41 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, 45 SmallVectorImpl<SDValue> &InVals) const override; 63 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT, const SDLoc &DL, 68 SDValue OptimizeSwizzle(SDValue BuildVecto [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SelectionDAGInfo.h | 22 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, 23 SDValue Chain, SDValue Dst, SDValue Src, 24 SDValue Size, Align Alignment, 27 SDValue EmitTargetCodeForSetTag(SelectionDAG &DAG, const SDLoc &dl, 28 SDValue Chain, SDValue Op1, SDValue Op2,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMSelectionDAGInfo.h | 40 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, 41 SDValue Chain, SDValue Dst, SDValue Src, 42 SDValue Size, Align Alignment, 47 SDValue 48 EmitTargetCodeForMemmove(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, 49 SDValue Dst, SDValue Src, SDValue Siz [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreSelectionDAGInfo.h | 22 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, 23 SDValue Chain, SDValue Op1, SDValue Op2, 24 SDValue Op3, Align Alignment, bool isVolatile,
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H A D | XCoreISelLowering.h | 98 bool isZExtFree(SDValue Val, EVT VT2) const override; 107 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 112 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 146 SDValue LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv, 150 SmallVectorImpl<SDValue> &InVals) const; 151 SDValue LowerCCCCallTo(SDValue Chain, SDValue Calle [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEISelLowering.h | 59 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, 63 SmallVectorImpl<SDValue> &InVals) const override; 65 SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI, 66 SmallVectorImpl<SDValue> &InVals) const override; 72 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 74 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, 78 SDValue LowerOperation(SDValue O [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86SelectionDAGInfo.h | 29 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, 30 SDValue Chain, SDValue Dst, SDValue Src, 31 SDValue Size, Align Alignment, 35 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, 36 SDValue Chain, SDValue Dst, SDValue Src, 37 SDValue Siz [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFSelectionDAGInfo.h | 22 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, 23 SDValue Chain, SDValue Dst, SDValue Src, 24 SDValue Size, Align Alignment,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonSelectionDAGInfo.h | 24 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, 25 SDValue Chain, SDValue Dst, SDValue Src, 26 SDValue Size, Align Alignment,
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H A D | HexagonISelLowering.h | 115 bool IsEligibleForTailCallOptimization(SDValue Callee, 118 const SmallVectorImpl<SDValue> &OutVals, 132 bool hasBitTest(SDValue X, SDValue Y) const override; 151 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 152 void LowerOperationWrapper(SDNode *N, SmallVectorImpl<SDValue> &Results, 154 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, 159 SDValue LowerBUILD_VECTOR(SDValue O [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 628 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG); 691 bool hasAndNotCompare(SDValue) const override { 701 SDValue getNegatedExpression(SDValue Op, SelectionDAG &DAG, bool LegalOps, 717 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, 718 SDValue &Offset, 724 bool SelectAddressEVXRegReg(SDValue N, SDValue &Base, SDValue &Index, 731 bool SelectAddressRegReg(SDValue [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.h | 66 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 81 SDValue LowerCallArguments(SDValue Chain, CallingConv::ID CallConv, 85 SmallVectorImpl<SDValue> &InVals) const; 87 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const; 88 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; 89 SDValue LowerSELECT_C [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.h | 57 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 64 void computeKnownBitsForTargetNode(const SDValue Op, 80 void LowerAsmOperandForConstraint(SDValue Op, 82 std::vector<SDValue> &Ops, 126 SDValue 127 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 130 SmallVectorImpl<SDValue> &InVals) const override; 131 SDValue LowerFormalArguments_32(SDValue Chai [all...] |