/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/ |
H A D | MSP430AsmParser.cpp | 1 //===- MSP430AsmParser.cpp - Parse MSP430 assembly to MCInst instructions -===// 18 #include "llvm/MC/MCInst.h" 126 void addRegOperands(MCInst &Inst, unsigned N) const { 134 void addExprOperand(MCInst &Inst, const MCExpr *Expr) const { 144 void addImmOperands(MCInst &Inst, unsigned N) const { 151 void addMemOperands(MCInst &Inst, unsigned N) const { 259 MCInst Inst;
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/freebsd-13-stable/contrib/llvm-project/lldb/source/Plugins/Disassembler/LLVMC/ |
H A D | DisassemblerLLVMC.cpp | 18 #include "llvm/MC/MCInst.h" 57 lldb::addr_t pc, llvm::MCInst &mc_inst) const; 58 void PrintMCInst(llvm::MCInst &mc_inst, std::string &inst_string, 61 bool CanBranch(llvm::MCInst &mc_inst) const; 62 bool HasDelaySlot(llvm::MCInst &mc_inst) const; 63 bool IsCall(llvm::MCInst &mc_inst) const; 186 llvm::MCInst inst; 255 llvm::MCInst inst; 842 llvm::MCInst inst; 965 llvm::MCInst [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZAsmPrinter.cpp | 33 static MCInst lowerRILow(const MachineInstr *MI, unsigned Opcode) { 47 static MCInst lowerRIHigh(const MachineInstr *MI, unsigned Opcode) { 61 static MCInst lowerRIEfLow(const MachineInstr *MI, unsigned Opcode) { 89 static void lowerAlignmentHint(const MachineInstr *MI, MCInst &LoweredMI, 108 static MCInst lowerSubvectorLoad(const MachineInstr *MI, unsigned Opcode) { 118 static MCInst lowerSubvectorStore(const MachineInstr *MI, unsigned Opcode) { 129 MCInst LoweredMI;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsTargetStreamer.cpp | 171 MCInst TmpInst; 180 MCInst TmpInst; 200 MCInst TmpInst; 211 MCInst TmpInst; 229 MCInst TmpInst; 249 MCInst TmpInst; 1163 MCInst TmpInst; 1235 MCInst Inst; 1289 MCInst Inst;
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H A D | MipsMCTargetDesc.cpp | 140 bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64MCInstLower.cpp | 1 //==-- AArch64MCInstLower.cpp - Convert AArch64 MachineInstr to an MCInst --==// 10 // MCInst records. 24 #include "llvm/MC/MCInst.h" 296 void AArch64MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { 307 OutMI = MCInst(); 312 OutMI = MCInst();
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVAsmBackend.cpp | 142 void RISCVAsmBackend::relaxInstruction(MCInst &Inst, 145 MCInst Res; 195 bool RISCVAsmBackend::mayNeedRelaxation(const MCInst &Inst,
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H A D | RISCVMCTargetDesc.cpp | 108 bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyMCInstLower.cpp | 1 // WebAssemblyMCInstLower.cpp - Convert WebAssembly MachineInstr to an MCInst // 11 /// corresponding MCInst records. 27 #include "llvm/MC/MCInst.h" 41 static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI); 205 MCInst &OutMI) const { 314 static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI) {
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/MC/MCDisassembler/ |
H A D | MCExternalSymbolizer.cpp | 12 #include "llvm/MC/MCInst.h" 23 // Value in the MCInst. The immediate Value has had any PC adjustment made by 29 // and that is added as an operand to the MCInst. If getOpInfo() returns zero 32 // created. This function returns true if it adds an operand to the MCInst and 34 bool MCExternalSymbolizer::tryAddingSymbolicOperand(MCInst &MI,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/MC/ |
H A D | MCXCOFFStreamer.cpp | 98 void MCXCOFFStreamer::emitInstToData(const MCInst &Inst,
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/freebsd-13-stable/contrib/llvm-project/llvm/tools/llvm-mc/ |
H A D | Disassembler.cpp | 19 #include "llvm/MC/MCInst.h" 46 MCInst Inst;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstrInfo.cpp | 28 #include "llvm/MC/MCInst.h" 35 void ARMInstrInfo::getNoop(MCInst &NopInst) const {
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRAsmPrinter.cpp | 26 #include "llvm/MC/MCInst.h" 174 MCInst I;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFAsmPrinter.cpp | 27 #include "llvm/MC/MCInst.h" 141 MCInst TmpInst;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCTargetDesc.cpp | 206 const MCInst &Inst, const MCSubtargetInfo &STI, 543 bool isUnconditionalBranch(MCInst const &Inst) const override { 548 bool isConditionalBranch(MCInst const &Inst) const override { 553 bool evaluateBranch(MCInst const &Inst, uint64_t Addr,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/ |
H A D | MSP430AsmBackend.cpp | 93 bool mayNeedRelaxation(const MCInst &Inst,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430AsmPrinter.cpp | 31 #include "llvm/MC/MCInst.h" 154 MCInst TmpInst;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64AsmBackend.cpp | 91 bool mayNeedRelaxation(const MCInst &Inst, 96 void relaxInstruction(MCInst &Inst, 466 bool AArch64AsmBackend::mayNeedRelaxation(const MCInst &Inst, 482 void AArch64AsmBackend::relaxInstruction(MCInst &Inst,
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H A D | AArch64ELFStreamer.cpp | 28 #include "llvm/MC/MCInst.h" 109 void emitInstruction(const MCInst &Inst,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
H A D | AMDGPUMCTargetDesc.cpp | 121 bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcAsmPrinter.cpp | 29 #include "llvm/MC/MCInst.h" 108 MCInst CallInst; 118 MCInst SETHIInst; 129 MCInst Inst; 266 MCInst TmpInst;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/AsmParser/ |
H A D | SystemZAsmParser.cpp | 17 #include "llvm/MC/MCInst.h" 139 void addExpr(MCInst &Inst, const MCExpr *Expr) const { 293 void addRegOperands(MCInst &Inst, unsigned N) const { 297 void addImmOperands(MCInst &Inst, unsigned N) const { 301 void addBDAddrOperands(MCInst &Inst, unsigned N) const { 307 void addBDXAddrOperands(MCInst &Inst, unsigned N) const { 314 void addBDLAddrOperands(MCInst &Inst, unsigned N) const { 321 void addBDRAddrOperands(MCInst &Inst, unsigned N) const { 328 void addBDVAddrOperands(MCInst &Inst, unsigned N) const { 335 void addImmTLSOperands(MCInst [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetSchedule.cpp | 266 unsigned TargetSchedModel::computeInstrLatency(const MCInst &Inst) const { 354 TargetSchedModel::computeReciprocalThroughput(const MCInst &MI) const {
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsAsmPrinter.cpp | 49 #include "llvm/MC/MCInst.h" 119 MCInst TmpInst0; 285 MCInst TmpInst0; 859 MCInst I; 868 MCInst I; 877 MCInst I; 897 MCInst I;
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