/freebsd-12-stable/contrib/llvm-project/clang/include/clang/AST/ |
H A D | DeclBase.h | 516 AttrVec &Vec = getAttrs(); 517 Vec.erase(std::remove_if(Vec.begin(), Vec.end(), isa<T, Attr*>), Vec.end()); 519 if (Vec.empty())
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | LoadStoreVectorizer.cpp | 1046 Value *Vec = UndefValue::get(VecTy); local 1060 Builder.CreateInsertElement(Vec, Extract, Builder.getInt32(NewIdx)); 1061 Vec = Insert; 1073 Builder.CreateInsertElement(Vec, Extract, Builder.getInt32(I)); 1074 Vec = Insert; 1079 Vec,
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H A D | SLPVectorizer.cpp | 294 auto *Vec = EI->getVectorOperand(); local 296 if (Vec->getType()->getVectorNumElements() != Size) 306 if (isa<UndefValue>(Vec)) 310 if (!Vec1 || Vec1 == Vec) 311 Vec1 = Vec; 312 else if (!Vec2 || Vec2 == Vec) 313 Vec2 = Vec; 3150 Value *Vec = E0->getOperand(0); 3158 NElts = canMapToVector(Vec->getType(), DL); 3162 LoadInst *LI = dyn_cast<LoadInst>(Vec); [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CodeGenRegisters.cpp | 208 CodeGenRegister::Vec::const_iterator RegI, RegE; 212 RegUnitIterator(const CodeGenRegister::Vec &Regs): 736 static void sortAndUniqueRegisters(CodeGenRegister::Vec &M) { 1248 const CodeGenRegister::Vec *Members, 1570 CodeGenRegister::Vec Regs; 1599 const CodeGenRegister::Vec &Regs = RegClass.getMembers(); 2140 const CodeGenRegister::Vec &Memb1 = RC1->getMembers(); 2141 const CodeGenRegister::Vec &Memb2 = RC2->getMembers(); 2142 CodeGenRegister::Vec Intersection; 2170 typedef std::map<const CodeGenSubRegIndex *, CodeGenRegister::Vec, [all...] |
H A D | CodeGenDAGPatterns.cpp | 562 /// 1. Ensure that for each type T in Vec, T is a vector type, and that 565 /// type T in Vec, such that U is the element type of T. 566 bool TypeInfer::EnforceVectorEltTypeIs(TypeSetByHwMode &Vec, argument 568 ValidateOnExit _1(Vec, *this), _2(Elem, *this); 573 if (Vec.empty()) 574 Changed |= EnforceVector(Vec); 578 for (unsigned M : union_modes(Vec, Elem)) { 579 TypeSetByHwMode::SetType &V = Vec.get(M); 606 bool TypeInfer::EnforceVectorEltTypeIs(TypeSetByHwMode &Vec, argument 609 ValidateOnExit _1(Vec, *thi 616 EnforceVectorSubVectorTypeIs(TypeSetByHwMode &Vec, TypeSetByHwMode &Sub) argument [all...] |
H A D | CodeGenDAGPatterns.h | 307 /// 1. Ensure that for each type T in \p Vec, T is a vector type, and that 310 /// (vector) type T in \p Vec, such that U is the element type of T. 311 bool EnforceVectorEltTypeIs(TypeSetByHwMode &Vec, TypeSetByHwMode &Elem); 312 bool EnforceVectorEltTypeIs(TypeSetByHwMode &Vec, 315 /// exists a type U in \p Vec such that U is a vector type with the same 317 bool EnforceVectorSubVectorTypeIs(TypeSetByHwMode &Vec,
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H A D | RegisterInfoEmitter.cpp | 204 const CodeGenRegister::Vec &Regs = RC.getMembers(); 670 // Try to combine Idx's compose map into Vec if it is compatible. 673 SmallVectorImpl<CodeGenSubRegIndex*> &Vec) { 676 CodeGenSubRegIndex *&Entry = Vec[I.first->EnumValue - 1]; 683 auto *&Entry = Vec[I.first->EnumValue - 1]; 672 combine(const CodeGenSubRegIndex *Idx, SmallVectorImpl<CodeGenSubRegIndex*> &Vec) argument
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | LoopInterchange.cpp | 280 const std::vector<Loop *> *Vec = &CurrentLoop->getSubLoops(); local 281 while (!Vec->empty()) { 285 if (Vec->size() != 1) 289 CurrentLoop = Vec->front(); 290 Vec = &CurrentLoop->getSubLoops();
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/freebsd-12-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
H A D | MemRegion.cpp | 1543 auto *Vec = static_cast<BumpVector<const MemRegion *> *>(ReferencedVars); local 1545 if (Vec == (void*) 0x1) 1551 return BlockDataRegion::referenced_vars_iterator(Vec->begin(), 1559 auto *Vec = static_cast<BumpVector<const MemRegion *> *>(ReferencedVars); local 1561 if (Vec == (void*) 0x1) 1567 return BlockDataRegion::referenced_vars_iterator(Vec->end(),
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 123 SDValue PerformInsertVectorEltInMemory(SDValue Vec, SDValue Val, SDValue Idx, 125 SDValue ExpandINSERT_VECTOR_ELT(SDValue Vec, SDValue Val, SDValue Idx, 362 SDValue SelectionDAGLegalize::PerformInsertVectorEltInMemory(SDValue Vec, argument 366 SDValue Tmp1 = Vec; 396 SDValue SelectionDAGLegalize::ExpandINSERT_VECTOR_ELT(SDValue Vec, SDValue Val, argument 403 EVT EltVT = Vec.getValueType().getVectorElementType(); 407 Vec.getValueType(), Val); 409 unsigned NumElts = Vec.getValueType().getVectorNumElements(); 417 return DAG.getVectorShuffle(Vec.getValueType(), dl, Vec, ScVe [all...] |
H A D | LegalizeVectorTypes.cpp | 1110 SDValue Vec = N->getOperand(0); local 1117 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx); 1119 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec, 1126 SDValue Vec = N->getOperand(0); local 1130 GetSplitVector(Vec, Lo, Hi); 1132 EVT VecVT = Vec.getValueType(); 1155 DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, MachinePointerInfo()); 1407 SDValue Vec = N->getOperand(0); local 1411 GetSplitVector(Vec, Lo, Hi); 1432 EVT VecVT = Vec 2169 SDValue Vec = N->getOperand(0); local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | CFLGraph.h | 476 auto *Vec = Inst.getOperand(0); 478 addAssignEdge(Vec, &Inst);
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H A D | InstructionSimplify.cpp | 4193 Value *llvm::SimplifyInsertElementInst(Value *Vec, Value *Val, Value *Idx, argument 4196 auto *VecC = dyn_cast<Constant>(Vec); 4204 uint64_t NumElements = cast<VectorType>(Vec->getType())->getNumElements(); 4206 return UndefValue::get(Vec->getType()); 4211 return UndefValue::get(Vec->getType()); 4216 return Vec; 4220 // insertelt Vec, (extractelt Vec, Idx), Idx --> Vec 4221 if (match(Val, m_ExtractElement(m_Specific(Vec), m_Specifi 4259 SimplifyExtractElementInst(Value *Vec, Value *Idx, const SimplifyQuery &, unsigned) argument 4291 SimplifyExtractElementInst(Value *Vec, Value *Idx, const SimplifyQuery &Q) argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAGHVX.cpp | 1397 SDValue Vec; 1400 Vec = Va; 1402 Vec = Vb; 1407 Vec = DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, SingleTy, Vec); 1409 Vec = DAG.getTargetExtractSubreg(Hexagon::vsub_hi, dl, SingleTy, Vec); 1414 SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, LegalTy, {Vec, Idx});
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H A D | HexagonISelLowering.h | 404 VectorPair opSplit(SDValue Vec, const SDLoc &dl, SelectionDAG &DAG) const; 405 SDValue opCastElem(SDValue Vec, MVT ElemTy, SelectionDAG &DAG) const;
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/DebugInfo/PDB/Native/ |
H A D | HashTable.h | 32 Error writeSparseBitVector(BinaryStreamWriter &Writer, SparseBitVector<> &Vec);
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/freebsd-12-stable/contrib/llvm-project/clang/lib/AST/ |
H A D | APValue.cpp | 257 setVector(((const Vec *)(const char *)RHS.Data.buffer)->Elts, 315 ((Vec*)(char*)Data.buffer)->~Vec();
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZTargetTransformInfo.cpp | 1093 unsigned Vec = (Index + Elt * Factor) / NumEltsPerVecReg; local 1094 UsedInsts.set(Vec); 1095 ValueVecs[Index].set(Vec);
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H A D | SystemZISelLowering.cpp | 5558 SDValue Vec = Op.getOperand(0); local 5559 EVT VecVT = Vec.getValueType(); 5578 return combineExtract(DL, ResVT, VecVT, Vec, NewIndex, DCI, true); 5948 SDValue Vec = Op0.getOperand(0); local 5949 for (auto *U : Vec->uses()) { 5953 U->getOperand(0) == Vec && 5966 {MVT::v4f32, MVT::Other}, {Chain, Vec}); 5970 MVT::v4f32, Vec); 6014 SDValue Vec = Op0.getOperand(0); local 6015 for (auto *U : Vec 6110 SDValue Vec = Op.getOperand(0); local [all...] |
/freebsd-12-stable/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGExpr.cpp | 1856 llvm::Value *Vec = Builder.CreateLoad(LV.getExtVectorAddress(), local 1867 return RValue::get(Builder.CreateExtractElement(Vec, Elt)); 1878 Vec = Builder.CreateShuffleVector(Vec, llvm::UndefValue::get(Vec->getType()), 1880 return RValue::get(Vec); 1934 llvm::Value *Vec = Builder.CreateLoad(Dst.getVectorAddress(), local 1936 Vec = Builder.CreateInsertElement(Vec, Src.getScalarVal(), 1938 Builder.CreateStore(Vec, Ds 2098 llvm::Value *Vec = Builder.CreateLoad(Dst.getExtVectorAddress(), local 3884 llvm::Value *Vec = EmitScalarExpr(E->getBase()); local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 1333 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); local 1338 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero); 1339 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One); 1347 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); local 1349 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero); 1355 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); local 1357 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One); 2342 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src); 2347 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero); 2348 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, On 3041 SDValue Vec = DAG.getBuildVector(MVT::v2i32, SL, {LoAnd, HiAnd}); local 3073 SDValue Vec = DAG.getBuildVector(MVT::v2i16, SL, local 3109 SDValue Vec = DAG.getBuildVector(MVT::v2i32, SL, {Zero, NewShift}); local 3206 SDValue Vec = Src.getOperand(0); local 3962 SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32, local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 5603 SDValue Vec; 5605 Vec = DAG.getConstantFP(+0.0, dl, MVT::v4f32); 5607 Vec = DAG.getConstantFP(+0.0, dl, VT); 5611 Vec = DAG.getConstant(0, dl, VT); 5614 Vec = DAG.getConstant(0, dl, MVT::getVectorVT(MVT::i32, Num32BitElts)); 5616 return DAG.getBitcast(VT, Vec); 5619 static SDValue extractSubVector(SDValue Vec, unsigned IdxVal, SelectionDAG &DAG, 5621 EVT VT = Vec.getValueType(); 5636 if (Vec.getOpcode() == ISD::BUILD_VECTOR) 5638 Vec [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | Instructions.h | 1857 ExtractElementInst(Value *Vec, Value *Idx, const Twine &NameStr = "", 1859 ExtractElementInst(Value *Vec, Value *Idx, const Twine &NameStr, 1869 static ExtractElementInst *Create(Value *Vec, Value *Idx, argument 1872 return new(2) ExtractElementInst(Vec, Idx, NameStr, InsertBefore); 1875 static ExtractElementInst *Create(Value *Vec, Value *Idx, argument 1878 return new(2) ExtractElementInst(Vec, Idx, NameStr, InsertAtEnd); 1883 static bool isValidOperands(const Value *Vec, const Value *Idx); 1921 InsertElementInst(Value *Vec, Value *NewElt, Value *Idx, 1924 InsertElementInst(Value *Vec, Value *NewElt, Value *Idx, const Twine &NameStr, 1934 static InsertElementInst *Create(Value *Vec, Valu argument 1940 Create(Value *Vec, Value *NewElt, Value *Idx, const Twine &NameStr, BasicBlock *InsertAtEnd) argument [all...] |
H A D | IRBuilder.h | 2520 Value *CreateExtractElement(Value *Vec, Value *Idx, argument 2522 if (auto *VC = dyn_cast<Constant>(Vec)) 2525 return Insert(ExtractElementInst::Create(Vec, Idx), Name); 2528 Value *CreateExtractElement(Value *Vec, uint64_t Idx, argument 2530 return CreateExtractElement(Vec, getInt64(Idx), Name); 2533 Value *CreateInsertElement(Value *Vec, Value *NewElt, Value *Idx, argument 2535 if (auto *VC = dyn_cast<Constant>(Vec)) 2539 return Insert(InsertElementInst::Create(Vec, NewElt, Idx), Name); 2542 Value *CreateInsertElement(Value *Vec, Value *NewElt, uint64_t Idx, argument 2544 return CreateInsertElement(Vec, NewEl [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCalls.cpp | 390 auto Vec = II.getArgOperand(0); local 391 auto VT = cast<VectorType>(Vec->getType()); 398 return Vec; 415 return Builder.CreateShl(Vec, ShiftVec); 418 return Builder.CreateLShr(Vec, ShiftVec); 420 return Builder.CreateAShr(Vec, ShiftVec); 477 auto Vec = II.getArgOperand(0); 542 return Builder.CreateShl(Vec, ShiftVec); 545 return Builder.CreateLShr(Vec, ShiftVec); 547 return Builder.CreateAShr(Vec, ShiftVe 1343 Value *Vec = II.getOperand(2); local [all...] |