Searched refs:I2 (Results 26 - 50 of 51) sorted by relevance

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/freebsd-12-stable/contrib/gcc/
H A Dlocal-alloc.c1574 #define EXCHANGE(I1, I2) \
1575 { i = qty_order[I1]; qty_order[I1] = qty_order[I2]; qty_order[I2] = i; }
1623 #define EXCHANGE(I1, I2) \
1624 { i = qty_order[I1]; qty_order[I1] = qty_order[I2]; qty_order[I2] = i; }
/freebsd-12-stable/contrib/gdb/gdb/
H A Dsparc-stub.c113 I0, I1, I2, I3, I4, I5, FP, I7, enumerator in enum:regnames
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DAliasAnalysis.h680 /// [I1,I2] INCLUSIVE. I1 and I2 must be in the same basic block.
681 bool canInstructionRangeModRef(const Instruction &I1, const Instruction &I2,
686 bool canInstructionRangeModRef(const Instruction &I1, const Instruction &I2, argument
689 return canInstructionRangeModRef(I1, I2, MemoryLocation(Ptr, Size), Mode);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DAliasAnalysis.cpp709 /// of the instructions in the range of [I1,I2] INCLUSIVE.
710 /// I1 and I2 must be in the same basic block.
712 const Instruction &I2,
715 assert(I1.getParent() == I2.getParent() &&
718 BasicBlock::const_iterator E = I2.getIterator();
711 canInstructionRangeModRef(const Instruction &I1, const Instruction &I2, const MemoryLocation &Loc, const ModRefInfo Mode) argument
H A DLoopAccessAnalysis.cpp1670 I2 = (OI == AI ? std::next(I1) : Accesses[*OI].begin()),
1672 I2 != I2E; ++I2) {
1674 auto B = std::make_pair(&*OI, *I2);
1676 assert(*I1 != *I2);
1677 if (*I1 > *I2)
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DGVNHoist.cpp137 // A (CHI[{V, B, I1}, {V, C, I2}]
140 // B(I1) C (I2)
141 // The Value number for both I1 and I2 is V, the CHI node will save the
375 // Return true when I1 appears before I2 in the instructions of BB.
376 bool firstInBB(const Instruction *I1, const Instruction *I2) { argument
377 assert(I1->getParent() == I2->getParent());
379 unsigned I2DFS = DFSNumber.lookup(I2);
H A DReassociate.cpp1011 if (Instruction *I2 = dyn_cast<Instruction>(X))
1012 if (I1->isIdenticalTo(I2))
1020 if (Instruction *I2 = dyn_cast<Instruction>(X))
1021 if (I1->isIdenticalTo(I2))
/freebsd-12-stable/contrib/llvm-project/clang/lib/AST/
H A DASTStructuralEquivalence.cpp257 OverloadedTemplateStorage::iterator I1 = OS1->begin(), I2 = OS2->begin(), local
259 for (; I1 != E1 && I2 != E2; ++I1, ++I2)
260 if (!IsStructurallyEquivalent(Context, *I1, *I2))
262 return I1 == E1 && I2 == E2;
/freebsd-12-stable/libexec/getty/
H A Dsubr.c262 tmode.c_iflag = I2;
/freebsd-12-stable/contrib/gcc/config/soft-fp/
H A Dop-4.h523 #define __FP_FRAC_SET_4(X,I3,I2,I1,I0) \
524 (X##_f[3] = I3, X##_f[2] = I2, X##_f[1] = I1, X##_f[0] = I0)
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp843 auto *I2 = dyn_cast<Instruction>(V2); local
844 if (I1 && I2) {
845 if (I1 == I2)
847 InstructionsState S = getSameOpcode({I1, I2});
946 auto *I2 = dyn_cast<Instruction>(V2); local
947 if (CurrLevel == MaxLevel || !(I1 && I2) || I1 == I2 ||
949 (isa<LoadInst>(I1) && isa<LoadInst>(I2) && ShallowScoreAtThisLevel))
951 assert(I1 && I2 && "Should have early exited.");
957 // Contains the I2 operan
[all...]
H A DLoopVectorize.cpp3316 auto *I2 = cast<IntegerType>(T2->getVectorElementType());
3317 return I1->getBitWidth() < I2->getBitWidth() ? T1 : T2;
3321 auto *I2 = cast<IntegerType>(T2->getVectorElementType());
3322 return I1->getBitWidth() > I2->getBitWidth() ? T1 : T2;
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineInstr.cpp598 MachineBasicBlock::const_instr_iterator I2 = Other.getIterator(); local
601 while (I1->isBundledWithSucc() && I2->isBundledWithSucc()) {
603 ++I2;
604 if (!I1->isIdenticalTo(*I2, Check))
609 if (I1->isBundledWithSucc() || I2->isBundledWithSucc())
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonLoopIdiomRecognition.cpp928 auto *I2 = dyn_cast<Instruction>(X2); local
932 } else if (!I2 || I2->getParent() != LoopB) {
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp918 MachineBasicBlock::iterator I2 = std::prev(I); local
924 popStackAfter(I2);
/freebsd-12-stable/contrib/binutils/bfd/
H A Delf32-arm.c5186 bfd_vma I2 = (lower_insn & 0x0800) >> 11; local
5190 I2 = !(I2 ^ S);
5193 signed_addend = (S << 24) | (I1 << 23) | (I2 << 22) | (hi << 12) | (lo << 1);
5222 bfd_vma I2 = (relocation & 0x00400000) >> 22; local
5227 I2 = !(I2 ^ S);
5230 lower_insn = (lower_insn & (bfd_vma) 0xd000) | (I1 << 13) | (I2 << 11) | lo;
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp67 SP::I0, SP::I1, SP::I2, SP::I3,
/freebsd-12-stable/contrib/binutils/opcodes/
H A Darm-dis.c3625 unsigned int I2 = (given & 0x00000800u) >> 11;
3630 offset |= !(I2 ^ S) << 22;
3624 unsigned int I2 = (given & 0x00000800u) >> 11; local
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp135 Sparc::I0, Sparc::I1, Sparc::I2, Sparc::I3,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp59 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5
87 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5
537 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5
1022 .Case("i0", SP::I0).Case("i1", SP::I1).Case("i2", SP::I2).Case("i3", SP::I3)
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp2617 // change them to I1 and I2 values via as documented:
2619 // I2 = NOT(J2 EOR S);
2621 // imm32 = SignExtend(S:I1:I2:imm10:imm11:'0', 32);
2626 unsigned I2 = !(J2 ^ S); local
2629 unsigned tmp = (S << 23) | (I1 << 22) | (I2 << 21) | (imm10 << 11) | imm11;
4474 // the encoded instruction. So here change to I1 and I2 values via:
4476 // I2 = NOT(J2 EOR S);
4478 // imm32 = SignExtend(S:I1:I2:imm10H:imm10L:'00', 32);
4483 unsigned I2 = !(J2 ^ S); local
4484 unsigned tmp = (Val & ~0x600000) | (I1 << 22) | (I2 << 2
4622 unsigned I2 = !(J2 ^ S); local
[all...]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp417 MachineBasicBlock::iterator I2 = IP; local
418 while (I2 != BB->begin() && (--I2)->isTerminator())
419 IP = I2;
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp4864 unsigned I2 = NumElements - 1; local
4866 bool Def2 = !Elems[I2].isUndef();
4868 SDValue Elem1 = Elems[Def1 ? I1 : I2];
4869 SDValue Elem2 = Elems[Def2 ? I2 : I1];
4873 Done[I2] = true;
/freebsd-12-stable/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp2048 uint32_t I2 = !(J2 ^ S); local
2050 (S << 24) | (I1 << 23) | (I2 << 22) | (imm10 << 12) | (imm11 << 1);
2067 uint32_t I2 = !(J2 ^ S); local
2069 (S << 24) | (I1 << 23) | (I2 << 22) | (imm10H << 12) | (imm10L << 2);
2869 uint32_t I2 = !(J2 ^ S); local
2871 (S << 24) | (I1 << 23) | (I2 << 22) | (imm10 << 12) | (imm11 << 1);
/freebsd-12-stable/contrib/binutils/gas/config/
H A Dtc-arm.c18558 addressT S, I1, I2, lo, hi;
18562 I2 = (value & 0x00400000) >> 22;
18567 I2 = !(I2 ^ S);
18572 newval2 |= (I1 << 13) | (I2 << 11) | lo;
18544 addressT S, I1, I2, lo, hi; local

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