Searched refs:x7 (Results 226 - 250 of 812) sorted by relevance

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/freebsd-11.0-release/sys/ofed/drivers/infiniband/hw/mthca/
H A Dmthca_memfree.h159 MTHCA_DB_TYPE_GROUP_SEP = 0x7
/freebsd-11.0-release/contrib/llvm/tools/lldb/source/Symbol/
H A DArmUnwindInfo.cpp218 uint8_t n = byte1&0x7;
229 uint8_t n = byte1&0x7;
/freebsd-11.0-release/contrib/tcpdump/
H A Dnfs.h245 #define nfsv2tov_type(a) nv2tov_type[fxdr_unsigned(uint32_t,(a))&0x7]
246 #define nfsv3tov_type(a) nv3tov_type[fxdr_unsigned(uint32_t,(a))&0x7]
/freebsd-11.0-release/contrib/blacklist/port/
H A Dsockaddr_snprintf.c134 s[0x6], s[0x7], s[0x8], s[0x9], s[0xa], s[0xb], s[0xc], s[0xd],
158 s[0x6], s[0x7], s[0x8], s[0x9], s[0xa], s[0xb]);
/freebsd-11.0-release/sys/dev/nxge/include/
H A Dxgehal-ring.h48 #define XGE_HAL_RXD_T_CODE_BUFF_SIZE 0x7
230 #define XGE_HAL_RXD_HASH_TYPE_TCP_IPV6_EX 0x7
/freebsd-11.0-release/sys/dev/cxgb/common/
H A Dcxgb_sge_defs.h68 #define M_EC_RESPQ 0x7
73 #define M_EC_TYPE 0x7
H A Dcxgb_vsc8211.c384 #define M_VSC8211_TXFIFODEPTH 0x7
389 #define M_VSC8211_RXFIFODEPTH 0x7
/freebsd-11.0-release/sys/dev/bhnd/cores/pci/
H A Dbhnd_pcireg.h353 #define BHND_PCIE_APPLE_TX_P2_COEFF_MAX 0x7 /* 9.6dB pre-emphassis coeff (???) */
356 #define BHND_PCIE_APPLE_TX_P2_COEFF_700MV 0x7 /* 2.3dB pre-emphassis coeff (???) */
/freebsd-11.0-release/sys/dev/usb/controller/
H A Dxhcireg.h149 #define XHCI_PM2_L1S_GET(x) (((x) >> 0) & 0x7) /* RO - L1 status */
179 #define XHCI_ERDP_LO_SINDEX(x) ((x) & 0x7) /* RO - dequeue segment index */
/freebsd-11.0-release/sys/boot/i386/libi386/
H A Dbiospci.c186 {0x7, "controller", subclass_comms},
403 return ((bus << 8) | ((device & 0x1f) << 3) | (function & 0x7));
/freebsd-11.0-release/sys/amd64/vmm/intel/
H A Dvmcs.c472 switch (val >> 8 & 0x7) {
486 db_printf("?? %lu", val >> 8 & 0x7);
/freebsd-11.0-release/sys/arm/allwinner/clk/
H A Daw_mmcclk.c59 #define CLK_PHASE_CTR (0x7 << 20)
64 #define OUTPUT_CLK_PHASE_CTR (0x7 << 8)
/freebsd-11.0-release/sys/arm/freescale/imx/
H A Dimx51_ipuv3_fbd.c166 0x7, 5, 0x7, 2, 0x3, 0));
/freebsd-11.0-release/tools/tools/vhba/rptluns/
H A Dvhba_rptluns.c77 vhbas.rpbitmap[i >> 3] |= (1 << (i & 0x7));
140 i = csio->ccb_h.target_lun & 0x7;
/freebsd-11.0-release/sys/dev/bxe/
H A Dbxe_dump.h140 { 0xa2a4, 2, 0x7, 0x924},
165 { 0xa4a0, 1, 0x7, 0x924},
168 { 0xa4b4, 1, 0x7, 0x924},
190 { 0xa5a0, 1, 0x7, 0x924},
233 { 0x10024, 1, 0x7, 0x924},
235 { 0x1003c, 6, 0x7, 0x924},
237 { 0x100a4, 4, 0x7, 0x924},
239 { 0x100e0, 4, 0x7, 0x924},
241 { 0x10110, 6, 0x7, 0x924},
243 { 0x102e0, 4, 0x7,
[all...]
H A Decore_reg.h2258 #define PCICFG_PM_CAPABILITY_AUX_CURRENT (0x7<<22)
2274 #define PCICFG_MSI_CONTROL_MCAP (0x7<<17)
2275 #define PCICFG_MSI_CONTROL_MENA (0x7<<20)
2286 #define PCICFG_MSIX_CONTROL_RESERVED (0x7<<27)
2823 #define MDIO_RX0_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7
2828 #define MDIO_RX1_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7
2833 #define MDIO_RX2_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7
2838 #define MDIO_RX3_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7
2843 #define MDIO_RX_ALL_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7
3093 #define MDIO_PMA_REG_10G_CTRL2 0x7
[all...]
/freebsd-11.0-release/sys/arm/nvidia/
H A Dtegra_usbphy.c66 #define USB_HOSTPC1_DEVLC_PTS(x) (((x) & 0x7) << 29)
74 #define USB_WAKEUP_DEBOUNCE_COUNT(x) (((x) & 0x7) << 16)
128 #define UTMIP_ACTIVE_TERM_OFFSET(x) (((x) & 0x7) << 15)
129 #define UTMIP_ACTIVE_PULLUP_OFFSET(x) (((x) & 0x7) << 12)
144 #define UTMIP_SQUELCH_EOP_DLY(x) (((x) & 0x7) << 21)
199 #define UTMIP_STABLE_COUNT(x) (((x) & 0x7) << 5)
/freebsd-11.0-release/sys/dev/ath/ath_hal/
H A Dah_eeprom_v3.c107 ee->ee_channels11a[4] |= (eeval >> 13) & 0x7;
589 currCh->pwr_I[3] |= ((eeval >> 0) & 0x7) << 2;
995 pPowerInfo->twicePwr36 |= (eeval >> 13) & 0x7;
1064 rep[4].rdEdge |= (eeval >> 13) & 0x7;
1285 ee->ee_ob2GHz[0] = eeval & 0x7;
1286 ee->ee_db2GHz[0] = (eeval >> 3) & 0x7;
1289 ee->ee_ob2GHz[1] = eeval & 0x7;
1290 ee->ee_db2GHz[1] = (eeval >> 3) & 0x7;
1372 (eeval & 0x7) << 5;
1387 (eeval >> 13) & 0x7;
[all...]
/freebsd-11.0-release/sys/dev/drm2/radeon/
H A Dradeon_reg.h318 # define RADEON_PCIE_LC_LINK_WIDTH_MASK 0x7
970 # define RADEON_HORZ_FP_LOOP_STRETCH (0x7 << 28)
1179 # define RADEON_MCLKA_SRC_SEL_MASK 0x7
1660 # define RADEON_SPLL_PCP_MASK 0x7
1662 # define RADEON_SPLL_PVG_MASK 0x7
2350 # define RADEON_STENCIL_TEST_MASK (0x7 << 12)
2357 # define RADEON_STENCIL_FAIL_MASK (0x7 << 16)
2364 # define RADEON_STENCIL_ZPASS_MASK (0x7 << 20)
2371 # define RADEON_STENCIL_ZFAIL_MASK (0x7 << 24)
3053 # define R200_TXC_TFACTOR_SEL_MASK 0x7
[all...]
/freebsd-11.0-release/sys/boot/pc98/btx/btx/
H A Dbtx.S207 andl $0x7,%eax
223 movb $0x7,%cl # Set remaining
279 testb $0x1,btx_hdr+0x7 # Reboot?
302 movb $0x7,%al # ICW3 to
329 push $0x7 # Int 0x7: #NM
419 reboot: orb $0x1,btx_hdr+0x7 # Set the reboot flag
736 intx30.1: orb $0x1,%ss:btx_hdr+0x7 # Flag reboot
/freebsd-11.0-release/sys/dev/ixgbe/
H A Dixgbe_type.h1325 #define IXGBE_RQTC_TC0_MASK (0x7 << 0)
1326 #define IXGBE_RQTC_TC1_MASK (0x7 << 4)
1327 #define IXGBE_RQTC_TC2_MASK (0x7 << 8)
1328 #define IXGBE_RQTC_TC3_MASK (0x7 << 12)
1329 #define IXGBE_RQTC_TC4_MASK (0x7 << 16)
1330 #define IXGBE_RQTC_TC5_MASK (0x7 << 20)
1331 #define IXGBE_RQTC_TC6_MASK (0x7 << 24)
1332 #define IXGBE_RQTC_TC7_MASK (0x7 << 28)
1335 #define IXGBE_PSRTYPE_RQPL_MASK 0x7
1430 #define IXGBE_MDIO_AUTO_NEG_DEV_TYPE 0x7
[all...]
/freebsd-11.0-release/contrib/binutils/opcodes/
H A Dia64-asmtab.c3319 { 0x6, 0x7, 162, -1, 2384, 27, 1, 50 },
4112 { 0x7, 0x7, 177, -1, -1, 27, 1, 50 },
4295 { 0x7, 0x7, 220, 2495, -1, 27, 1, 49 },
4559 { 0x7, 0x7, 223, 2965, -1, 34, 1, 58 },
4561 { 0x7, 0x7, 223, 2966, -1, 33, 1, 58 },
4575 { 0x7,
[all...]
/freebsd-11.0-release/sys/dev/cxgbe/common/
H A Dt4_msg.h572 #define M_TX_QUEUE 0x7
942 #define M_COOKIE 0x7
1049 #define M_TX_ACK_PAGES 0x7
1055 #define M_TX_PORT 0x7
1092 #define M_TX_ULP_MODE 0x7
1186 #define M_TXPKT_PF 0x7
1200 #define M_TXPKT_T5_OVLAN_IDX 0x7
1878 #define M_RX_PKTYPE 0x7
1893 #define M_RX_T5_PKTYPE 0x7
2377 #define M_SMTW_PF 0x7
[all...]
/freebsd-11.0-release/contrib/binutils/binutils/
H A Dunwind-ia64.c689 mask = ((code & 0x7) << 1) | ((byte1 >> 7) & 1);
731 r = ((code & 0x7) << 1) | ((byte1 >> 7) & 1);
776 else if ((code & 0x7) == 0)
778 else if ((code & 0x7) == 1)
1026 switch (code & 0x7)
/freebsd-11.0-release/sys/dev/drm/
H A Di915_reg.h50 #define INTEL_915G_GMCH_GMS_STOLEN_64M (0x7 << 4)
149 #define GFX_OP_RASTER_RULES ((0x3<<29)|(0x7<<24))
154 #define GFX_OP_LOAD_INDIRECT ((0x3<<29)|(0x1d<<24)|(0x7<<16))
716 #define DVO_PRESERVE_MASK (0x7<<24)
1413 #define DISPPLANE_32BPP (0x7<<26)

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