Lines Matching refs:x7
318 # define RADEON_PCIE_LC_LINK_WIDTH_MASK 0x7
970 # define RADEON_HORZ_FP_LOOP_STRETCH (0x7 << 28)
1179 # define RADEON_MCLKA_SRC_SEL_MASK 0x7
1660 # define RADEON_SPLL_PCP_MASK 0x7
1662 # define RADEON_SPLL_PVG_MASK 0x7
2350 # define RADEON_STENCIL_TEST_MASK (0x7 << 12)
2357 # define RADEON_STENCIL_FAIL_MASK (0x7 << 16)
2364 # define RADEON_STENCIL_ZPASS_MASK (0x7 << 20)
2371 # define RADEON_STENCIL_ZFAIL_MASK (0x7 << 24)
3053 # define R200_TXC_TFACTOR_SEL_MASK 0x7
3055 # define R200_TXC_TFACTOR1_SEL_MASK (0x7 << 4)
3195 # define R200_TXA_TFACTOR_SEL_MASK 0x7
3197 # define R200_TXA_TFACTOR1_SEL_MASK (0x7 << 4)
3634 # define RADEON_TV_M0HI_MASK 0x7