Searched refs:Subtarget (Results 51 - 75 of 112) sorted by relevance

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/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/
H A DMipsISelDAGToDAG.cpp50 Subtarget = &static_cast<const MipsSubtarget &>(MF.getSubtarget());
214 assert((Subtarget->systemSupportsUnalignedAccess() ||
H A DMipsCCState.h28 const MipsSubtarget &Subtarget);
H A DMips16ISelLowering.cpp130 if (!Subtarget.useSoftFloat())
434 if (Subtarget.inMips16HardFloat()) {
526 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
587 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
651 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
715 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
731 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
765 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
783 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
H A DMipsInstrInfo.h36 const MipsSubtarget &Subtarget; member in class:llvm::MipsInstrInfo
H A DMipsLongBranch.cpp259 const MipsSubtarget &Subtarget = local
262 static_cast<const MipsInstrInfo *>(Subtarget.getInstrInfo());
276 unsigned BalOp = Subtarget.hasMips32r6() ? Mips::BAL : Mips::BAL_BR;
332 if (!Subtarget.isTargetNaCl()) {
/freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.h25 const PPCSubtarget &Subtarget; member in class:llvm::PPCFrameLowering
H A DPPCTargetMachine.h32 PPCSubtarget Subtarget; member in class:llvm::PPCTargetMachine
H A DPPCISelLowering.h421 const PPCSubtarget &Subtarget; member in class:llvm::PPCTargetLowering
731 const PPCSubtarget &Subtarget) const;
733 const PPCSubtarget &Subtarget) const;
735 const PPCSubtarget &Subtarget) const;
737 const PPCSubtarget &Subtarget) const;
739 const PPCSubtarget &Subtarget) const;
741 const PPCSubtarget &Subtarget) const;
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h32 const ARMSubtarget &Subtarget; member in class:llvm::ARMBaseInstrInfo
114 const ARMSubtarget &getSubtarget() const { return Subtarget; }
172 const ARMSubtarget &Subtarget) const;
175 const ARMSubtarget &Subtarget) const;
491 bool tryFoldSPUpdateIntoPushPop(const ARMSubtarget &Subtarget,
H A DARMTargetMachine.cpp185 Subtarget(TT, CPU, FS, *this, isLittle), isLittle(isLittle) {
190 Subtarget.isTargetHardFloat() ? FloatABI::Hard : FloatABI::Soft;
195 if (Subtarget.isTargetGNUAEABI())
255 if (!Subtarget.hasARMOps())
256 report_fatal_error("CPU: '" + Subtarget.getCPUString() + "' does not "
H A DARMAsmPrinter.h34 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
36 const ARMSubtarget *Subtarget; member in class:llvm::ARMAsmPrinter
/freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp199 if (Subtarget->is64Bit())
374 if (Subtarget->is64Bit())
682 Subtarget->getStackPointerBias());
707 if (Subtarget->is64Bit())
975 const SparcRegisterInfo *TRI = Subtarget->getRegisterInfo();
1189 unsigned StackOffset = Offset + Subtarget->getStackPointerBias() + 128;
1242 Subtarget->getStackPointerBias() +
1286 const SparcRegisterInfo *TRI = Subtarget->getRegisterInfo();
1426 : TargetLowering(TM), Subtarget(&STI) {
1442 if (Subtarget
2507 LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG, const SparcSubtarget *Subtarget) argument
2538 getFRAMEADDR(uint64_t depth, SDValue Op, SelectionDAG &DAG, const SparcSubtarget *Subtarget) argument
2577 LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG, const SparcSubtarget *Subtarget) argument
2586 LowerRETURNADDR(SDValue Op, SelectionDAG &DAG, const SparcTargetLowering &TLI, const SparcSubtarget *Subtarget) argument
[all...]
H A DSparcTargetMachine.cpp65 Subtarget(TT, CPU, FS, *this, is64bit) {
H A DSparcInstrInfo.cpp37 Subtarget(ST) {}
312 if (Subtarget.isV9()) {
322 if (Subtarget.isV9()) {
323 if (Subtarget.hasHardQuad()) {
463 Subtarget.is64Bit() ? &SP::I64RegsRegClass : &SP::IntRegsRegClass;
H A DSparcFrameLowering.cpp246 const SparcSubtarget &Subtarget = MF.getSubtarget<SparcSubtarget>(); local
248 const SparcRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
277 Subtarget.getStackPointerBias();
H A DSparcISelDAGToDAG.cpp34 /// Subtarget - Keep a pointer to the Sparc Subtarget around so that we can
36 const SparcSubtarget *Subtarget; member in class:__anon3003::SparcDAGToDAGISel
41 Subtarget = &MF.getSubtarget<SparcSubtarget>();
71 unsigned GlobalBaseReg = Subtarget->getInstrInfo()->getGlobalBaseReg(MF);
/freebsd-11.0-release/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.h48 const NVPTXSubtarget *Subtarget; member in class:__anon2949::NVPTXDAGToDAGISel
/freebsd-11.0-release/contrib/llvm/lib/Target/SystemZ/
H A DSystemZTargetMachine.cpp90 Subtarget(TT, CPU, FS, *this) {
/freebsd-11.0-release/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.h45 const WebAssemblySubtarget *Subtarget; member in class:llvm::final
/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp712 auto &HRI = *Subtarget.getRegisterInfo();
775 if (NeedsArgAlign && Subtarget.hasV60TOps()) {
780 bool UseHVXDbl = Subtarget.useHVXDblOps();
781 assert(Subtarget.useHVXOps());
932 auto &HII = *Subtarget.getInstrInfo();
978 const HexagonRegisterInfo *QRI = Subtarget.getRegisterInfo();
1005 auto &HFI = *Subtarget.getFrameLowering();
1054 bool UseHVX = Subtarget.useHVXOps(), UseHVXDbl = Subtarget.useHVXDblOps();
1402 const HexagonRegisterInfo &HRI = *Subtarget
[all...]
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp281 const AArch64Subtarget &Subtarget = MF->getSubtarget<AArch64Subtarget>(); local
282 const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
295 const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>(); local
296 const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
297 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
554 const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>(); local
555 const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
556 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
H A DAArch64InstrInfo.cpp33 RI(STI.getTargetTriple()), Subtarget(STI) {}
546 if (!Subtarget.isCortexA57() && !Subtarget.isCortexA53())
996 unsigned char OpFlags = Subtarget.ClassifyGlobalReference(GV, TM);
1453 if (Subtarget.isCyclone()) {
1527 assert(Subtarget.hasNEON() &&
1559 if (Subtarget.hasZeroCycleRegMove()) {
1580 } else if (SrcReg == AArch64::WZR && Subtarget.hasZeroCycleZeroing()) {
1584 if (Subtarget.hasZeroCycleRegMove()) {
1616 } else if (SrcReg == AArch64::XZR && Subtarget
[all...]
/freebsd-11.0-release/contrib/llvm/lib/Target/X86/
H A DX86TargetMachine.cpp112 Subtarget(TT, CPU, FS, *this, Options.StackAlignmentOverride) {
117 if (Subtarget.isTargetWin64())
/freebsd-11.0-release/contrib/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h97 const XCoreSubtarget &Subtarget);
144 const XCoreSubtarget &Subtarget; member in class:llvm::XCoreTargetLowering
/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp244 if (Subtarget->getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS) {
351 if (Subtarget->getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS) {
379 if (Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS) {
383 } else if (Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS) {
388 } else if (Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS) {
532 static_cast<const SIInstrInfo *>(Subtarget->getInstrInfo());
542 static_cast<const SIRegisterInfo*>(Subtarget->getRegisterInfo());
576 static_cast<const SIRegisterInfo *>(Subtarget->getRegisterInfo());
583 if (Subtarget->isAmdHsaOS() && Info->getShaderType() != ShaderType::COMPUTE) {
706 const unsigned Offset = Subtarget
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