1//===-- PPCFrameLowering.h - Define frame lowering for PowerPC --*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// 11//===----------------------------------------------------------------------===// 12 13#ifndef LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H 14#define LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H 15 16#include "PPC.h" 17#include "llvm/ADT/STLExtras.h" 18#include "llvm/Target/TargetFrameLowering.h" 19#include "llvm/Target/TargetMachine.h" 20 21namespace llvm { 22class PPCSubtarget; 23 24class PPCFrameLowering: public TargetFrameLowering { 25 const PPCSubtarget &Subtarget; 26 const unsigned ReturnSaveOffset; 27 const unsigned TOCSaveOffset; 28 const unsigned FramePointerSaveOffset; 29 const unsigned LinkageSize; 30 const unsigned BasePointerSaveOffset; 31 32 /** 33 * \brief Find register[s] that can be used in function prologue and epilogue 34 * 35 * Find register[s] that can be use as scratch register[s] in function 36 * prologue and epilogue to save various registers (Link Register, Base 37 * Pointer, etc.). Prefer R0/R12, if available. Otherwise choose whatever 38 * register[s] are available. 39 * 40 * This method will return true if it is able to find enough unique scratch 41 * registers (1 or 2 depending on the requirement). If it is unable to find 42 * enough available registers in the block, it will return false and set 43 * any passed output parameter that corresponds to a required unique register 44 * to PPC::NoRegister. 45 * 46 * \param[in] MBB The machine basic block to find an available register for 47 * \param[in] UseAtEnd Specify whether the scratch register will be used at 48 * the end of the basic block (i.e., will the scratch 49 * register kill a register defined in the basic block) 50 * \param[in] TwoUniqueRegsRequired Specify whether this basic block will 51 * require two unique scratch registers. 52 * \param[out] SR1 The scratch register to use 53 * \param[out] SR2 The second scratch register. If this pointer is not null 54 * the function will attempt to set it to an available 55 * register regardless of whether there is a hard requirement 56 * for two unique scratch registers. 57 * \return true if the required number of registers was found. 58 * false if the required number of scratch register weren't available. 59 * If either output parameter refers to a required scratch register 60 * that isn't available, it will be set to an invalid value. 61 */ 62 bool findScratchRegister(MachineBasicBlock *MBB, 63 bool UseAtEnd, 64 bool TwoUniqueRegsRequired = false, 65 unsigned *SR1 = nullptr, 66 unsigned *SR2 = nullptr) const; 67 bool twoUniqueScratchRegsRequired(MachineBasicBlock *MBB) const; 68 69public: 70 PPCFrameLowering(const PPCSubtarget &STI); 71 72 unsigned determineFrameLayout(MachineFunction &MF, 73 bool UpdateMF = true, 74 bool UseEstimate = false) const; 75 76 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into 77 /// the function. 78 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 79 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 80 81 bool hasFP(const MachineFunction &MF) const override; 82 bool needsFP(const MachineFunction &MF) const; 83 void replaceFPWithRealFP(MachineFunction &MF) const; 84 85 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, 86 RegScavenger *RS = nullptr) const override; 87 void processFunctionBeforeFrameFinalized(MachineFunction &MF, 88 RegScavenger *RS = nullptr) const override; 89 void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const; 90 91 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 92 MachineBasicBlock::iterator MI, 93 const std::vector<CalleeSavedInfo> &CSI, 94 const TargetRegisterInfo *TRI) const override; 95 96 void eliminateCallFramePseudoInstr(MachineFunction &MF, 97 MachineBasicBlock &MBB, 98 MachineBasicBlock::iterator I) const override; 99 100 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 101 MachineBasicBlock::iterator MI, 102 const std::vector<CalleeSavedInfo> &CSI, 103 const TargetRegisterInfo *TRI) const override; 104 105 /// targetHandlesStackFrameRounding - Returns true if the target is 106 /// responsible for rounding up the stack frame (probably at emitPrologue 107 /// time). 108 bool targetHandlesStackFrameRounding() const override { return true; } 109 110 /// getReturnSaveOffset - Return the previous frame offset to save the 111 /// return address. 112 unsigned getReturnSaveOffset() const { return ReturnSaveOffset; } 113 114 /// getTOCSaveOffset - Return the previous frame offset to save the 115 /// TOC register -- 64-bit SVR4 ABI only. 116 unsigned getTOCSaveOffset() const { return TOCSaveOffset; } 117 118 /// getFramePointerSaveOffset - Return the previous frame offset to save the 119 /// frame pointer. 120 unsigned getFramePointerSaveOffset() const { return FramePointerSaveOffset; } 121 122 /// getBasePointerSaveOffset - Return the previous frame offset to save the 123 /// base pointer. 124 unsigned getBasePointerSaveOffset() const { return BasePointerSaveOffset; } 125 126 /// getLinkageSize - Return the size of the PowerPC ABI linkage area. 127 /// 128 unsigned getLinkageSize() const { return LinkageSize; } 129 130 const SpillSlot * 131 getCalleeSavedSpillSlots(unsigned &NumEntries) const override; 132 133 bool enableShrinkWrapping(const MachineFunction &MF) const override; 134 135 /// Methods used by shrink wrapping to determine if MBB can be used for the 136 /// function prologue/epilogue. 137 bool canUseAsPrologue(const MachineBasicBlock &MBB) const override; 138 bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override; 139}; 140} // End llvm namespace 141 142#endif 143