1//===-- SparcFrameLowering.cpp - Sparc Frame Information ------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the Sparc implementation of TargetFrameLowering class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "SparcFrameLowering.h"
15#include "SparcInstrInfo.h"
16#include "SparcMachineFunctionInfo.h"
17#include "SparcSubtarget.h"
18#include "llvm/CodeGen/MachineFrameInfo.h"
19#include "llvm/CodeGen/MachineFunction.h"
20#include "llvm/CodeGen/MachineInstrBuilder.h"
21#include "llvm/CodeGen/MachineModuleInfo.h"
22#include "llvm/CodeGen/MachineRegisterInfo.h"
23#include "llvm/IR/DataLayout.h"
24#include "llvm/IR/Function.h"
25#include "llvm/Support/CommandLine.h"
26#include "llvm/Target/TargetOptions.h"
27
28using namespace llvm;
29
30static cl::opt<bool>
31DisableLeafProc("disable-sparc-leaf-proc",
32                cl::init(false),
33                cl::desc("Disable Sparc leaf procedure optimization."),
34                cl::Hidden);
35
36SparcFrameLowering::SparcFrameLowering(const SparcSubtarget &ST)
37    : TargetFrameLowering(TargetFrameLowering::StackGrowsDown,
38                          ST.is64Bit() ? 16 : 8, 0, ST.is64Bit() ? 16 : 8) {}
39
40void SparcFrameLowering::emitSPAdjustment(MachineFunction &MF,
41                                          MachineBasicBlock &MBB,
42                                          MachineBasicBlock::iterator MBBI,
43                                          int NumBytes,
44                                          unsigned ADDrr,
45                                          unsigned ADDri) const {
46
47  DebugLoc dl;
48  const SparcInstrInfo &TII =
49      *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
50
51  if (NumBytes >= -4096 && NumBytes < 4096) {
52    BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6)
53      .addReg(SP::O6).addImm(NumBytes);
54    return;
55  }
56
57  // Emit this the hard way.  This clobbers G1 which we always know is
58  // available here.
59  if (NumBytes >= 0) {
60    // Emit nonnegative numbers with sethi + or.
61    // sethi %hi(NumBytes), %g1
62    // or %g1, %lo(NumBytes), %g1
63    // add %sp, %g1, %sp
64    BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1)
65      .addImm(HI22(NumBytes));
66    BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
67      .addReg(SP::G1).addImm(LO10(NumBytes));
68    BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
69      .addReg(SP::O6).addReg(SP::G1);
70    return ;
71  }
72
73  // Emit negative numbers with sethi + xor.
74  // sethi %hix(NumBytes), %g1
75  // xor %g1, %lox(NumBytes), %g1
76  // add %sp, %g1, %sp
77  BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1)
78    .addImm(HIX22(NumBytes));
79  BuildMI(MBB, MBBI, dl, TII.get(SP::XORri), SP::G1)
80    .addReg(SP::G1).addImm(LOX10(NumBytes));
81  BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
82    .addReg(SP::O6).addReg(SP::G1);
83}
84
85void SparcFrameLowering::emitPrologue(MachineFunction &MF,
86                                      MachineBasicBlock &MBB) const {
87  SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
88
89  assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
90  MachineFrameInfo *MFI = MF.getFrameInfo();
91  const SparcInstrInfo &TII =
92      *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
93  const SparcRegisterInfo &RegInfo =
94      *static_cast<const SparcRegisterInfo *>(MF.getSubtarget().getRegisterInfo());
95  MachineBasicBlock::iterator MBBI = MBB.begin();
96  // Debug location must be unknown since the first debug location is used
97  // to determine the end of the prologue.
98  DebugLoc dl;
99  bool NeedsStackRealignment = RegInfo.needsStackRealignment(MF);
100
101  // FIXME: unfortunately, returning false from canRealignStack
102  // actually just causes needsStackRealignment to return false,
103  // rather than reporting an error, as would be sensible. This is
104  // poor, but fixing that bogosity is going to be a large project.
105  // For now, just see if it's lied, and report an error here.
106  if (!NeedsStackRealignment && MFI->getMaxAlignment() > getStackAlignment())
107    report_fatal_error("Function \"" + Twine(MF.getName()) + "\" required "
108                       "stack re-alignment, but LLVM couldn't handle it "
109                       "(probably because it has a dynamic alloca).");
110
111  // Get the number of bytes to allocate from the FrameInfo
112  int NumBytes = (int) MFI->getStackSize();
113
114  unsigned SAVEri = SP::SAVEri;
115  unsigned SAVErr = SP::SAVErr;
116  if (FuncInfo->isLeafProc()) {
117    if (NumBytes == 0)
118      return;
119    SAVEri = SP::ADDri;
120    SAVErr = SP::ADDrr;
121  }
122
123  // The SPARC ABI is a bit odd in that it requires a reserved 92-byte
124  // (128 in v9) area in the user's stack, starting at %sp. Thus, the
125  // first part of the stack that can actually be used is located at
126  // %sp + 92.
127  //
128  // We therefore need to add that offset to the total stack size
129  // after all the stack objects are placed by
130  // PrologEpilogInserter calculateFrameObjectOffsets. However, since the stack needs to be
131  // aligned *after* the extra size is added, we need to disable
132  // calculateFrameObjectOffsets's built-in stack alignment, by having
133  // targetHandlesStackFrameRounding return true.
134
135
136  // Add the extra call frame stack size, if needed. (This is the same
137  // code as in PrologEpilogInserter, but also gets disabled by
138  // targetHandlesStackFrameRounding)
139  if (MFI->adjustsStack() && hasReservedCallFrame(MF))
140    NumBytes += MFI->getMaxCallFrameSize();
141
142  // Adds the SPARC subtarget-specific spill area to the stack
143  // size. Also ensures target-required alignment.
144  NumBytes = MF.getSubtarget<SparcSubtarget>().getAdjustedFrameSize(NumBytes);
145
146  // Finally, ensure that the size is sufficiently aligned for the
147  // data on the stack.
148  if (MFI->getMaxAlignment() > 0) {
149    NumBytes = RoundUpToAlignment(NumBytes, MFI->getMaxAlignment());
150  }
151
152  // Update stack size with corrected value.
153  MFI->setStackSize(NumBytes);
154
155  emitSPAdjustment(MF, MBB, MBBI, -NumBytes, SAVErr, SAVEri);
156
157  MachineModuleInfo &MMI = MF.getMMI();
158  unsigned regFP = RegInfo.getDwarfRegNum(SP::I6, true);
159
160  // Emit ".cfi_def_cfa_register 30".
161  unsigned CFIIndex =
162      MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, regFP));
163  BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
164      .addCFIIndex(CFIIndex);
165
166  // Emit ".cfi_window_save".
167  CFIIndex = MMI.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
168  BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
169      .addCFIIndex(CFIIndex);
170
171  unsigned regInRA = RegInfo.getDwarfRegNum(SP::I7, true);
172  unsigned regOutRA = RegInfo.getDwarfRegNum(SP::O7, true);
173  // Emit ".cfi_register 15, 31".
174  CFIIndex = MMI.addFrameInst(
175      MCCFIInstruction::createRegister(nullptr, regOutRA, regInRA));
176  BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
177      .addCFIIndex(CFIIndex);
178
179  if (NeedsStackRealignment) {
180    // andn %o6, MaxAlign-1, %o6
181    int MaxAlign = MFI->getMaxAlignment();
182    BuildMI(MBB, MBBI, dl, TII.get(SP::ANDNri), SP::O6).addReg(SP::O6).addImm(MaxAlign - 1);
183  }
184}
185
186void SparcFrameLowering::
187eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
188                              MachineBasicBlock::iterator I) const {
189  if (!hasReservedCallFrame(MF)) {
190    MachineInstr &MI = *I;
191    int Size = MI.getOperand(0).getImm();
192    if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
193      Size = -Size;
194
195    if (Size)
196      emitSPAdjustment(MF, MBB, I, Size, SP::ADDrr, SP::ADDri);
197  }
198  MBB.erase(I);
199}
200
201
202void SparcFrameLowering::emitEpilogue(MachineFunction &MF,
203                                  MachineBasicBlock &MBB) const {
204  SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
205  MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
206  const SparcInstrInfo &TII =
207      *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
208  DebugLoc dl = MBBI->getDebugLoc();
209  assert(MBBI->getOpcode() == SP::RETL &&
210         "Can only put epilog before 'retl' instruction!");
211  if (!FuncInfo->isLeafProc()) {
212    BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0)
213      .addReg(SP::G0);
214    return;
215  }
216  MachineFrameInfo *MFI = MF.getFrameInfo();
217
218  int NumBytes = (int) MFI->getStackSize();
219  if (NumBytes == 0)
220    return;
221
222  emitSPAdjustment(MF, MBB, MBBI, NumBytes, SP::ADDrr, SP::ADDri);
223}
224
225bool SparcFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
226  // Reserve call frame if there are no variable sized objects on the stack.
227  return !MF.getFrameInfo()->hasVarSizedObjects();
228}
229
230// hasFP - Return true if the specified function should have a dedicated frame
231// pointer register.  This is true if the function has variable sized allocas or
232// if frame pointer elimination is disabled.
233bool SparcFrameLowering::hasFP(const MachineFunction &MF) const {
234  const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
235
236  const MachineFrameInfo *MFI = MF.getFrameInfo();
237  return MF.getTarget().Options.DisableFramePointerElim(MF) ||
238      RegInfo->needsStackRealignment(MF) ||
239      MFI->hasVarSizedObjects() ||
240      MFI->isFrameAddressTaken();
241}
242
243
244int SparcFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
245                                               unsigned &FrameReg) const {
246  const SparcSubtarget &Subtarget = MF.getSubtarget<SparcSubtarget>();
247  const MachineFrameInfo *MFI = MF.getFrameInfo();
248  const SparcRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
249  const SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
250  bool isFixed = MFI->isFixedObjectIndex(FI);
251
252  // Addressable stack objects are accessed using neg. offsets from
253  // %fp, or positive offsets from %sp.
254  bool UseFP;
255
256  // Sparc uses FP-based references in general, even when "hasFP" is
257  // false. That function is rather a misnomer, because %fp is
258  // actually always available, unless isLeafProc.
259  if (FuncInfo->isLeafProc()) {
260    // If there's a leaf proc, all offsets need to be %sp-based,
261    // because we haven't caused %fp to actually point to our frame.
262    UseFP = false;
263  } else if (isFixed) {
264    // Otherwise, argument access should always use %fp.
265    UseFP = true;
266  } else if (RegInfo->needsStackRealignment(MF)) {
267    // If there is dynamic stack realignment, all local object
268    // references need to be via %sp, to take account of the
269    // re-alignment.
270    UseFP = false;
271  } else {
272    // Finally, default to using %fp.
273    UseFP = true;
274  }
275
276  int64_t FrameOffset = MF.getFrameInfo()->getObjectOffset(FI) +
277      Subtarget.getStackPointerBias();
278
279  if (UseFP) {
280    FrameReg = RegInfo->getFrameRegister(MF);
281    return FrameOffset;
282  } else {
283    FrameReg = SP::O6; // %sp
284    return FrameOffset + MF.getFrameInfo()->getStackSize();
285  }
286}
287
288static bool LLVM_ATTRIBUTE_UNUSED verifyLeafProcRegUse(MachineRegisterInfo *MRI)
289{
290
291  for (unsigned reg = SP::I0; reg <= SP::I7; ++reg)
292    if (!MRI->reg_nodbg_empty(reg))
293      return false;
294
295  for (unsigned reg = SP::L0; reg <= SP::L7; ++reg)
296    if (!MRI->reg_nodbg_empty(reg))
297      return false;
298
299  return true;
300}
301
302bool SparcFrameLowering::isLeafProc(MachineFunction &MF) const
303{
304
305  MachineRegisterInfo &MRI = MF.getRegInfo();
306  MachineFrameInfo    *MFI = MF.getFrameInfo();
307
308  return !(MFI->hasCalls()                 // has calls
309           || !MRI.reg_nodbg_empty(SP::L0) // Too many registers needed
310           || !MRI.reg_nodbg_empty(SP::O6) // %SP is used
311           || hasFP(MF));                  // need %FP
312}
313
314void SparcFrameLowering::remapRegsForLeafProc(MachineFunction &MF) const {
315  MachineRegisterInfo &MRI = MF.getRegInfo();
316  // Remap %i[0-7] to %o[0-7].
317  for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
318    if (MRI.reg_nodbg_empty(reg))
319      continue;
320
321    unsigned mapped_reg = reg - SP::I0 + SP::O0;
322    assert(MRI.reg_nodbg_empty(mapped_reg));
323
324    // Replace I register with O register.
325    MRI.replaceRegWith(reg, mapped_reg);
326
327    // Also replace register pair super-registers.
328    if ((reg - SP::I0) % 2 == 0) {
329      unsigned preg = (reg - SP::I0) / 2 + SP::I0_I1;
330      unsigned mapped_preg = preg - SP::I0_I1 + SP::O0_O1;
331      MRI.replaceRegWith(preg, mapped_preg);
332    }
333  }
334
335  // Rewrite MBB's Live-ins.
336  for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
337       MBB != E; ++MBB) {
338    for (unsigned reg = SP::I0_I1; reg <= SP::I6_I7; ++reg) {
339      if (!MBB->isLiveIn(reg))
340        continue;
341      MBB->removeLiveIn(reg);
342      MBB->addLiveIn(reg - SP::I0_I1 + SP::O0_O1);
343    }
344    for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
345      if (!MBB->isLiveIn(reg))
346        continue;
347      MBB->removeLiveIn(reg);
348      MBB->addLiveIn(reg - SP::I0 + SP::O0);
349    }
350  }
351
352  assert(verifyLeafProcRegUse(&MRI));
353#ifdef XDEBUG
354  MF.verify(0, "After LeafProc Remapping");
355#endif
356}
357
358void SparcFrameLowering::determineCalleeSaves(MachineFunction &MF,
359                                              BitVector &SavedRegs,
360                                              RegScavenger *RS) const {
361  TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
362  if (!DisableLeafProc && isLeafProc(MF)) {
363    SparcMachineFunctionInfo *MFI = MF.getInfo<SparcMachineFunctionInfo>();
364    MFI->setLeafProc(true);
365
366    remapRegsForLeafProc(MF);
367  }
368
369}
370