/freebsd-11-stable/sys/dev/drm2/radeon/ |
H A D | radeon_i2c.c | 107 u32 reg; local 110 reg = RADEON_GPIO_MONID; 113 reg = RADEON_GPIO_DVI_DDC; 115 reg = RADEON_GPIO_CRT2_DDC; 118 if (rec->a_clk_reg == reg) { 411 u32 tmp, reg; local 419 reg = ((prescale << RADEON_I2C_PRESCALE_SHIFT) | 460 reg |= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1); 463 reg |= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3); 476 reg | 662 u32 tmp, reg; local [all...] |
/freebsd-11-stable/sys/arm/allwinner/clk/ |
H A D | aw_debeclk.c | 73 bus_addr_t reg; member in struct:aw_debeclk_softc 76 #define DEBECLK_READ(sc, val) CLKDEV_READ_4((sc)->clkdev, (sc)->reg, (val)) 77 #define DEBECLK_WRITE(sc, val) CLKDEV_WRITE_4((sc)->clkdev, (sc)->reg, (val)) 79 CLKDEV_MODIFY_4((sc)->clkdev, (sc)->reg, (clr), (set)) 266 if (ofw_reg_to_paddr(node, 0, &sc->reg, &psize, NULL) != 0) { 267 device_printf(dev, "cannot parse 'reg' property\n"); 308 clk_sc->reg = sc->reg;
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H A D | aw_usbclk.c | 85 bus_addr_t reg; member in struct:aw_usbclk_softc 102 error = CLKDEV_MODIFY_4(pdev, sc->reg, mask, value ? 0 : mask); 122 error = CLKDEV_READ_4(pdev, sc->reg, &val); 186 if (ofw_reg_to_paddr(node, 0, &sc->reg, &psize, NULL) != 0) { 187 device_printf(dev, "cannot parse 'reg' property\n"); 223 error = aw_usbclk_create(dev, sc->reg, clkdom, pname,
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/freebsd-11-stable/sys/arm64/arm64/ |
H A D | trap.c | 258 u_int reg; local 260 for (reg = 0; reg < 31; reg++) { 261 printf(" %sx%d: %16lx\n", (reg < 10) ? " " : "", reg, 262 frame->tf_x[reg]);
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/freebsd-11-stable/sys/dev/sk/ |
H A D | if_sk.c | 348 #define SK_SETBIT(sc, reg, x) \ 349 CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | x) 351 #define SK_CLRBIT(sc, reg, x) \ 352 CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~x) 354 #define SK_WIN_SETBIT_4(sc, reg, x) \ 355 sk_win_write_4(sc, reg, sk_win_read_4(sc, reg) | x) 357 #define SK_WIN_CLRBIT_4(sc, reg, 3345 u_int16_t reg; local 3494 u_int16_t reg; local [all...] |
/freebsd-11-stable/sys/dev/usb/wlan/ |
H A D | if_rsu.c | 977 uint32_t reg; local 980 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 981 reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr); 982 reg &= ~R92S_EFUSE_CTRL_VALID; 983 rsu_write_4(sc, R92S_EFUSE_CTRL, reg); 986 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 987 if (reg & R92S_EFUSE_CTRL_VALID) 988 return (MS(reg, R92S_EFUSE_CTRL_DATA)); 1001 uint32_t reg; local 1109 uint32_t reg; local 2360 uint32_t reg; local 2442 uint32_t reg; local 2635 uint32_t reg; local [all...] |
/freebsd-11-stable/sys/arm/mv/ |
H A D | mv_pci.c | 252 #define PCI_CFG_PCIE_REG(reg) ((reg) & 0xfc) 672 int reg, width; local 674 reg = PCIR_BAR(barno); 680 mv_pcib_write_config(sc->sc_dev, bus, slot, func, reg, ~0, 4); 681 bar = mv_pcib_read_config(sc->sc_dev, bus, slot, func, reg, 4); 693 printf("PCI %u:%u:%u: reg %x: smask=%08x: addr=%08x\n", 694 bus, slot, func, reg, bar, addr); 696 mv_pcib_write_config(sc->sc_dev, bus, slot, func, reg, addr, 4); 698 mv_pcib_write_config(sc->sc_dev, bus, slot, func, reg 940 mv_pcib_hw_cfgread(struct mv_pcib_softc *sc, u_int bus, u_int slot, u_int func, u_int reg, int bytes) argument 975 mv_pcib_hw_cfgwrite(struct mv_pcib_softc *sc, u_int bus, u_int slot, u_int func, u_int reg, uint32_t data, int bytes) argument 1035 mv_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, int bytes) argument 1049 mv_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, uint32_t val, int bytes) argument 1066 struct ofw_pci_register reg; local [all...] |
/freebsd-11-stable/sys/dev/qlxge/ |
H A D | qls_dump.c | 375 qls_wait_reg_rdy(qla_host_t *ha , uint32_t reg, uint32_t bit, uint32_t err_bit) argument 382 data = READ_REG32(ha, reg); 396 qls_rd_mpi_reg(qla_host_t *ha, uint32_t reg, uint32_t *data) argument 406 WRITE_REG32(ha, Q81_CTL_PROC_ADDR, reg | Q81_CTL_PROC_ADDR_READ); 421 qls_wr_mpi_reg(qla_host_t *ha, uint32_t reg, uint32_t data) argument 432 WRITE_REG32(ha, Q81_CTL_PROC_ADDR, reg); 482 qls_rd_ofunc_reg(qla_host_t *ha, uint32_t reg) argument 493 reg = Q81_CTL_PROC_ADDR_REG_BLOCK | (ofunc << Q81_FUNCTION_SHIFT) | reg; 495 ret = qls_rd_mpi_reg(ha, reg, 504 qls_wr_ofunc_reg(qla_host_t *ha, uint32_t reg, uint32_t value) argument 522 qls_wait_ofunc_reg_rdy(qla_host_t *ha , uint32_t reg, uint32_t bit, uint32_t err_bit) argument 547 qls_rd_ofunc_serdes_reg(qla_host_t *ha, uint32_t reg, uint32_t *data) argument 579 qls_rd_ofunc_xgmac_reg(qla_host_t *ha, uint32_t reg, uint32_t *data) argument 604 qls_rd_serdes_reg(qla_host_t *ha, uint32_t reg, uint32_t *data) argument 864 qls_rd_xgmac_reg(qla_host_t *ha, uint32_t reg, uint32_t*data) argument 1596 uint32_t reg, reg_val; local [all...] |
/freebsd-11-stable/contrib/binutils/opcodes/ |
H A D | cr16-dis.c | 204 getregname (reg r) 206 const reg_entry *reg = cr16_regtab + r; local 208 if (reg->type != CR16_R_REGTYPE) 211 return reg->name; 217 getregpname (reg r) 219 const reg_entry *reg = cr16_regptab + r; local 221 if (reg->type != CR16_RP_REGTYPE) 224 return reg->name; 230 getidxregpname (reg r) 232 const reg_entry *reg; local [all...] |
/freebsd-11-stable/sys/dev/mii/ |
H A D | mii_physubr.c | 292 int reg; local 306 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 307 if ((reg & BMSR_LINK) != 0) { 335 int i, reg; local 338 reg = BMCR_RESET; 340 reg = BMCR_RESET | BMCR_ISO; 341 PHY_WRITE(sc, MII_BMCR, reg); 345 reg = PHY_READ(sc, MII_BMCR); 346 if ((reg & BMCR_RESET) == 0) 352 reg [all...] |
H A D | rlswitch.c | 383 int phy, reg, val; local 390 for (reg = 0; reg <= 31; reg++) { 391 val = MIIBUS_READREG(sc->mii_dev, phy, reg);
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/freebsd-11-stable/sys/mips/malta/ |
H A D | gt_pci.c | 429 int reg, uint32_t *addr) 431 *addr = (bus << 16) | (slot << 11) | (func << 8) | reg; 437 gt_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, argument 445 if (gt_pci_conf_setup(sc, bus, slot, func, reg & ~3, &addr)) 463 switch(reg % 4) 487 if(reg % 4 == 0) 500 bus, slot, func, reg, data, bytes); 507 gt_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, argument 517 reg_data = gt_pci_read_config(dev, bus, slot, func, reg, 4); 519 shift = 8 * (reg 428 gt_pci_conf_setup(struct gt_pci_softc *sc, int bus, int slot, int func, int reg, uint32_t *addr) argument [all...] |
/freebsd-11-stable/sys/i386/i386/ |
H A D | db_trace.c | 40 #include <machine/reg.h> 91 int *reg; local 96 reg = (int *)((uintptr_t)kdb_frame + (db_expr_t)vp->valuep); 98 *valuep = *reg; 100 *reg = *valuep; 109 uint16_t *reg; local 119 reg = (uint16_t *)&tfp->tf_cs; 122 reg = (uint16_t *)&tfp->tf_vm86_ds; 125 reg = (uint16_t *)&tfp->tf_vm86_es; 128 reg [all...] |
/freebsd-11-stable/sys/arm/allwinner/ |
H A D | a10_fb.c | 172 #define DEBE_READ(sc, reg) bus_read_4((sc)->res[0], (reg)) 173 #define DEBE_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val)) 175 #define TCON_READ(sc, reg) bus_read_4((sc)->res[1], (reg)) 176 #define TCON_WRITE(sc, reg, val) bus_write_4((sc)->res[1], (reg), (val)) 201 int width, height, interlace, reg; local 262 for (reg [all...] |
/freebsd-11-stable/sys/arm/ti/ |
H A D | ti_i2c.c | 375 uint16_t reg; local 430 reg = ti_i2c_read_2(sc, I2C_REG_BUF); 431 reg |= I2C_BUF_RXFIFO_CLR | I2C_BUF_TXFIFO_CLR; 432 ti_i2c_write_2(sc, I2C_REG_BUF, reg); 434 reg = sc->sc_con_reg | I2C_CON_STT; 436 reg |= I2C_CON_STP; 438 reg |= I2C_CON_TRX; 439 ti_i2c_write_2(sc, I2C_REG_CON, reg); 479 uint16_t fifo_trsh, reg, scll, sclh; local 620 reg [all...] |
/freebsd-11-stable/sbin/etherswitchcfg/ |
H A D | etherswitchcfg.c | 126 er.reg = r; 137 er.reg = r; 144 read_phyregister(struct cfg *cfg, int phy, int reg) argument 149 er.reg = reg; 156 write_phyregister(struct cfg *cfg, int phy, int reg, int val) argument 161 er.reg = reg; 351 int phy, reg, val; local 360 reg [all...] |
/freebsd-11-stable/contrib/wpa/src/wps/ |
H A D | wps.h | 845 void wps_registrar_deinit(struct wps_registrar *reg); 846 int wps_registrar_add_pin(struct wps_registrar *reg, const u8 *addr, 849 int wps_registrar_invalidate_pin(struct wps_registrar *reg, const u8 *uuid); 850 int wps_registrar_wps_cancel(struct wps_registrar *reg); 851 int wps_registrar_unlock_pin(struct wps_registrar *reg, const u8 *uuid); 852 int wps_registrar_button_pushed(struct wps_registrar *reg, 856 void wps_registrar_probe_req_rx(struct wps_registrar *reg, const u8 *addr, 859 int wps_registrar_update_ie(struct wps_registrar *reg); 860 int wps_registrar_get_info(struct wps_registrar *reg, const u8 *addr, 862 int wps_registrar_config_ap(struct wps_registrar *reg, [all...] |
/freebsd-11-stable/sys/arm/xscale/ixp425/ |
H A D | cambria_gpio.c | 71 #define GPIO_CONF_CLR(sc, reg, mask) \ 72 GPIO_CONF_WRITE_4(sc, reg, GPIO_CONF_READ_4(sc, reg) &~ (mask)) 73 #define GPIO_CONF_SET(sc, reg, mask) \ 74 GPIO_CONF_WRITE_4(sc, reg, GPIO_CONF_READ_4(sc, reg) | (mask)) 138 uint32_t reg; local 143 reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPINR); 145 return (reg & GPIO_I2C_SDA_BIT);
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/freebsd-11-stable/sys/mips/atheros/ |
H A D | apb.c | 87 uint32_t reg; local 89 reg = ATH_READ_REG(AR71XX_MISC_INTR_MASK); 90 ATH_WRITE_REG(AR71XX_MISC_INTR_MASK, reg & ~(1 << irq)); 97 uint32_t reg; local 100 reg = ATH_READ_REG(AR71XX_MISC_INTR_MASK); 101 ATH_WRITE_REG(AR71XX_MISC_INTR_MASK, reg | (1 << irq)); 350 uint32_t reg, irq; local 354 reg = ATH_READ_REG(AR71XX_MISC_INTR_STATUS); 356 if (reg & (1 << irq)) {
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/freebsd-11-stable/sys/dev/tsec/ |
H A D | if_tsec_fdt.c | 125 * Device trees with "fsl,etsec2" compatible nodes don't have a reg 199 OF_getencprop(phy, "reg", &sc->phyaddr, sizeof(sc->phyaddr)); 359 uint32_t reg[2]; member in union:__anon7881 364 hw.reg[0] = hw.reg[1] = 0; 368 if (i == 6 && (hw.reg[0] != 0 || hw.reg[1] != 0)) { 375 if (i == 6 && (hw.reg[0] != 0 || hw.reg[1] != 0)) { 384 hw.reg[ [all...] |
/freebsd-11-stable/sys/cddl/dev/dtrace/powerpc/ |
H A D | dtrace_isa.c | 42 #include <machine/reg.h> 475 struct reg *rp = (struct reg *)((uintptr_t)fp[0] + 48); 477 struct reg *rp = (struct reg *)((uintptr_t)fp[0] + 8); 554 dtrace_getreg(struct trapframe *rp, uint_t reg) argument 556 if (reg < 32) 557 return (rp->fixreg[reg]); 559 switch (reg) {
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/freebsd-11-stable/sys/dev/nvme/ |
H A D | nvme_private.h | 318 #define nvme_mmio_offsetof(reg) \ 319 offsetof(struct nvme_registers, reg) 321 #define nvme_mmio_read_4(sc, reg) \ 323 nvme_mmio_offsetof(reg)) 325 #define nvme_mmio_write_4(sc, reg, val) \ 327 nvme_mmio_offsetof(reg), val) 329 #define nvme_mmio_write_8(sc, reg, val) \ 332 nvme_mmio_offsetof(reg), val & 0xFFFFFFFF); \ 334 nvme_mmio_offsetof(reg)+4, \
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/freebsd-11-stable/sys/mips/nlm/dev/net/ |
H A D | xaui.c | 47 int block, lane_ctrl, reg; local 119 reg = NAE_REG(block, PHY, lane_ctrl - 4); 122 regval = nlm_read_nae_reg(nae_base, reg); 127 regval = nlm_read_nae_reg(nae_base, reg); 132 regval = nlm_read_nae_reg(nae_base, reg);
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/freebsd-11-stable/tools/tools/ath/athpoke/ |
H A D | athpoke.c | 60 fprintf(stderr, "usage: athpoke [-i interface] [reg[=value]] ...\n"); 102 uint32_t reg; local 110 reg = (uint32_t) strtoul(argv[0], &eptr, 0); 114 reg = dr->addr; 116 regwrite(s, &atd, reg, (uint32_t) strtoul(cp, NULL, 0)); 117 printf("%s = %08x\n", argv[0], regread(s, &atd, reg));
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/freebsd-11-stable/sys/arm/arm/ |
H A D | machdep_ptrace.c | 59 ptrace_get_usr_reg(void *cookie, int reg) argument 64 KASSERT(((reg >= 0) && (reg <= ARM_REG_NUM_PC)), 65 ("reg is outside range")); 67 switch(reg) { 78 ret = *((register_t*)&td->td_frame->tf_r0 + reg); 274 case 0x7: /* ldr pc, [pc, reg, lsl #2] */ 280 case 0x1: /* mov pc, reg */ 284 case 0x5: /* ldr pc, [reg] */ 286 /* ldr pc, [reg, #offse [all...] |