Searched refs:reg (Results 701 - 725 of 1755) sorted by relevance

<<21222324252627282930>>

/freebsd-11-stable/contrib/lua/src/
H A Dlcode.c191 ** Otherwise, if 'reg' is not 'NO_REG', set it as the destination
195 static int patchtestreg (FuncState *fs, int node, int reg) { argument
199 if (reg != NO_REG && reg != GETARG_B(*i))
200 SETARG_A(*i, reg);
222 ** values in 'reg'), other tests jump to 'dtarget'.
224 static void patchlistaux (FuncState *fs, int list, int vtarget, int reg, argument
228 if (patchtestreg(fs, list, reg))
346 int luaK_codek (FuncState *fs, int reg, int k) { argument
348 return luaK_codeABx(fs, OP_LOADK, reg,
386 freereg(FuncState *fs, int reg) argument
595 discharge2reg(FuncState *fs, expdesc *e, int reg) argument
675 exp2reg(FuncState *fs, expdesc *e, int reg) argument
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/freebsd-11-stable/sys/dev/age/
H A Dif_age.c210 age_miibus_readreg(device_t dev, int phy, int reg) argument
219 MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg));
228 device_printf(sc->age_dev, "phy read timeout : %d\n", reg);
239 age_miibus_writereg(device_t dev, int phy, int reg, int val) argument
249 MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg));
258 device_printf(sc->age_dev, "phy write timeout : %d\n", reg);
340 uint32_t ea[2], reg; local
343 reg = CSR_READ_4(sc, AGE_SPI_CTRL);
344 if ((reg & SPI_VPD_ENB) != 0) {
346 reg
385 uint16_t reg, pn; local
1325 uint32_t reg, pmcs; local
1820 uint32_t reg; local
1933 uint32_t reg; local
1971 uint32_t reg; local
2538 uint32_t reg; local
2575 uint32_t reg, fsize; local
2856 uint32_t reg; local
2930 uint32_t reg; local
2959 uint32_t reg; local
3132 uint32_t reg; local
[all...]
/freebsd-11-stable/sys/dev/adb/
H A Dadb_bus.c51 static int adb_send_raw_packet_sync(device_t dev, uint8_t to, uint8_t command, uint8_t reg, int len, u_char *data, u_char *reply);
255 adb_send_packet(device_t dev, u_char command, u_char reg, int len, u_char *data) argument
266 command_byte |= reg;
316 uint8_t reg, int len, u_char *data, u_char *reply)
327 command_byte |= reg;
390 adb_read_register(device_t dev, u_char reg, void *data) argument
400 ADB_COMMAND_TALK, reg, 0, NULL, data);
406 adb_write_register(device_t dev, u_char reg, size_t len, void *data) argument
416 ADB_COMMAND_LISTEN, reg, len, (u_char *)data, NULL);
419 ADB_COMMAND_TALK, reg,
315 adb_send_raw_packet_sync(device_t dev, uint8_t to, uint8_t command, uint8_t reg, int len, u_char *data, u_char *reply) argument
[all...]
/freebsd-11-stable/sys/dev/drm/
H A Dr128_drv.h396 #define R128_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
397 #define R128_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) )
398 #define R128_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) )
399 #define R128_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) )
408 #define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \
409 ((n) << 16) | ((reg) >>
[all...]
H A Dmach64_dma.c429 u32 reg, count; local
431 reg = le32_to_cpu(*p++);
437 DRM_INFO("%08x: 0x%08x\n", addr, reg);
442 count = (reg >> 16) + 1;
443 reg = reg & 0xffff;
444 reg = MMSELECT(reg);
453 reg, le32_to_cpu(*p));
465 reg
825 u32 reg; local
938 u32 reg; local
1186 u32 used, reg, target; local
[all...]
H A Di915_drv.h567 #define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, (reg))
568 #define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, (reg), (val))
569 #define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, (reg))
570 #define I915_WRITE16(reg,val) DRM_WRITE16(dev_priv->mmio_map, (reg), (val))
571 #define I915_READ8(reg) DRM_READ8(dev_priv->mmio_map, (reg))
[all...]
/freebsd-11-stable/sys/dev/drm2/i915/
H A Dintel_panel.c306 uint32_t reg, tmp; local
308 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
310 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
329 uint32_t reg, tmp; local
331 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
334 tmp = I915_READ(reg);
350 I915_WRITE(reg, tmp);
351 POSTING_READ(reg);
352 I915_WRITE(reg, tm
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/freebsd-11-stable/sys/dev/bhnd/cores/pci/
H A Dbhnd_pci.c383 bhnd_pcie_mdio_read(struct bhnd_pci_softc *sc, int phy, int reg) argument
394 cmd = BHND_PCIE_MDIODATA_ADDR(phy, reg);
408 bhnd_pcie_mdio_write(struct bhnd_pci_softc *sc, int phy, int reg, int val) argument
418 cmd = BHND_PCIE_MDIODATA_ADDR(phy, reg) | (val & BHND_PCIE_MDIODATA_DATA_MASK);
430 int reg)
437 return (bhnd_pcie_mdio_read(sc, phy, reg));
457 cmd = BHND_PCIE_MDIODATA_ADDR(phy, reg);
472 int reg, int val)
478 return (bhnd_pcie_mdio_write(sc, phy, reg, val));
498 cmd = BHND_PCIE_MDIODATA_ADDR(phy, reg) |
429 bhnd_pcie_mdio_read_ext(struct bhnd_pci_softc *sc, int phy, int devaddr, int reg) argument
471 bhnd_pcie_mdio_write_ext(struct bhnd_pci_softc *sc, int phy, int devaddr, int reg, int val) argument
[all...]
H A Dbhnd_pci_hostb.c503 bus_size_t reg; local
507 reg = BHND_PCIE_SPROM_SHADOW + BHND_PCIE_SRSH_ASPM_OFFSET;
508 cfg = BHND_PCI_READ_2(sc, reg);
515 BHND_PCI_WRITE_2(sc, reg, cfg);
531 reg = BHND_PCIE_SPROM_SHADOW + BHND_PCIE_SRSH_CLKREQ_OFFSET_R5;
532 cfg = BHND_PCI_READ_2(sc, reg);
539 BHND_PCI_WRITE_2(sc, reg, cfg);
544 bus_size_t reg; local
548 reg = BHND_PCIE_SPROM_SHADOW + BHND_PCIE_SRSH_PCIE_MISC_CONFIG;
549 cfg = BHND_PCI_READ_2(sc, reg);
561 bus_size_t reg; local
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/freebsd-11-stable/sys/dev/iicbus/
H A Dlm75.c128 lm75_read(device_t dev, uint32_t addr, uint8_t reg, uint8_t *data, size_t len) argument
131 { addr, IIC_M_WR | IIC_M_NOSTOP, 1, &reg },
330 lm75_temp_read(struct lm75_softc *sc, uint8_t reg, int *temp) argument
336 if (lm75_read(sc->sc_dev, sc->sc_addr, reg, buf8, sizeof(buf8)) < 0)
372 lm75_temp_write(struct lm75_softc *sc, uint8_t reg, int temp) argument
386 buf8[0] = reg;
435 uint8_t reg; local
438 reg = (uint8_t)arg2;
441 if (lm75_temp_read(sc, reg, &temp) != 0)
448 if (lm75_temp_write(sc, reg, tem
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/freebsd-11-stable/usr.bin/script/
H A Dscript.c401 consume(FILE *fp, off_t len, char *buf, int reg) argument
405 if (reg) {
438 int reg; local
443 reg = S_ISREG(pst.st_mode);
445 for (nread = 0; !reg || nread < pst.st_size; nread += save_len) {
447 if (reg)
455 if (reg && stamp.scr_len >
470 (void)consume(fp, stamp.scr_len, buf, reg);
476 (void)consume(fp, stamp.scr_len, buf, reg);
480 (void)consume(fp, stamp.scr_len, buf, reg);
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/freebsd-11-stable/sys/arm64/arm64/
H A Dmp_machdep.c179 const uint32_t *reg; local
190 reg = cpu_get_cpuid(dev, &reg_size);
191 if (reg == NULL)
197 printf("%s%x", (i == 0) ? "" : " ", reg[i]);
430 cpu_init_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg) argument
466 target_cpu = reg[0];
469 target_cpu |= reg[1];
522 cpu_find_cpu0_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg) argument
527 mpidr_fdt = reg[0];
530 mpidr_fdt |= reg[
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/freebsd-11-stable/sys/dev/acpi_support/
H A Dacpi_panasonic.c307 int reg; local
310 reg = (power_profile_get_state() == POWER_PROFILE_PERFORMANCE) ?
318 *val = acpi_panasonic_sinf(h, reg);
328 int reg; local
331 reg = (power_profile_get_state() == POWER_PROFILE_PERFORMANCE) ?
339 *val = acpi_panasonic_sinf(h, reg);
349 int reg; local
352 reg = (power_profile_get_state() == POWER_PROFILE_PERFORMANCE) ?
362 acpi_panasonic_sset(h, reg, *val);
365 *val = acpi_panasonic_sinf(h, reg);
[all...]
/freebsd-11-stable/sys/arm/versatile/
H A Dpl050.c137 #define pl050_kmi_read_4(sc, reg) \
138 bus_read_4((sc)->sc_mem_res, (reg))
140 #define pl050_kmi_write_4(sc, reg, val) \
141 bus_write_4((sc)->sc_mem_res, (reg), (val))
236 uint32_t reg; local
243 reg = pl050_kmi_read_4(sc, KMIIR);
244 return (reg & KMIIR_RXINTR);
291 uint32_t reg, data; local
298 reg = pl050_kmi_read_4(sc, KMIIR);
299 if (reg
[all...]
/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Process/minidump/
H A DRegisterContextMinidump_ARM.cpp492 RegisterContextMinidump_ARM::GetRegisterInfoAtIndexStatic(size_t reg, argument
494 if (reg < k_num_reg_infos) {
496 if (reg == reg_r7)
499 if (reg == reg_r11)
502 return &g_reg_infos[reg];
508 RegisterContextMinidump_ARM::GetRegisterInfoAtIndex(size_t reg) { argument
509 return GetRegisterInfoAtIndexStatic(reg, m_apple);
522 const char *RegisterContextMinidump_ARM::GetRegisterName(unsigned reg) { argument
523 if (reg < k_num_reg_infos)
524 return g_reg_infos[reg]
[all...]
/freebsd-11-stable/cddl/contrib/opensolaris/lib/libdtrace/common/
H A Ddt_cg.c93 dt_cg_xsetx(dt_irlist_t *dlp, dt_ident_t *idp, uint_t lbl, int reg, uint64_t x) argument
97 dif_instr_t instr = DIF_INSTR_SETX((uint_t)intoff, reg);
112 dt_cg_setx(dt_irlist_t *dlp, int reg, uint64_t x) argument
114 dt_cg_xsetx(dlp, NULL, DT_LBL_NONE, reg, x);
410 int reg; local
424 reg = dt_regset_alloc(drp);
425 dt_cg_setx(dlp, reg, size);
426 instr = DIF_INSTR_COPYS(src->dn_reg, reg, dst->dn_reg);
428 dt_regset_free(drp, reg);
431 reg
557 int reg; local
646 int reg; local
1234 int reg, n; local
1410 int reg, treg; local
1760 int reg; local
1913 int reg; local
2167 int reg = dt_cg_xlate_expand(dnp, idp, local
[all...]
/freebsd-11-stable/sys/dev/sound/pci/
H A Dcmi.c116 struct resource *reg, *irq; member in struct:sc_info
182 int reg, int shift, u_int32_t mask, u_int32_t val)
186 r = cmi_rd(sc, reg, 4);
189 cmi_wr(sc, reg, r, 4);
193 cmi_clr4(struct sc_info *sc, int reg, u_int32_t mask) argument
197 r = cmi_rd(sc, reg, 4);
199 cmi_wr(sc, reg, r, 4);
203 cmi_set4(struct sc_info *sc, int reg, u_int32_t mask) argument
207 r = cmi_rd(sc, reg, 4);
209 cmi_wr(sc, reg,
181 cmi_partial_wr4(struct sc_info *sc, int reg, int shift, u_int32_t mask, u_int32_t val) argument
783 cmi_mread(struct mpu401 *arg, void *sc, int reg) argument
794 cmi_mwrite(struct mpu401 *arg, void *sc, int reg, unsigned char b) argument
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/freebsd-11-stable/sys/contrib/ncsw/Peripherals/BM/
H A Dbman_low.c97 #define bm_in(reg) __bm_in(&portal->addr, REG_##reg)
98 #define bm_out(reg, val) __bm_out(&portal->addr, REG_##reg, val)
127 #define bm_cl_touch_ro(reg) __bm_cl_touch_ro(&portal->addr, CL_##reg##_CENA)
128 #define bm_cl_touch_rw(reg) __bm_cl_touch_rw(&portal->addr, CL_##reg##_CENA)
129 #define bm_cl_in(reg) __bm_cl_in(&portal->addr, CL_##reg##_CEN
[all...]
/freebsd-11-stable/sys/sparc64/sparc64/
H A Dupa.c95 #define UPA_READ(sc, reg, off) \
96 bus_space_read_8((sc)->sc_bt[(reg)], (sc)->sc_bh[(reg)], (off))
97 #define UPA_WRITE(sc, reg, off, val) \
98 bus_space_write_8((sc)->sc_bt[(reg)], (sc)->sc_bh[(reg)], (off), (val))
543 struct upa_regs *reg; local
554 nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)&reg);
[all...]
/freebsd-11-stable/sys/dev/xl/
H A Dif_xlreg.h652 #define CSR_WRITE_4(sc, reg, val) \
653 bus_space_write_4(sc->xl_btag, sc->xl_bhandle, reg, val)
654 #define CSR_WRITE_2(sc, reg, val) \
655 bus_space_write_2(sc->xl_btag, sc->xl_bhandle, reg, val)
656 #define CSR_WRITE_1(sc, reg, val) \
657 bus_space_write_1(sc->xl_btag, sc->xl_bhandle, reg, val)
659 #define CSR_READ_4(sc, reg) \
660 bus_space_read_4(sc->xl_btag, sc->xl_bhandle, reg)
661 #define CSR_READ_2(sc, reg) \
662 bus_space_read_2(sc->xl_btag, sc->xl_bhandle, reg)
[all...]
/freebsd-11-stable/sys/x86/iommu/
H A Dintel_dmar.h388 dmar_read4(const struct dmar_unit *unit, int reg) argument
391 return (bus_read_4(unit->regs, reg));
395 dmar_read8(const struct dmar_unit *unit, int reg) argument
400 low = bus_read_4(unit->regs, reg);
401 high = bus_read_4(unit->regs, reg + 4);
404 return (bus_read_8(unit->regs, reg));
409 dmar_write4(const struct dmar_unit *unit, int reg, uint32_t val) argument
412 KASSERT(reg != DMAR_GCMD_REG || (val & DMAR_GCMD_TE) ==
416 bus_write_4(unit->regs, reg, val);
420 dmar_write8(const struct dmar_unit *unit, int reg, uint64_ argument
[all...]
/freebsd-11-stable/sys/dev/drm2/radeon/
H A Dr600_cs.c819 pkt->reg = CP_PACKET0_GET_REG(header);
913 * PACKET3 - WAIT_REG_MEM poll vline status reg
929 uint32_t header, h_idx, reg, wait_reg_mem_info; local
947 /* bit 4 is reg (0) or mem (1) */
958 DRM_ERROR("vline WAIT_REG_MEM bad reg\n");
978 reg = CP_PACKET0_GET_REG(header);
999 switch (reg) {
1017 unsigned idx, unsigned reg)
1021 switch (reg) {
1026 idx, reg);
1015 r600_packet0_check(struct radeon_cs_parser *p, struct radeon_cs_packet *pkt, unsigned idx, unsigned reg) argument
1041 unsigned reg, i; local
1066 r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) argument
1693 r600_is_safe_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) argument
1717 unsigned start_reg, end_reg, reg; local
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegAllocGreedy.cpp256 return ExtraRegInfo[VirtReg.reg].Stage;
261 ExtraRegInfo[VirtReg.reg].Stage = Stage;
685 // The queue holds (size, reg) pairs.
687 const unsigned Reg = LI->reg;
778 if (unsigned Hint = MRI->getSimpleHint(VirtReg.reg))
810 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix);
888 unsigned Cascade = ExtraRegInfo[VirtReg.reg].Cascade;
902 assert(Register::isVirtualRegister(Intf->reg) &&
908 if (FixedRegisters.count(Intf->reg))
922 RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(VirtReg.reg)) <
[all...]
/freebsd-11-stable/contrib/gdb/gdb/
H A Dmips-tdep.c314 "xfer $%d, reg offset %d, buf offset %d, length %d, ",
891 int reg; local
893 if ((inst & 0xffe00000) == 0xafa00000 /* sw reg,n($sp) */
894 || (inst & 0xffe00000) == 0xafc00000 /* sw reg,n($r30) */
895 || (inst & 0xffe00000) == 0xffa00000) /* sd reg,n($sp) */
902 reg = (inst & 0x001f0000) >> 16;
903 *gen_mask |= (1 << reg);
910 reg = ((inst & 0x001f0000) >> 16);
911 *float_mask |= (1 << reg);
923 if ((inst & 0xf800) == 0xd000) /* sw reg,
925 int reg = mips16_to_32_reg[(inst & 0x700) >> 8]; local
930 int reg = mips16_to_32_reg[(inst & 0xe0) >> 5]; local
1120 unsigned long reg; local
1128 unsigned long reg; local
1374 int reg; local
1386 int reg; local
1398 int reg; local
1417 int reg; local
1593 int reg; local
1998 int reg, offset; local
2141 int reg; local
2593 int reg; member in struct:return_value_word
[all...]
H A Di386-tdep.c158 i386_register_name (int reg) argument
160 if (i386_mmx_regnum_p (current_gdbarch, reg))
161 return i386_mmx_names[reg - I387_MM0_REGNUM];
163 if (reg >= 0 && reg < i386_num_register_names)
164 return i386_register_names[reg];
173 i386_stab_reg_to_regnum (int reg) argument
176 if (reg >= 0 && reg <= 7)
179 return reg;
205 i386_dwarf_reg_to_regnum(int reg) argument
[all...]

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<<21222324252627282930>>