Searched refs:MRI (Results 226 - 250 of 513) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MCA/
H A DInstrBuilder.h41 const MCRegisterInfo &MRI; member in class:llvm::mca::InstrBuilder
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DCallLowering.h113 ValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, argument
115 : MIRBuilder(MIRBuilder), MRI(MRI), AssignFn(AssignFn) {}
164 MachineRegisterInfo &MRI; member in struct:llvm::CallLowering::ValueHandler
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsAsmBackend.h35 MipsAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CallLowering.h64 const DataLayout &DL, MachineRegisterInfo &MRI,
H A DAArch64ConditionalCompares.cpp142 MachineRegisterInfo *MRI; member in class:__anon2024::SSACCmpConv
197 MRI = &MF.getRegInfo();
267 return MRI->use_nodbg_empty(DstReg);
635 MRI->createVirtualRegister(TII->getRegClass(MCID, 0, TRI, *MF));
643 MRI->constrainRegClass(HeadCond[2].getReg(),
690 MRI->constrainRegClass(CmpMI->getOperand(FirstOp).getReg(),
693 MRI->constrainRegClass(CmpMI->getOperand(FirstOp + 1).getReg(),
768 MachineRegisterInfo *MRI; member in class:__anon2025::AArch64ConditionalCompares
937 MRI = &MF.getRegInfo();
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.h37 const DataLayout &DL, MachineRegisterInfo &MRI,
H A DR600MachineScheduler.cpp34 MRI = &DAG->MRI;
215 return MRI->getRegClass(Reg) == RC;
373 MRI->constrainRegClass(DestReg, &R600::R600_TReg32_XRegClass);
376 MRI->constrainRegClass(DestReg, &R600::R600_TReg32_YRegClass);
379 MRI->constrainRegClass(DestReg, &R600::R600_TReg32_ZRegClass);
382 MRI->constrainRegClass(DestReg, &R600::R600_TReg32_WRegClass);
H A DSIPeepholeSDWA.cpp73 MachineRegisterInfo *MRI; member in class:__anon2129::SIPeepholeSDWA
291 const MachineRegisterInfo *MRI) {
296 for (MachineOperand &UseMO : MRI->use_nodbg_operands(Reg->getReg())) {
313 const MachineRegisterInfo *MRI) {
317 MachineInstr *DefInstr = MRI->getUniqueVRegDef(Reg->getReg());
442 MachineRegisterInfo *MRI = getMRI(); local
445 MachineOperand *PotentialMO = findSingleRegDef(getReplacedOperand(), MRI);
450 for (MachineInstr &UseInst : MRI->use_nodbg_instructions(PotentialMO->getReg())) {
526 for (const MachineOperand &Def : MRI->def_operands(Op.getReg())) {
730 MachineOperand *Op1Def = findSingleRegDef(Op1, MRI);
290 findSingleRegUse(const MachineOperand *Reg, const MachineRegisterInfo *MRI) argument
312 findSingleRegDef(const MachineOperand *Reg, const MachineRegisterInfo *MRI) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizer.cpp147 MachineRegisterInfo &MRI = MF.getRegInfo(); local
185 LegalizationArtifactCombiner ArtCombiner(MIRBuilder, MRI, LI);
199 if (isTriviallyDead(MI, MRI)) {
245 if (isTriviallyDead(MI, MRI)) {
H A DCSEInfo.cpp85 this->MRI = &MF.getRegInfo();
256 MRI = nullptr;
344 LLT Ty = MRI.getType(Reg);
347 auto *RB = MRI.getRegBankOrNull(Reg);
350 auto *RC = MRI.getRegClassOrNull(Reg);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Object/
H A DModuleSymbolTable.cpp82 std::unique_ptr<MCRegisterInfo> MRI(T->createMCRegInfo(TT.str()));
83 if (!MRI)
87 std::unique_ptr<MCAsmInfo> MAI(T->createMCAsmInfo(*MRI, TT.str(), MCOptions));
101 MCContext MCCtx(MAI.get(), MRI.get(), &MOFI);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DUnreachableBlockElim.cpp184 MachineRegisterInfo &MRI = F.getRegInfo(); local
187 MRI.constrainRegClass(InputReg, MRI.getRegClass(OutputReg)) &&
189 MRI.replaceRegWith(OutputReg, InputReg);
H A DInlineSpiller.cpp93 MachineRegisterInfo &MRI; member in class:__anon1729::HoistSpillHelper
146 MRI(mf.getRegInfo()), TII(*mf.getSubtarget().getInstrInfo()),
166 MachineRegisterInfo &MRI; member in class:__anon1729::InlineSpiller
202 MRI(mf.getRegInfo()), TII(*mf.getSubtarget().getInstrInfo()),
291 RI = MRI.reg_instr_nodbg_begin(SnipLI.reg),
292 E = MRI.reg_instr_nodbg_end(); RI != E; ) {
331 RI = MRI.reg_instr_begin(Reg), E = MRI.reg_instr_end(); RI != E; ) {
413 MRI.getRegClass(SrcReg), &TRI);
448 UI = MRI
[all...]
H A DMachineInstr.cpp90 const MachineRegisterInfo *&MRI,
96 MRI = &MF->getRegInfo();
161 void MachineInstr::RemoveRegOperandsFromUseLists(MachineRegisterInfo &MRI) { argument
164 MRI.removeRegOperandFromUseList(&MO);
170 void MachineInstr::AddRegOperandsToUseLists(MachineRegisterInfo &MRI) { argument
173 MRI.addRegOperandToUseList(&MO);
185 /// ranges. If MRI is non-null also update use-def chains.
187 unsigned NumOps, MachineRegisterInfo *MRI) {
188 if (MRI)
189 return MRI
88 tryToGetTargetInfo(const MachineInstr &MI, const TargetRegisterInfo *&TRI, const MachineRegisterInfo *&MRI, const TargetIntrinsicInfo *&IntrinsicInfo, const TargetInstrInfo *&TII) argument
186 moveOperands(MachineOperand *Dst, MachineOperand *Src, unsigned NumOps, MachineRegisterInfo *MRI) argument
238 MachineRegisterInfo *MRI = getRegInfo(); local
681 MachineRegisterInfo &MRI = MF->getRegInfo(); local
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H A DTwoAddressInstructionPass.cpp97 MachineRegisterInfo *MRI; member in class:__anon1833::TwoAddressInstructionPass
265 for (MachineOperand &UseMO : MRI->use_nodbg_operands(SavedReg)) {
344 const MachineRegisterInfo *MRI) {
346 for (MachineInstr &DefMI : MRI->def_instructions(Reg)) {
368 MachineInstr *Def = getSingleDef(TmpReg, MBB, MRI);
388 for (MachineOperand &MO : MRI->reg_operands(Reg)) {
470 const MachineRegisterInfo *MRI,
478 (allowFalsePositives || MRI->hasOneUse(Reg)))
484 MachineRegisterInfo::def_iterator Begin = MRI->def_begin(Reg);
487 if (std::next(Begin) != MRI
343 getSingleDef(unsigned Reg, MachineBasicBlock *BB, const MachineRegisterInfo *MRI) argument
469 isKilled(MachineInstr &MI, unsigned Reg, const MachineRegisterInfo *MRI, const TargetInstrInfo *TII, LiveIntervals *LIS, bool allowFalsePositives) argument
519 findOnlyInterestingUse(unsigned Reg, MachineBasicBlock *MBB, MachineRegisterInfo *MRI, const TargetInstrInfo *TII, bool &IsCopy, unsigned &DstReg, bool &IsDstPhys) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc/
H A DWebAssemblyInstPrinter.h37 const MCRegisterInfo &MRI);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/MCTargetDesc/
H A DNVPTXInstPrinter.h25 const MCRegisterInfo &MRI);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCTargetDesc.cpp79 static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI, argument
94 MCCFIInstruction::createDefCfa(nullptr, MRI.getDwarfRegNum(Reg, true), 0);
291 const MCRegisterInfo &MRI) {
292 return new PPCInstPrinter(MAI, MII, MRI, T);
287 createPPCMCInstPrinter(const Triple &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI) argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterBankInfo.h54 const MachineRegisterInfo &MRI, const bool isFP,
H A DX86FlagsCopyLowering.cpp90 MachineRegisterInfo *MRI = nullptr; member in class:__anon2496::X86FlagsCopyLoweringPass
368 MRI = &MF.getRegInfo();
396 MachineInstr &CopyDefI = *MRI->getVRegDef(VOp.getReg());
423 if (MRI->use_empty(CopyDefI.getOperand(0).getReg()))
774 Register Reg = MRI->createVirtualRegister(PromoteRC);
848 Register TmpReg = MRI->createVirtualRegister(PromoteRC);
957 MRI->replaceRegWith(MI.getOperand(0).getReg(),
980 MRI->replaceRegWith(SetBI.getOperand(0).getReg(), Reg);
985 auto &SetBRC = *MRI->getRegClass(SetBI.getOperand(0).getReg());
992 auto &OrigRC = *MRI
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H A DX86CallFrameOptimization.cpp121 MachineRegisterInfo *MRI = nullptr; member in class:__anon2479::X86CallFrameOptimization
240 MRI = &MF.getRegInfo();
542 Register UndefReg = MRI->createVirtualRegister(&X86::GR64RegClass);
543 Reg = MRI->createVirtualRegister(&X86::GR64RegClass);
590 if (Context.SPCopy && MRI->use_empty(Context.SPCopy->getOperand(0).getReg()))
615 if (!MRI->hasOneNonDBGUse(Reg))
618 MachineInstr &DefMI = *MRI->getVRegDef(Reg);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLegalizerInfo.cpp361 MachineRegisterInfo &MRI,
375 auto Size = MRI.getType(OriginalResult).getSizeInBits();
387 Register RetRegs[] = {MRI.createGenericVirtualRegister(LLT::scalar(32)),
397 assert(MRI.getType(MI.getOperand(2).getReg()) ==
398 MRI.getType(MI.getOperand(3).getReg()) &&
400 auto OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits();
423 auto LibcallResult = MRI.createGenericVirtualRegister(LLT::scalar(32));
435 : MRI.createGenericVirtualRegister(MRI.getType(OriginalResult));
448 auto Zero = MRI
360 legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, GISelChangeObserver &Observer) const argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp76 VRegs.push_back(MRI.createGenericVirtualRegister(LLT{RegisterVT}));
92 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) argument
93 : MipsHandler(MIRBuilder, MRI) {}
122 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, argument
124 : IncomingValueHandler(MIRBuilder, MRI), MIB(MIB) {}
195 Register AddrReg = MRI.createGenericVirtualRegister(LLT::pointer(0, 32));
206 Register LoadReg = MRI.createGenericVirtualRegister(LLT::scalar(32));
227 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, argument
229 : MipsHandler(MIRBuilder, MRI), MIB(MIB) {}
294 Register SPReg = MRI
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonGenInsert.cpp572 MachineRegisterInfo *MRI;
686 const TargetRegisterClass *DstRC = MRI->getRegClass(DstR);
687 const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcR);
688 const TargetRegisterClass *InsRC = MRI->getRegClass(InsR);
1025 const MachineInstr *DefI = MRI->getVRegDef(R);
1077 MachineInstr *DefVR = MRI->getVRegDef(VR);
1158 const MachineInstr *DefV = MRI->getVRegDef(VR);
1162 const MachineInstr *DefS = MRI->getVRegDef(SR);
1163 const MachineInstr *DefI = MRI->getVRegDef(IR);
1311 use_iterator E = MRI
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/freebsd-11-stable/contrib/llvm-project/clang/tools/driver/
H A Dcc1as_main.cpp354 std::unique_ptr<MCRegisterInfo> MRI(TheTarget->createMCRegInfo(Opts.Triple));
355 assert(MRI && "Unable to create target register info!");
359 TheTarget->createMCAsmInfo(*MRI, Opts.Triple, MCOptions));
383 MCContext Ctx(MAI.get(), MRI.get(), MOFI.get(), &SrcMgr, &MCOptions);
447 llvm::Triple(Opts.Triple), Opts.OutputAsmVariant, *MAI, *MCII, *MRI);
451 CE.reset(TheTarget->createMCCodeEmitter(*MCII, *MRI, Ctx));
453 TheTarget->createMCAsmBackend(*STI, *MRI, MCOptions));
471 TheTarget->createMCCodeEmitter(*MCII, *MRI, Ctx));
473 TheTarget->createMCAsmBackend(*STI, *MRI, MCOptions));

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