/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | ValueTypes.h | 47 i64 = 5, // This is a 64 bit integer value enumerator in enum:llvm::MVT::SimpleValueType 87 v1i64 = 36, // 1 x i64 88 v2i64 = 37, // 2 x i64 89 v4i64 = 38, // 4 x i64 90 v8i64 = 39, // 8 x i64 91 v16i64 = 40, // 16 x i64 289 case v16i64: return i64; 376 case i64 : 472 return MVT::i64; 513 case MVT::i64 [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 33 case MVT::i64: 55 addRegisterClass(MVT::i64, &SystemZ::GR64BitRegClass); 159 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); 163 setOperationAction(ISD::CTLZ, MVT::i64, Legal); 166 setOperationAction(ISD::OR, MVT::i64, Custom); 172 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); 174 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Custom); 177 setOperationAction(ISD::SRL_PARTS, MVT::i64, Expand); 178 setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand); 179 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expan [all...] |
H A D | SystemZISelDAGToDAG.cpp | 474 // Truncate values from i64 to i32, for shifts. 475 assert(VT == MVT::i32 && Base.getValueType() == MVT::i64 && 553 if (Node->getValueType(0) == MVT::i64) 565 if (Node->getValueType(0) == MVT::i64) {
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/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 367 if (MemType == MVT::i64 && isShiftedInt<11,3>(Offset)) { 408 if (LoadedVT == MVT::i64) Opcode = Hexagon::LDrid_indexed; 454 SDNode *Result_2 = CurDAG->getMachineNode(Hexagon::SXTW, dl, MVT::i64, 476 MVT::i64, SDValue(Result_1, 0)); 522 MVT::i64, MVT::Other, 549 MVT::i64, MVT::Other, 589 if (LoadedVT == MVT::i64) { 612 // For zero ext i64 loads, we need to add combine instructions. 613 if (LD->getValueType(0) == MVT::i64 && 617 if (LD->getValueType(0) == MVT::i64 [all...] |
/freebsd-10.0-release/sys/cddl/contrib/opensolaris/uts/common/os/ |
H A D | fm.c | 232 uint64_t i64; local 287 (void) nvpair_value_int64(nvp, (void *)&i64); 289 (u_longlong_t)i64); 293 (void) nvpair_value_uint64(nvp, &i64); 295 (u_longlong_t)i64); 299 (void) nvpair_value_hrtime(nvp, (void *)&i64); 301 (u_longlong_t)i64);
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/freebsd-10.0-release/sys/amd64/amd64/ |
H A D | bpf_jit_machdep.h | 139 /* movq i64,r64 */ 140 #define MOViq(i64, r64) do { \ 143 emitm(&stream, i64, 4); \ 144 emitm(&stream, (i64 >> 32), 4); \
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/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 263 (VT == MVT::f64) ? MVT::i64 : MVT::i32); 667 if (TLI.isTypeLegal(MVT::i64)) { 669 zextOrTrunc(64), MVT::i64); 1989 case MVT::i64: LC = Call_I64; break; 2004 case MVT::i64: LC= isSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64; break; 2051 case MVT::i64: LC= isSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64; break; 2280 assert(!isSigned && "Legalize cannot Expand SINT_TO_FP for i64 yet"); 2283 // Implementation of unsigned i64 to f64 following the algorithm in 2288 if (Op0.getValueType() == MVT::i64 && DestVT == MVT::f64) { 2290 DAG.getConstant(UINT64_C(0x4330000000000000), MVT::i64); [all...] |
H A D | LegalizeIntegerTypes.cpp | 16 // implementing i64 arithmetic in two i32 registers (often needed on 32-bit 1182 case MVT::i64: LC = RTLIB::SYNC_LOCK_TEST_AND_SET_8; break; 1191 case MVT::i64: LC = RTLIB::SYNC_VAL_COMPARE_AND_SWAP_8; break; 1200 case MVT::i64: LC = RTLIB::SYNC_FETCH_AND_ADD_8; break; 1209 case MVT::i64: LC = RTLIB::SYNC_FETCH_AND_SUB_8; break; 1218 case MVT::i64: LC = RTLIB::SYNC_FETCH_AND_AND_8; break; 1227 case MVT::i64: LC = RTLIB::SYNC_FETCH_AND_OR_8; break; 1236 case MVT::i64: LC = RTLIB::SYNC_FETCH_AND_XOR_8; break; 1245 case MVT::i64: LC = RTLIB::SYNC_FETCH_AND_NAND_8; break; 1633 // For example, extension of an i48 to an i64 [all...] |
/freebsd-10.0-release/contrib/llvm/include/llvm/Support/ |
H A D | DataTypes.h.in | 152 # define INT64_C(C) C##i64
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/freebsd-10.0-release/contrib/llvm/lib/Target/R600/ |
H A D | AMDILISelDAGToDAG.cpp | 142 R1 = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i64); 143 R2 = CurDAG->getTargetConstant(0, MVT::i64); 146 R2 = CurDAG->getTargetConstant(0, MVT::i64); 153 R2 = CurDAG->getTargetConstant(0, MVT::i64); 205 } else if (N->getValueType(0) == MVT::i64) { 249 assert(N->getValueType(0) != MVT::i64);
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H A D | SIISelLowering.cpp | 36 addRegisterClass(MVT::i64, &AMDGPU::SReg_64RegClass); 67 setOperationAction(ISD::ADD, MVT::i64, Legal); 76 setOperationAction(ISD::STORE, MVT::i64, Custom); 170 if (VT == MVT::i64) { 355 DAG.getConstant(0, MVT::i64), 356 DAG.getConstant(RSRC_DATA_FORMAT, MVT::i64));
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/freebsd-10.0-release/contrib/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 89 if (LocVT == MVT::i64 && Offset < 6*8) 134 LocVT = MVT::i64; 282 OutVal = DAG.getNode(ISD::SHL, DL, MVT::i64, OutVal, 288 SDValue NV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, OutVals[i+1]); 289 OutVal = DAG.getNode(ISD::OR, DL, MVT::i64, OutVal, NV); 388 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal); 443 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal); 553 // All integer register arguments are promoted by the caller to i64. 628 SDValue VArg = DAG.getCopyFromReg(Chain, DL, VReg, MVT::i64); 965 // Full register, just bitconvert into i64 [all...] |
H A D | SparcISelDAGToDAG.cpp | 153 if (N->getValueType(0) == MVT::i64)
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/freebsd-10.0-release/contrib/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 172 // under the assumption that i64 won't be used if the target doesn't 202 case MVT::i64: 258 case MVT::i64: Opc = X86::MOV64mr; break; // Must be in x86-64 mode. 288 // Handle 'null' like i32/i64 0. 302 case MVT::i64: 553 if (TLI.getPointerTy() == MVT::i64) { 870 case MVT::i64: return X86::CMP64rr; 888 case MVT::i64: 902 // Handle 'null' like i32/i64 0. 1129 case MVT::i64 [all...] |
H A D | X86ISelLowering.cpp | 189 static const MVT IntVTs[] = { MVT::i8, MVT::i16, MVT::i32, MVT::i64 }; 253 addRegisterClass(MVT::i64, &X86::GR64RegClass); 258 setTruncStoreAction(MVT::i64, MVT::i32, Expand); 259 setTruncStoreAction(MVT::i64, MVT::i16, Expand); 260 setTruncStoreAction(MVT::i64, MVT::i8 , Expand); 281 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom); 285 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom); 313 setOperationAction(ISD::FP_TO_SINT , MVT::i64 , Custom); 314 setOperationAction(ISD::SINT_TO_FP , MVT::i64 , Custom); 337 setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Expan [all...] |
H A D | X86ISelDAGToDAG.cpp | 684 AM.setBaseReg(CurDAG->getRegister(X86::RIP, MVT::i64)); 749 AM.Base_Reg = CurDAG->getRegister(X86::RIP, MVT::i64); 1463 AM.IndexReg = CurDAG->getRegister(0, MVT::i64); 1754 case MVT::i64: 1874 if (LdVT != MVT::i64 && LdVT != MVT::i32 && LdVT != MVT::i16 && 1936 if (LdVT == MVT::i64) return X86::DEC64m; 1942 if (LdVT == MVT::i64) return X86::INC64m; 2103 if (NVT != MVT::i32 && NVT != MVT::i64) 2149 case MVT::i64: 2178 case MVT::i64 [all...] |
H A D | X86AsmPrinter.cpp | 246 MVT::i64 : ((strcmp(Modifier+6, "32") == 0) ? MVT::i32 : 397 Reg = getX86SubSuperRegister(Reg, MVT::i64);
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/freebsd-10.0-release/crypto/openssl/crypto/modes/asm/ |
H A D | ghash-armv4.pl | 382 vshl.i64 `&Dlo("$R")`,#48 398 vshl.i64 `&Dlo("$R")`,#48 404 vshl.i64 $Z,#1
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/freebsd-10.0-release/contrib/llvm/lib/IR/ |
H A D | ValueTypes.cpp | 119 case MVT::i64: return "i64"; 185 case MVT::i64: return Type::getInt64Ty(Context);
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/freebsd-10.0-release/crypto/openssh/ |
H A D | auth2-jpake.c | 187 pw_encode64(u_int i64) argument 191 return e64[i64 % 64];
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/freebsd-10.0-release/contrib/ntp/ntpd/ |
H A D | ntp_timer.c | 237 DueTime.QuadPart = Period * 10000i64;
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/freebsd-10.0-release/contrib/sqlite3/ |
H A D | sqlite3.c | 554 #define IS_BIG_INT(X) (((X)&~(i64)0xffffffff)!=0) 8211 typedef sqlite_int64 i64; /* 8-byte signed integer */ typedef 8264 #define LARGEST_INT64 (0xffffffff|(((i64)0x7fffffff)<<32)) 8265 #define SMALLEST_INT64 (((i64)-1) - LARGEST_INT64) 8656 i64 intKey, 8662 SQLITE_PRIVATE int sqlite3BtreeInsert(BtCursor*, const void *pKey, i64 nKey, 8670 SQLITE_PRIVATE int sqlite3BtreeKeySize(BtCursor*, i64 *pSize); 8693 SQLITE_PRIVATE int sqlite3BtreeCount(BtCursor *, i64 *); 8803 i64 *pI64; /* Used when p4type is P4_INT64 */ 9296 SQLITE_PRIVATE i64 sqlite3PagerJournalSizeLimi 119160 typedef sqlite3_int64 i64; /* 8-byte signed integer */ typedef 136438 typedef sqlite3_int64 i64; typedef [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 96 addRegisterClass(MVT::i64, &NVPTX::Int64RegsRegClass); 108 setOperationAction(ISD::BR_CC, MVT::i64, Expand); 109 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i64, Expand); 116 setOperationAction(ISD::ROTL, MVT::i64, Legal); 117 setOperationAction(ISD::ROTR, MVT::i64, Legal); 119 setOperationAction(ISD::ROTL, MVT::i64, Expand); 120 setOperationAction(ISD::ROTR, MVT::i64, Expand); 136 setOperationAction(ISD::BSWAP, MVT::i64, Expand); 144 setOperationAction(ISD::GlobalAddress, MVT::i64, Custom); 161 setTruncStoreAction(MVT::i64, MV [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 100 setOperationAction(ISD::ADD, MVT::i64, Custom); 101 setOperationAction(ISD::SUB, MVT::i64, Custom); 125 // Conversion of i64 -> double produces constantpool nodes 641 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); 649 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); 664 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); 670 assert(N->getValueType(0) == MVT::i64 && 704 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); 1438 if (N->getValueType(0) == MVT::i64 && 1456 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, L [all...] |
/freebsd-10.0-release/crypto/heimdal/lib/sqlite/ |
H A D | sqlite3.c | 536 #define IS_BIG_INT(X) (((X)&~(i64)0xffffffff)!=0) 7704 typedef sqlite_int64 i64; /* 8-byte signed integer */ typedef 7745 #define LARGEST_INT64 (0xffffffff|(((i64)0x7fffffff)<<32)) 7746 #define SMALLEST_INT64 (((i64)-1) - LARGEST_INT64) 8072 i64 intKey, 8078 SQLITE_PRIVATE int sqlite3BtreeInsert(BtCursor*, const void *pKey, i64 nKey, 8086 SQLITE_PRIVATE int sqlite3BtreeKeySize(BtCursor*, i64 *pSize); 8109 SQLITE_PRIVATE int sqlite3BtreeCount(BtCursor *, i64 *); 8219 i64 *pI64; /* Used when p4type is P4_INT64 */ 8704 SQLITE_PRIVATE i64 sqlite3PagerJournalSizeLimi 127140 typedef sqlite3_int64 i64; typedef [all...] |