Lines Matching refs:i64
16 // implementing i64 arithmetic in two i32 registers (often needed on 32-bit
1182 case MVT::i64: LC = RTLIB::SYNC_LOCK_TEST_AND_SET_8; break;
1191 case MVT::i64: LC = RTLIB::SYNC_VAL_COMPARE_AND_SWAP_8; break;
1200 case MVT::i64: LC = RTLIB::SYNC_FETCH_AND_ADD_8; break;
1209 case MVT::i64: LC = RTLIB::SYNC_FETCH_AND_SUB_8; break;
1218 case MVT::i64: LC = RTLIB::SYNC_FETCH_AND_AND_8; break;
1227 case MVT::i64: LC = RTLIB::SYNC_FETCH_AND_OR_8; break;
1236 case MVT::i64: LC = RTLIB::SYNC_FETCH_AND_XOR_8; break;
1245 case MVT::i64: LC = RTLIB::SYNC_FETCH_AND_NAND_8; break;
1633 // For example, extension of an i48 to an i64. The operand type necessarily
1980 else if (VT == MVT::i64)
2043 else if (VT == MVT::i64)
2116 else if (VT == MVT::i64)
2126 else if (VT == MVT::i64)
2137 else if (VT == MVT::i64)
2166 // For example, extension of an i48 to an i64. The operand type necessarily
2196 // things like sextinreg V:i64 from i8.
2201 // For example, extension of an i48 to an i64. Leave the low part alone,
2221 else if (VT == MVT::i64)
2301 else if (VT == MVT::i64)
2361 else if (VT == MVT::i64)
2381 else if (VT == MVT::i64)
2401 // For example, extension of an i48 to an i64. The operand type necessarily
2798 else if (SrcVT == MVT::i64)