Searched hist:970 (Results 51 - 75 of 377) sorted by relevance
/linux-master/drivers/s390/cio/ | ||
H A D | vfio_ccw_trace.h | diff 970ebeb8 Wed Oct 16 08:20:38 MDT 2019 Eric Farman <farman@linux.ibm.com> vfio-ccw: Trace the FSM jumptable It would be nice if we could track the sequence of events within vfio-ccw, based on the state of the device/FSM and our calling sequence within it. So let's add a simple trace here so we can watch the states change as things go, and allow it to be folded into the rest of the other cio traces. Signed-off-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20191016142040.14132-3-farman@linux.ibm.com> Acked-by: Halil Pasic <pasic@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com> |
/linux-master/tools/testing/selftests/powerpc/pmu/ebb/ | ||
H A D | ebb.c | diff 39fcfb91 Sun Oct 18 04:23:53 MDT 2015 Denis Kirjanov <kda@linux-powerpc.org> selftests/powerpc: Run EBB tests only on POWER8 EBB (Event Based Branches) are currently only available on POWER8, so we should skip them on other CPUs. I've found that at least one test loops forever on 970MP (cycles_with_freeze_test). Signed-off-by: Denis Kirjanov <kda@linux-powerpc.org> [mpe: Minor change log editing, add skip to cpu_event_vs_ebb_test] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> |
/linux-master/drivers/net/ethernet/aquantia/atlantic/ | ||
H A D | aq_vec.h | 970a2e98 Mon Jan 23 23:09:14 MST 2017 David VomLehn <vomlehn@texas.net> net: ethernet: aquantia: Vector operations Add functions to manululate the vector of receive and transmit rings. Signed-off-by: Alexander Loktionov <Alexander.Loktionov@aquantia.com> Signed-off-by: Dmitrii Tarakanov <Dmitrii.Tarakanov@aquantia.com> Signed-off-by: Pavel.Belous <Pavel.Belous@aquantia.com> Signed-off-by: Dmitry Bezrukov <Dmitry.Bezrukov@aquantia.com> Signed-off-by: David M. VomLehn <vomlehn@texas.net> Signed-off-by: David S. Miller <davem@davemloft.net> |
H A D | aq_vec.c | diff 31aefe14 Wed Sep 25 04:54:30 MDT 2019 Dan Carpenter <dan.carpenter@oracle.com> net: aquantia: Fix aq_vec_isr_legacy() return value The irqreturn_t type is an enum or an unsigned int in GCC. That creates to problems because it can't detect if the self->aq_hw_ops->hw_irq_read() call fails and at the end the function always returns IRQ_HANDLED. drivers/net/ethernet/aquantia/atlantic/aq_vec.c:316 aq_vec_isr_legacy() warn: unsigned 'err' is never less than zero. drivers/net/ethernet/aquantia/atlantic/aq_vec.c:329 aq_vec_isr_legacy() warn: always true condition '(err >= 0) => (0-u32max >= 0)' Fixes: 970a2e9864b0 ("net: ethernet: aquantia: Vector operations") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net> diff be6cef69 Thu Aug 29 18:08:38 MDT 2019 Dmitry Bogdanov <dmitry.bogdanov@aquantia.com> net: aquantia: fix out of memory condition on rx side On embedded environments with hard memory limits it is a normal although rare case when skb can't be allocated on rx part under high traffic. In such OOM cases napi_complete_done() was not called. So the napi object became in an invalid state like it is "scheduled". Kernel do not re-schedules the poll of that napi object. Consequently, kernel can not remove that object the system hangs on `ifconfig down` waiting for a poll. We are fixing this by gracefully closing napi poll routine with correct invocation of napi_complete_done. This was reproduced with artificially failing the allocation of skb to simulate an "out of memory" error case and check that traffic does not get stuck. Fixes: 970a2e9864b0 ("net: ethernet: aquantia: Vector operations") Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: Dmitry Bogdanov <dmitry.bogdanov@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net> 970a2e98 Mon Jan 23 23:09:14 MST 2017 David VomLehn <vomlehn@texas.net> net: ethernet: aquantia: Vector operations Add functions to manululate the vector of receive and transmit rings. Signed-off-by: Alexander Loktionov <Alexander.Loktionov@aquantia.com> Signed-off-by: Dmitrii Tarakanov <Dmitrii.Tarakanov@aquantia.com> Signed-off-by: Pavel.Belous <Pavel.Belous@aquantia.com> Signed-off-by: Dmitry Bezrukov <Dmitry.Bezrukov@aquantia.com> Signed-off-by: David M. VomLehn <vomlehn@texas.net> Signed-off-by: David S. Miller <davem@davemloft.net> |
/linux-master/drivers/spi/ | ||
H A D | spi-loopback-test.c | diff 055fe5f4 Fri Jul 17 07:54:11 MDT 2020 Lee Jones <lee.jones@linaro.org> spi: spi-loopback-test: Fix formatting issues in function header blocks Kerneldoc function parameter descriptions must be in '@.*: ' format. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'spi' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'test' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'tx' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'rx' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'spi' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'test' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'tx' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'rx' not described in 'spi_test_run_test' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Mark Brown <broonie@kernel.org> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: linux-spi@vger.kernel.org Link: https://lore.kernel.org/r/20200717135424.2442271-2-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org> diff 055fe5f4 Fri Jul 17 07:54:11 MDT 2020 Lee Jones <lee.jones@linaro.org> spi: spi-loopback-test: Fix formatting issues in function header blocks Kerneldoc function parameter descriptions must be in '@.*: ' format. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'spi' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'test' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'tx' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'rx' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'spi' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'test' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'tx' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'rx' not described in 'spi_test_run_test' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Mark Brown <broonie@kernel.org> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: linux-spi@vger.kernel.org Link: https://lore.kernel.org/r/20200717135424.2442271-2-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org> diff 055fe5f4 Fri Jul 17 07:54:11 MDT 2020 Lee Jones <lee.jones@linaro.org> spi: spi-loopback-test: Fix formatting issues in function header blocks Kerneldoc function parameter descriptions must be in '@.*: ' format. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'spi' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'test' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'tx' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'rx' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'spi' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'test' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'tx' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'rx' not described in 'spi_test_run_test' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Mark Brown <broonie@kernel.org> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: linux-spi@vger.kernel.org Link: https://lore.kernel.org/r/20200717135424.2442271-2-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org> diff 055fe5f4 Fri Jul 17 07:54:11 MDT 2020 Lee Jones <lee.jones@linaro.org> spi: spi-loopback-test: Fix formatting issues in function header blocks Kerneldoc function parameter descriptions must be in '@.*: ' format. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'spi' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'test' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'tx' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'rx' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'spi' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'test' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'tx' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'rx' not described in 'spi_test_run_test' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Mark Brown <broonie@kernel.org> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: linux-spi@vger.kernel.org Link: https://lore.kernel.org/r/20200717135424.2442271-2-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org> |
/linux-master/drivers/staging/greybus/ | ||
H A D | arche_platform.h | diff 970dc85b Sun Jun 05 07:03:26 MDT 2016 Bryan O'Donoghue <bryan.odonoghue@linaro.org> greybus: timesync: Add timesync core driver This patch adds the core timesync functionality. 0. arche-platform.c/arche-apb-ctrl.c Modifies the platform layer to hook the incoming TIME_SYNC signal up to the timesync strobe IRQ handler. If the arche-platform driver can't satisfy the request for the wake-detect line, it will return -EAGAIN and the calling work-queue must reschedule the attempt to get exclusive access to the wake-detect pin logic. A private data field is added to the arche-platform driver to enable passing of a timesync pointer to the ISR responsible for synchronizing time. 1. timesync.c A new file added which contains all of the logic associated with sending greybus commands to SVC, APBx or Interfaces to enable, disable and disseminate timing information. 2. timesync_platform.c Any platform/arch specific code goes into timesync_platform.c. Originally the idea was to keep the x86 and ARM arch dependencies in a timesync_platform_arch.c file - however with further refinement that's currently not necessary however just-in-case it becomes necessary to resuscitate arch or platform specific methods for accessing timer resources that access shouldn't be part of the core timesync.c logic and so for the moment we access these timer resources through a thin access layer in timesync_platform.c. Expect this to go away long term ideally. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Acked-by: Alex Elder <elder@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> |
/linux-master/arch/powerpc/include/asm/ | ||
H A D | synch.h | diff 49e9cf3f Sun Nov 01 18:30:31 MST 2015 Boqun Feng <boqun.feng@gmail.com> powerpc: Make value-returning atomics fully ordered According to memory-barriers.txt: > Any atomic operation that modifies some state in memory and returns > information about the state (old or new) implies an SMP-conditional > general memory barrier (smp_mb()) on each side of the actual > operation ... Which mean these operations should be fully ordered. However on PPC, PPC_ATOMIC_ENTRY_BARRIER is the barrier before the actual operation, which is currently "lwsync" if SMP=y. The leading "lwsync" can not guarantee fully ordered atomics, according to Paul Mckenney: https://lkml.org/lkml/2015/10/14/970 To fix this, we define PPC_ATOMIC_ENTRY_BARRIER as "sync" to guarantee the fully-ordered semantics. This also makes futex atomics fully ordered, which can avoid possible memory ordering problems if userspace code relies on futex system call for fully ordered semantics. Fixes: b97021f85517 ("powerpc: Fix atomic_xxx_return barrier semantics") Cc: stable@vger.kernel.org # 3.2+ Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Reviewed-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> diff 5a0e9b57 Tue Feb 09 18:10:25 MST 2010 Anton Blanchard <anton@samba.org> powerpc: Use lwsync for acquire barrier if CPU supports it Nick Piggin discovered that lwsync barriers around locks were faster than isync on 970. That was a long time ago and I completely dropped the ball in testing his patches across other ppc64 processors. Turns out the idea helps on other chips. Using a microbenchmark that uses a lot of threads to contend on a global pthread mutex (and therefore a global futex), POWER6 improves 8% and POWER7 improves 2%. I checked POWER5 and while I couldn't measure an improvement, there was no regression. This patch uses the lwsync patching code to replace the isyncs with lwsyncs on CPUs that support the instruction. We were marking POWER3 and RS64 as lwsync capable but in reality they treat it as a full sync (ie slow). Remove the CPU_FTR_LWSYNC bit from these CPUs so they continue to use the faster isync method. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> |
H A D | btext.h | diff 7191b615 Wed Jul 24 08:12:32 MDT 2013 Benjamin Herrenschmidt <benh@kernel.crashing.org> powerpc/pmac: Early debug output on screen on 64-bit macs We have a bunch of CONFIG_PPC_EARLY_DEBUG_* options that are intended for bringup/debug only. They hard wire a machine specific udbg backend very early on (before we even probe the platform), and use whatever tricks are available on each machine/cpu to be able to get some kind of output out there early on. So far, on powermac with no serial ports, we have CONFIG_PPC_EARLY_DEBUG_BOOTX to use the low-level btext engine on the screen, but it doesn't do much, at least on 64-bit. It only really gets enabled after the platform has been probed and the MMU enabled. This adds a way to enable it much earlier. From prom_init.c (while still running with Open Firmware), we grab the screen details and set things up using the physical address of the frame buffer. Then btext itself uses the "rm_ci" feature of the 970 processor (Real Mode Cache Inhibited) to access it while in real mode. We need to do a little bit of reorg of the btext code to inline things better, in order to limit how much we touch memory while in this mode as the consequences might be ... interesting. This successfully allowed me to debug problems early on with the G5 (related to gold being broken vs. ppc64 kernels). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> |
/linux-master/arch/powerpc/lib/ | ||
H A D | copypage_64.S | diff 57dda6ef Thu Aug 21 22:39:00 MDT 2008 Mark Nelson <markn@au1.ibm.com> powerpc: New copy_4K_page() This new copy_4K_page() function was originally tuned for the best performance on the Cell processor, but after testing on more 64bit powerpc chips it was found that with a small modification it either matched the performance offered by the current mainline version or bettered it by a small amount. It was found that on a Cell-based QS22 blade the amount of system time measured when compiling a 2.6.26 pseries_defconfig decreased by 4%. Using the same test, a 4-way 970MP machine saw a decrease of 2% in system time. No noticeable change was seen on Power4, Power5 or Power6. The 4096 byte page is copied in thirty-two 128 byte strides. An initial setup loop executes dcbt instructions for the whole source page and dcbz instructions for the whole destination page. To do this, the cache line size is retrieved from ppc64_caches. A new CPU feature bit, CPU_FTR_CP_USE_DCBTZ, (introduced in the previous patch) is used to make the modification to this new copy routine - on Power4, 970 and Cell the feature bit is set so the setup loop is executed, but on all other 64bit chips the setup loop is nop'ed out. Signed-off-by: Mark Nelson <markn@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org> diff 57dda6ef Thu Aug 21 22:39:00 MDT 2008 Mark Nelson <markn@au1.ibm.com> powerpc: New copy_4K_page() This new copy_4K_page() function was originally tuned for the best performance on the Cell processor, but after testing on more 64bit powerpc chips it was found that with a small modification it either matched the performance offered by the current mainline version or bettered it by a small amount. It was found that on a Cell-based QS22 blade the amount of system time measured when compiling a 2.6.26 pseries_defconfig decreased by 4%. Using the same test, a 4-way 970MP machine saw a decrease of 2% in system time. No noticeable change was seen on Power4, Power5 or Power6. The 4096 byte page is copied in thirty-two 128 byte strides. An initial setup loop executes dcbt instructions for the whole source page and dcbz instructions for the whole destination page. To do this, the cache line size is retrieved from ppc64_caches. A new CPU feature bit, CPU_FTR_CP_USE_DCBTZ, (introduced in the previous patch) is used to make the modification to this new copy routine - on Power4, 970 and Cell the feature bit is set so the setup loop is executed, but on all other 64bit chips the setup loop is nop'ed out. Signed-off-by: Mark Nelson <markn@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org> |
/linux-master/drivers/net/wireless/ath/ath11k/ | ||
H A D | spectral.c | diff 161c64de Fri Apr 22 15:36:47 MDT 2022 Hari Chandrakanthan <quic_haric@quicinc.com> ath11k: disable spectral scan during spectral deinit When ath11k modules are removed using rmmod with spectral scan enabled, crash is observed. Different crash trace is observed for each crash. Send spectral scan disable WMI command to firmware before cleaning the spectral dbring in the spectral_deinit API to avoid this crash. call trace from one of the crash observed: [ 1252.880802] Unable to handle kernel NULL pointer dereference at virtual address 00000008 [ 1252.882722] pgd = 0f42e886 [ 1252.890955] [00000008] *pgd=00000000 [ 1252.893478] Internal error: Oops: 5 [#1] PREEMPT SMP ARM [ 1253.093035] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.4.89 #0 [ 1253.115261] Hardware name: Generic DT based system [ 1253.121149] PC is at ath11k_spectral_process_data+0x434/0x574 [ath11k] [ 1253.125940] LR is at 0x88e31017 [ 1253.132448] pc : [<7f9387b8>] lr : [<88e31017>] psr: a0000193 [ 1253.135488] sp : 80d01bc8 ip : 00000001 fp : 970e0000 [ 1253.141737] r10: 88e31000 r9 : 970ec000 r8 : 00000080 [ 1253.146946] r7 : 94734040 r6 : a0000113 r5 : 00000057 r4 : 00000000 [ 1253.152159] r3 : e18cb694 r2 : 00000217 r1 : 1df1f000 r0 : 00000001 [ 1253.158755] Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment user [ 1253.165266] Control: 10c0383d Table: 5e71006a DAC: 00000055 [ 1253.172472] Process swapper/0 (pid: 0, stack limit = 0x60870141) [ 1253.458055] [<7f9387b8>] (ath11k_spectral_process_data [ath11k]) from [<7f917fdc>] (ath11k_dbring_buffer_release_event+0x214/0x2e4 [ath11k]) [ 1253.466139] [<7f917fdc>] (ath11k_dbring_buffer_release_event [ath11k]) from [<7f8ea3c4>] (ath11k_wmi_tlv_op_rx+0x1840/0x29cc [ath11k]) [ 1253.478807] [<7f8ea3c4>] (ath11k_wmi_tlv_op_rx [ath11k]) from [<7f8fe868>] (ath11k_htc_rx_completion_handler+0x180/0x4e0 [ath11k]) [ 1253.490699] [<7f8fe868>] (ath11k_htc_rx_completion_handler [ath11k]) from [<7f91308c>] (ath11k_ce_per_engine_service+0x2c4/0x3b4 [ath11k]) [ 1253.502386] [<7f91308c>] (ath11k_ce_per_engine_service [ath11k]) from [<7f9a4198>] (ath11k_pci_ce_tasklet+0x28/0x80 [ath11k_pci]) [ 1253.514811] [<7f9a4198>] (ath11k_pci_ce_tasklet [ath11k_pci]) from [<8032227c>] (tasklet_action_common.constprop.2+0x64/0xe8) [ 1253.526476] [<8032227c>] (tasklet_action_common.constprop.2) from [<803021e8>] (__do_softirq+0x130/0x2d0) [ 1253.537756] [<803021e8>] (__do_softirq) from [<80322610>] (irq_exit+0xcc/0xe8) [ 1253.547304] [<80322610>] (irq_exit) from [<8036a4a4>] (__handle_domain_irq+0x60/0xb4) [ 1253.554428] [<8036a4a4>] (__handle_domain_irq) from [<805eb348>] (gic_handle_irq+0x4c/0x90) [ 1253.562321] [<805eb348>] (gic_handle_irq) from [<80301a78>] (__irq_svc+0x58/0x8c) Tested-on: QCN6122 hw1.0 AHB WLAN.HK.2.6.0.1-00851-QCAHKSWPL_SILICONZ-1 Signed-off-by: Hari Chandrakanthan <quic_haric@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/1649396345-349-1-git-send-email-quic_haric@quicinc.com diff 161c64de Fri Apr 22 15:36:47 MDT 2022 Hari Chandrakanthan <quic_haric@quicinc.com> ath11k: disable spectral scan during spectral deinit When ath11k modules are removed using rmmod with spectral scan enabled, crash is observed. Different crash trace is observed for each crash. Send spectral scan disable WMI command to firmware before cleaning the spectral dbring in the spectral_deinit API to avoid this crash. call trace from one of the crash observed: [ 1252.880802] Unable to handle kernel NULL pointer dereference at virtual address 00000008 [ 1252.882722] pgd = 0f42e886 [ 1252.890955] [00000008] *pgd=00000000 [ 1252.893478] Internal error: Oops: 5 [#1] PREEMPT SMP ARM [ 1253.093035] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.4.89 #0 [ 1253.115261] Hardware name: Generic DT based system [ 1253.121149] PC is at ath11k_spectral_process_data+0x434/0x574 [ath11k] [ 1253.125940] LR is at 0x88e31017 [ 1253.132448] pc : [<7f9387b8>] lr : [<88e31017>] psr: a0000193 [ 1253.135488] sp : 80d01bc8 ip : 00000001 fp : 970e0000 [ 1253.141737] r10: 88e31000 r9 : 970ec000 r8 : 00000080 [ 1253.146946] r7 : 94734040 r6 : a0000113 r5 : 00000057 r4 : 00000000 [ 1253.152159] r3 : e18cb694 r2 : 00000217 r1 : 1df1f000 r0 : 00000001 [ 1253.158755] Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment user [ 1253.165266] Control: 10c0383d Table: 5e71006a DAC: 00000055 [ 1253.172472] Process swapper/0 (pid: 0, stack limit = 0x60870141) [ 1253.458055] [<7f9387b8>] (ath11k_spectral_process_data [ath11k]) from [<7f917fdc>] (ath11k_dbring_buffer_release_event+0x214/0x2e4 [ath11k]) [ 1253.466139] [<7f917fdc>] (ath11k_dbring_buffer_release_event [ath11k]) from [<7f8ea3c4>] (ath11k_wmi_tlv_op_rx+0x1840/0x29cc [ath11k]) [ 1253.478807] [<7f8ea3c4>] (ath11k_wmi_tlv_op_rx [ath11k]) from [<7f8fe868>] (ath11k_htc_rx_completion_handler+0x180/0x4e0 [ath11k]) [ 1253.490699] [<7f8fe868>] (ath11k_htc_rx_completion_handler [ath11k]) from [<7f91308c>] (ath11k_ce_per_engine_service+0x2c4/0x3b4 [ath11k]) [ 1253.502386] [<7f91308c>] (ath11k_ce_per_engine_service [ath11k]) from [<7f9a4198>] (ath11k_pci_ce_tasklet+0x28/0x80 [ath11k_pci]) [ 1253.514811] [<7f9a4198>] (ath11k_pci_ce_tasklet [ath11k_pci]) from [<8032227c>] (tasklet_action_common.constprop.2+0x64/0xe8) [ 1253.526476] [<8032227c>] (tasklet_action_common.constprop.2) from [<803021e8>] (__do_softirq+0x130/0x2d0) [ 1253.537756] [<803021e8>] (__do_softirq) from [<80322610>] (irq_exit+0xcc/0xe8) [ 1253.547304] [<80322610>] (irq_exit) from [<8036a4a4>] (__handle_domain_irq+0x60/0xb4) [ 1253.554428] [<8036a4a4>] (__handle_domain_irq) from [<805eb348>] (gic_handle_irq+0x4c/0x90) [ 1253.562321] [<805eb348>] (gic_handle_irq) from [<80301a78>] (__irq_svc+0x58/0x8c) Tested-on: QCN6122 hw1.0 AHB WLAN.HK.2.6.0.1-00851-QCAHKSWPL_SILICONZ-1 Signed-off-by: Hari Chandrakanthan <quic_haric@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/1649396345-349-1-git-send-email-quic_haric@quicinc.com |
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ | ||
H A D | ramgf100.c | diff 97e5268d Wed Mar 01 20:53:05 MST 2017 Ben Skeggs <bskeggs@redhat.com> drm/nouveau/fb/gf100-: rework ram detection This commit reworks the RAM detection algorithm, using RAM-per-LTC to determine whether a board has a mixed-memory configuration instead of using RAM-per-FBPA. I'm not certain the algorithm is perfect, but it should handle all currently known configurations in the very least. This should fix GTX 970 boards with 4GiB of RAM where the last 512MiB isn't fully accessible, as well as only detecting half the VRAM on GF108 boards. As a nice side-effect, GP10x memory detection now reuses the majority of the code from earlier chipsets. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> |
H A D | ramgk104.c | diff 97e5268d Wed Mar 01 20:53:05 MST 2017 Ben Skeggs <bskeggs@redhat.com> drm/nouveau/fb/gf100-: rework ram detection This commit reworks the RAM detection algorithm, using RAM-per-LTC to determine whether a board has a mixed-memory configuration instead of using RAM-per-FBPA. I'm not certain the algorithm is perfect, but it should handle all currently known configurations in the very least. This should fix GTX 970 boards with 4GiB of RAM where the last 512MiB isn't fully accessible, as well as only detecting half the VRAM on GF108 boards. As a nice side-effect, GP10x memory detection now reuses the majority of the code from earlier chipsets. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> |
H A D | ram.h | diff 97e5268d Wed Mar 01 20:53:05 MST 2017 Ben Skeggs <bskeggs@redhat.com> drm/nouveau/fb/gf100-: rework ram detection This commit reworks the RAM detection algorithm, using RAM-per-LTC to determine whether a board has a mixed-memory configuration instead of using RAM-per-FBPA. I'm not certain the algorithm is perfect, but it should handle all currently known configurations in the very least. This should fix GTX 970 boards with 4GiB of RAM where the last 512MiB isn't fully accessible, as well as only detecting half the VRAM on GF108 boards. As a nice side-effect, GP10x memory detection now reuses the majority of the code from earlier chipsets. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> |
/linux-master/arch/mips/alchemy/ | ||
H A D | Platform | diff 970e268d Thu Feb 20 06:59:24 MST 2014 Manuel Lauss <manuel.lauss@gmail.com> MIPS: Alchemy: Unify Devboard support. This patch merges support for all DB1xxx and PB1xxx boards into a single image, along with a new single defconfig for them. Run-tested on DB1300 and DB1500. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6577/ Patchwork: https://patchwork.linux-mips.org/patch/6659/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
/linux-master/fs/ocfs2/ | ||
H A D | buffer_head_io.h | diff 970e4936 Thu Nov 13 15:49:19 MST 2008 Joel Becker <joel.becker@oracle.com> ocfs2: Validate metadata only when it's read from disk. Add an optional validation hook to ocfs2_read_blocks(). Now the validation function is only called when a block was actually read off of disk. It is not called when the buffer was in cache. We add a buffer state bit BH_NeedsValidate to flag these buffers. It must always be one higher than the last JBD2 buffer state bit. The dinode, dirblock, extent_block, and xattr_block validators are lifted to this scheme directly. The group_descriptor validator needs to be split into two pieces. The first part only needs the gd buffer and is passed to ocfs2_read_block(). The second part requires the dinode as well, and is called every time. It's only 3 compares, so it's tiny. This also allows us to clean up the non-fatal gd check used by resize.c. It now has no magic argument. Signed-off-by: Joel Becker <joel.becker@oracle.com> Signed-off-by: Mark Fasheh <mfasheh@suse.com> |
/linux-master/Documentation/devicetree/bindings/display/ | ||
H A D | renesas,du.yaml | diff 970aa72c Thu Apr 29 06:47:56 MDT 2021 Geert Uytterhoeven <geert+renesas@glider.be> dt-bindings: display: renesas,du: Add missing power-domains property "make dtbs_check" complains: arch/arm/boot/dts/r8a7779-marzen.dt.yaml: display@fff80000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/renesas/r8a77970-v3msk.dt.yaml: display@feb00000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/renesas/r8a77970-eagle.dt.yaml: display@feb00000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/renesas/r8a77980-condor.dt.yaml: display@feb00000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dt.yaml: display@feb00000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' Fix this by documenting the power-domains property. Fixes: 99d66127fad25ebb ("dt-bindings: display: renesas,du: Convert binding to YAML") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/600d42256515f180bc84b72e8bdb5c5d9126ab62.1619700459.git.geert+renesas@glider.be Signed-off-by: Rob Herring <robh@kernel.org> |
/linux-master/arch/powerpc/kernel/ | ||
H A D | cputable.c | diff d63ac5f6 Tue Mar 12 16:55:02 MDT 2013 Benjamin Herrenschmidt <benh@kernel.crashing.org> powerpc: Fix cputable entry for 970MP rev 1.0 Commit 44ae3ab3358e962039c36ad4ae461ae9fb29596c forgot to update the entry for the 970MP rev 1.0 processor when moving some CPU features bits to the MMU feature bit mask. This breaks booting on some rare G5 models using that chip revision. Reported-by: Phileas Fogg <phileas-fogg@mail.ru> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: <stable@vger.kernel.org> [v3.0+] diff d63ac5f6 Tue Mar 12 16:55:02 MDT 2013 Benjamin Herrenschmidt <benh@kernel.crashing.org> powerpc: Fix cputable entry for 970MP rev 1.0 Commit 44ae3ab3358e962039c36ad4ae461ae9fb29596c forgot to update the entry for the 970MP rev 1.0 processor when moving some CPU features bits to the MMU feature bit mask. This breaks booting on some rare G5 models using that chip revision. Reported-by: Phileas Fogg <phileas-fogg@mail.ru> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: <stable@vger.kernel.org> [v3.0+] diff 3546e811 Sun Feb 25 23:35:14 MST 2007 Olof Johansson <olof@lixom.net> [POWERPC] No DEEPNAP on 970MP 1.0 970MP rev 1.0 is reported to have nonworking DEEPNAP support, we've had bug reports of lockups on those machines. Appearantly Apple used them on some dual-core dual-cpu systems. Rev 1.1 is OK, and that's the one that all 4-way systems seem to use. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org> diff 3546e811 Sun Feb 25 23:35:14 MST 2007 Olof Johansson <olof@lixom.net> [POWERPC] No DEEPNAP on 970MP 1.0 970MP rev 1.0 is reported to have nonworking DEEPNAP support, we've had bug reports of lockups on those machines. Appearantly Apple used them on some dual-core dual-cpu systems. Rev 1.1 is OK, and that's the one that all 4-way systems seem to use. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org> diff fecb352f Tue Nov 21 13:41:54 MST 2006 Mike Wolf <mjw@us.ibm.com> [POWERPC] powerpc: Make 970MP detectable by oprofile Change the oprofile_cpu_type in cputables.c to be ppc64/970MP. Oprofile needs to distinquish the MP from other 970 processors so it can add some new counters specific to the 970MP. Signed-off-by: Mike Wolf <mjw@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org> diff fecb352f Tue Nov 21 13:41:54 MST 2006 Mike Wolf <mjw@us.ibm.com> [POWERPC] powerpc: Make 970MP detectable by oprofile Change the oprofile_cpu_type in cputables.c to be ppc64/970MP. Oprofile needs to distinquish the MP from other 970 processors so it can add some new counters specific to the 970MP. Signed-off-by: Mike Wolf <mjw@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org> diff fecb352f Tue Nov 21 13:41:54 MST 2006 Mike Wolf <mjw@us.ibm.com> [POWERPC] powerpc: Make 970MP detectable by oprofile Change the oprofile_cpu_type in cputables.c to be ppc64/970MP. Oprofile needs to distinquish the MP from other 970 processors so it can add some new counters specific to the 970MP. Signed-off-by: Mike Wolf <mjw@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org> diff fecb352f Tue Nov 21 13:41:54 MST 2006 Mike Wolf <mjw@us.ibm.com> [POWERPC] powerpc: Make 970MP detectable by oprofile Change the oprofile_cpu_type in cputables.c to be ppc64/970MP. Oprofile needs to distinquish the MP from other 970 processors so it can add some new counters specific to the 970MP. Signed-off-by: Mike Wolf <mjw@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org> diff 362ff7b2 Wed Oct 18 09:47:22 MDT 2006 Jake Moilanen <moilanen@austin.ibm.com> [POWERPC] Add 970GX cputable entry 970GX cputable entry from Steve Winiecki. Signed-off-by: Jake Moilanen <moilanen@austin.ibm.com> arch/powerpc/kernel/cputable.c | 15 +++++++++++++++ arch/powerpc/oprofile/op_model_power4.c | 2 +- include/asm-powerpc/reg.h | 1 + 3 files changed, 17 insertions(+), 1 deletion(-) Signed-off-by: Paul Mackerras <paulus@samba.org> diff 362ff7b2 Wed Oct 18 09:47:22 MDT 2006 Jake Moilanen <moilanen@austin.ibm.com> [POWERPC] Add 970GX cputable entry 970GX cputable entry from Steve Winiecki. Signed-off-by: Jake Moilanen <moilanen@austin.ibm.com> arch/powerpc/kernel/cputable.c | 15 +++++++++++++++ arch/powerpc/oprofile/op_model_power4.c | 2 +- include/asm-powerpc/reg.h | 1 + 3 files changed, 17 insertions(+), 1 deletion(-) Signed-off-by: Paul Mackerras <paulus@samba.org> |
/linux-master/drivers/pci/controller/dwc/ | ||
H A D | pcie-kirin.c | diff e636c169 Thu Oct 21 04:45:13 MDT 2021 Mauro Carvalho Chehab <mchehab+huawei@kernel.org> PCI: kirin: Add Kirin 970 compatible Now that everything is in place, add a compatible for Kirin 970. Link: https://lore.kernel.org/r/ac8c730c0300b90d96bdaaf387d458d8949241a9.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com> diff e636c169 Thu Oct 21 04:45:13 MDT 2021 Mauro Carvalho Chehab <mchehab+huawei@kernel.org> PCI: kirin: Add Kirin 970 compatible Now that everything is in place, add a compatible for Kirin 970. Link: https://lore.kernel.org/r/ac8c730c0300b90d96bdaaf387d458d8949241a9.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com> diff b22dbbb2 Thu Oct 21 04:45:11 MDT 2021 Mauro Carvalho Chehab <mchehab+huawei@kernel.org> PCI: kirin: Support PERST# GPIOs for HiKey970 external PEX 8606 bridge On HiKey970, there's a PEX 8606 PCI bridge on its PHY with 6 lanes. Only 4 lanes are connected: lane 0 - connected to Kirin 970 (upstream) lane 4 - M.2 slot lane 5 - mini PCIe slot lane 6 - on-board Ethernet controller Each lane has its own PERST# GPIO pin and needs a clock request. Add support to parse a DT schema containing the above data. HiKey 970 requires a little more waiting time for the PCI bridge - which is outside the SoC - to finish the PERST# reset, and then initialize the eye diagram. Increase the waiting time for the PERST# signals accordingly. [bhelgaas: squash refcount fix from Wan Jiabing <wanjiabing@vivo.com>: https://lore.kernel.org/r/20211103062518.25695-1-wanjiabing@vivo.com and drop "parent" refcount per https://lore.kernel.org/all/20211103143059.GA683503@bhelgaas/] Link: https://lore.kernel.org/r/bb391a0e0f0863b66e645048315fab1a4f63f277.1634812676.git.mchehab+huawei@kernel.org Link: https://lore.kernel.org/all/9a365cffe5af9ec5a1f79638968c3a2efa979b65.1634622716.git.mchehab+huawei@kernel.org/ Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> diff b22dbbb2 Thu Oct 21 04:45:11 MDT 2021 Mauro Carvalho Chehab <mchehab+huawei@kernel.org> PCI: kirin: Support PERST# GPIOs for HiKey970 external PEX 8606 bridge On HiKey970, there's a PEX 8606 PCI bridge on its PHY with 6 lanes. Only 4 lanes are connected: lane 0 - connected to Kirin 970 (upstream) lane 4 - M.2 slot lane 5 - mini PCIe slot lane 6 - on-board Ethernet controller Each lane has its own PERST# GPIO pin and needs a clock request. Add support to parse a DT schema containing the above data. HiKey 970 requires a little more waiting time for the PCI bridge - which is outside the SoC - to finish the PERST# reset, and then initialize the eye diagram. Increase the waiting time for the PERST# signals accordingly. [bhelgaas: squash refcount fix from Wan Jiabing <wanjiabing@vivo.com>: https://lore.kernel.org/r/20211103062518.25695-1-wanjiabing@vivo.com and drop "parent" refcount per https://lore.kernel.org/all/20211103143059.GA683503@bhelgaas/] Link: https://lore.kernel.org/r/bb391a0e0f0863b66e645048315fab1a4f63f277.1634812676.git.mchehab+huawei@kernel.org Link: https://lore.kernel.org/all/9a365cffe5af9ec5a1f79638968c3a2efa979b65.1634622716.git.mchehab+huawei@kernel.org/ Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> diff d19afe7b Thu Oct 21 04:45:10 MDT 2021 Mauro Carvalho Chehab <mchehab+huawei@kernel.org> PCI: kirin: Use regmap for APB registers The PHY layer need to access APB registers too, for Kirin 970. So place them into a named regmap. Link: https://lore.kernel.org/r/daf0e4bda5a69a5ac8484e70f09351a959805c8c.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com> |
/linux-master/arch/x86/mm/ | ||
H A D | testmmiotrace.c | diff 970e6fa0 Mon May 12 13:21:03 MDT 2008 Pekka Paalanen <pq@iki.fi> mmiotrace: code style cleanups From c2da03771e29159627c5c7b9509ec70bce9f91ee Mon Sep 17 00:00:00 2001 From: Pekka Paalanen <pq@iki.fi> Date: Mon, 28 Apr 2008 21:25:22 +0300 Signed-off-by: Pekka Paalanen <pq@iki.fi> Signed-off-by: Ingo Molnar <mingo@elte.hu> |
/linux-master/arch/arm64/boot/dts/hisilicon/ | ||
H A D | hi3670.dtsi | diff 6219b20e Thu Sep 02 05:55:23 MDT 2021 Mauro Carvalho Chehab <mchehab+huawei@kernel.org> arm64: dts: hisilicon: Add support for Hikey 970 PMIC Add a device tree for the HiSilicon 6421v600 SPMI PMIC, used on HiKey970 board. As we now have support for it, change the fixed regulators used by the SD I/O to use the proper LDO supplies. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> |
/linux-master/scripts/dtc/include-prefixes/arm64/hisilicon/ | ||
H A D | hi3670.dtsi | diff 6219b20e Thu Sep 02 05:55:23 MDT 2021 Mauro Carvalho Chehab <mchehab+huawei@kernel.org> arm64: dts: hisilicon: Add support for Hikey 970 PMIC Add a device tree for the HiSilicon 6421v600 SPMI PMIC, used on HiKey970 board. As we now have support for it, change the fixed regulators used by the SD I/O to use the proper LDO supplies. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> |
/linux-master/arch/mips/configs/ | ||
H A D | db1xxx_defconfig | 970e268d Thu Feb 20 06:59:24 MST 2014 Manuel Lauss <manuel.lauss@gmail.com> MIPS: Alchemy: Unify Devboard support. This patch merges support for all DB1xxx and PB1xxx boards into a single image, along with a new single defconfig for them. Run-tested on DB1300 and DB1500. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6577/ Patchwork: https://patchwork.linux-mips.org/patch/6659/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
/linux-master/drivers/remoteproc/ | ||
H A D | st_slim_rproc.c | diff c008fad2 Sun Jan 01 03:43:37 MST 2017 Bhumika Goyal <bhumirks@gmail.com> drivers: remoteproc: constify rproc_ops structures Declare rproc_ops structures as const as they are only passed as an argument to the function rproc_alloc. This argument is of type const, so rproc_ops structures having this property can be declared const too. Done using Coccinelle: @r1 disable optional_qualifier @ identifier i; position p; @@ static struct rproc_ops i@p = {...}; @ok1@ identifier r1.i; position p; @@ rproc_alloc(...,&i@p,...) @bad@ position p!={r1.p,ok1.p}; identifier r1.i; @@ i@p @depends on !bad disable optional_qualifier@ identifier r1.i; @@ +const struct rproc_ops i; File size details: Size of the file remoteproc/da8xx_remoteproc.o remains the same before and after applying the changes. text data bss dec hex filename 1312 100 4 1416 588 remoteproc/da8xx_remoteproc.o 1312 100 4 1416 588 remoteproc/da8xx_remoteproc.o 970 240 0 1210 4ba remoteproc/omap_remoteproc.o 1002 192 0 1194 4aa remoteproc/omap_remoteproc.o 1901 240 0 2141 85d remoteproc/st_remoteproc.o 1933 192 0 2125 84d remoteproc/st_remoteproc.o 1288 96 0 1384 568 remoteproc/st_slim_rproc.o 1320 64 0 1384 568 remoteproc/st_slim_rproc.o 2121 240 0 2361 939 remoteproc/wkup_m3_rproc.o 2161 192 0 2353 931 remoteproc/wkup_m3_rproc.o Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
H A D | wkup_m3_rproc.c | diff c008fad2 Sun Jan 01 03:43:37 MST 2017 Bhumika Goyal <bhumirks@gmail.com> drivers: remoteproc: constify rproc_ops structures Declare rproc_ops structures as const as they are only passed as an argument to the function rproc_alloc. This argument is of type const, so rproc_ops structures having this property can be declared const too. Done using Coccinelle: @r1 disable optional_qualifier @ identifier i; position p; @@ static struct rproc_ops i@p = {...}; @ok1@ identifier r1.i; position p; @@ rproc_alloc(...,&i@p,...) @bad@ position p!={r1.p,ok1.p}; identifier r1.i; @@ i@p @depends on !bad disable optional_qualifier@ identifier r1.i; @@ +const struct rproc_ops i; File size details: Size of the file remoteproc/da8xx_remoteproc.o remains the same before and after applying the changes. text data bss dec hex filename 1312 100 4 1416 588 remoteproc/da8xx_remoteproc.o 1312 100 4 1416 588 remoteproc/da8xx_remoteproc.o 970 240 0 1210 4ba remoteproc/omap_remoteproc.o 1002 192 0 1194 4aa remoteproc/omap_remoteproc.o 1901 240 0 2141 85d remoteproc/st_remoteproc.o 1933 192 0 2125 84d remoteproc/st_remoteproc.o 1288 96 0 1384 568 remoteproc/st_slim_rproc.o 1320 64 0 1384 568 remoteproc/st_slim_rproc.o 2121 240 0 2361 939 remoteproc/wkup_m3_rproc.o 2161 192 0 2353 931 remoteproc/wkup_m3_rproc.o Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
/linux-master/drivers/net/wireless/mediatek/mt76/mt7615/ | ||
H A D | pci_mac.c | diff 970be1df Fri Sep 24 09:54:40 MDT 2021 Felix Fietkau <nbd@nbd.name> mt76: disable BH around napi_schedule() calls napi_schedule() can call __raise_softirq_irqoff(), which can perform softirq handling, so it must not be called in a pure process context with BH enabled. Signed-off-by: Felix Fietkau <nbd@nbd.name> |
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