| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | rv1_clk_mgr_clk.c | 52 #define REG(reg_name) \ macro
|
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| H A D | amdgpu_dcn20_vmid.c | 36 #define REG(reg)\ macro
|
| H A D | amdgpu_dcn20_dccg.c | 40 #define REG(reg) \ macro
|
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/ |
| H A D | amdgpu_bios_parser_helper.c | 55 #define REG(reg)\ macro
|
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| H A D | amdgpu_dcn10_ipp.c | 37 #define REG(reg) \ macro
|
| H A D | dcn10_dwb.c | 39 #define REG(reg)\ macro
|
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce120/ |
| H A D | amdgpu_hw_translate_dce120.c | 56 #define REG(reg_name)\ macro
[all...] |
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn10/ |
| H A D | amdgpu_hw_translate_dcn10.c | 56 #define REG(reg_name)\ macro
[all...] |
| /netbsd-current/external/gpl3/gcc.old/dist/libgcc/config/alpha/ |
| H A D | vms-gcc_shell_handler.c | 37 typedef unsigned long long REG; typedef
|
| /netbsd-current/external/gpl3/gcc/dist/libgcc/config/alpha/ |
| H A D | vms-gcc_shell_handler.c | 37 typedef unsigned long long REG; typedef
|
| /netbsd-current/sys/arch/ia64/disasm/ |
| H A D | disasm_int.h | 63 #define REG(i,r) FIELD(i, ((r) - 1) * REG_BITS + QP_BITS, REG_BITS) macro
|
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/ |
| H A D | amdgpu_dce120_hw_sequencer.c | 47 #define REG(reg)\ macro
|
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| H A D | amdgpu_dcn21_hwseq.c | 46 #define REG(reg)\ macro
|
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/ |
| H A D | amdgpu_hw_generic.c | 49 #define REG(reg)\ macro
|
| H A D | amdgpu_hw_ddc.c | 51 #define REG(reg)\ macro
|
| H A D | amdgpu_hw_gpio.c | 44 #define REG(reg)\ macro
|
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce110/ |
| H A D | amdgpu_hw_factory_dce110.c | 50 #define REG(reg_name)\ macro
|
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce80/ |
| H A D | amdgpu_hw_factory_dce80.c | 46 #define REG(reg_name)\ macro
|
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn20/ |
| H A D | amdgpu_hw_translate_dcn20.c | 59 #undef REG macro
60 #define REG(reg_name)\ macro
[all...] |
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn21/ |
| H A D | amdgpu_hw_translate_dcn21.c | 59 #undef REG macro
60 #define REG(reg_name)\ macro
[all...] |
| /netbsd-current/external/gpl3/binutils/dist/opcodes/ |
| H A D | mips-formats.h | 67 #define REG(SIZE, LSB, BANK) \ macro
|
| /netbsd-current/external/gpl3/binutils.old/dist/opcodes/ |
| H A D | mips-formats.h | 67 #define REG(SIZE, LSB, BANK) \ macro
|
| /netbsd-current/external/gpl3/gdb.old/dist/opcodes/ |
| H A D | mips-formats.h | 67 #define REG(SIZE, LSB, BANK) \ macro
|
| /netbsd-current/external/gpl3/gdb/dist/opcodes/ |
| H A D | mips-formats.h | 67 #define REG(SIZE, LSB, BANK) \ macro
|
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| H A D | amdgpu_dce_ipp.c | 37 #define REG(reg) \ macro
|