1/*	$NetBSD: amdgpu_dcn10_ipp.c,v 1.2 2021/12/18 23:45:03 riastradh Exp $	*/
2
3/*
4 * Copyright 2017 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: AMD
25 *
26 */
27
28#include <sys/cdefs.h>
29__KERNEL_RCSID(0, "$NetBSD: amdgpu_dcn10_ipp.c,v 1.2 2021/12/18 23:45:03 riastradh Exp $");
30
31#include <linux/slab.h>
32
33#include "dm_services.h"
34#include "dcn10_ipp.h"
35#include "reg_helper.h"
36
37#define REG(reg) \
38	(ippn10->regs->reg)
39
40#undef FN
41#define FN(reg_name, field_name) \
42	ippn10->ipp_shift->field_name, ippn10->ipp_mask->field_name
43
44#define CTX \
45	ippn10->base.ctx
46
47/*****************************************/
48/* Constructor, Destructor               */
49/*****************************************/
50
51static void dcn10_ipp_destroy(struct input_pixel_processor **ipp)
52{
53	kfree(TO_DCN10_IPP(*ipp));
54	*ipp = NULL;
55}
56
57static const struct ipp_funcs dcn10_ipp_funcs = {
58	.ipp_destroy			= dcn10_ipp_destroy
59};
60
61static const struct ipp_funcs dcn20_ipp_funcs = {
62	.ipp_destroy			= dcn10_ipp_destroy
63};
64
65void dcn10_ipp_construct(
66	struct dcn10_ipp *ippn10,
67	struct dc_context *ctx,
68	int inst,
69	const struct dcn10_ipp_registers *regs,
70	const struct dcn10_ipp_shift *ipp_shift,
71	const struct dcn10_ipp_mask *ipp_mask)
72{
73	ippn10->base.ctx = ctx;
74	ippn10->base.inst = inst;
75	ippn10->base.funcs = &dcn10_ipp_funcs;
76
77	ippn10->regs = regs;
78	ippn10->ipp_shift = ipp_shift;
79	ippn10->ipp_mask = ipp_mask;
80}
81
82void dcn20_ipp_construct(
83	struct dcn10_ipp *ippn10,
84	struct dc_context *ctx,
85	int inst,
86	const struct dcn10_ipp_registers *regs,
87	const struct dcn10_ipp_shift *ipp_shift,
88	const struct dcn10_ipp_mask *ipp_mask)
89{
90	ippn10->base.ctx = ctx;
91	ippn10->base.inst = inst;
92	ippn10->base.funcs = &dcn20_ipp_funcs;
93
94	ippn10->regs = regs;
95	ippn10->ipp_shift = ipp_shift;
96	ippn10->ipp_mask = ipp_mask;
97}
98