| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1244 getMemOperandWithOffset(const MachineInstr &MI, const MachineOperand *&BaseOp, int64_t &Offset, const TargetRegisterInfo *TRI) const argument
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ImplicitNullChecks.cpp | 367 const MachineOperand *BaseOp; local
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| H A D | MachinePipeliner.cpp | 2059 const MachineOperand *BaseOp; local
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| H A D | MachineScheduler.cpp | 1474 const MachineOperand *BaseOp; member in struct:__anon1764::BaseMemOpClusterMutation::MemOpInfo
1563 const MachineOperand *BaseOp; local
[all...] |
| H A D | MachineSink.cpp | 761 const MachineOperand *BaseOp; local
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| H A D | ModuloSchedule.cpp | 914 const MachineOperand *BaseOp; local
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| H A D | TargetInstrInfo.cpp | 1165 const MachineOperand *BaseOp; local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 1981 getMemOperandWithOffset(const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, const TargetRegisterInfo *TRI) const argument
1992 getMemOperandWithOffsetWidth( const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, unsigned &Width, const TargetRegisterInfo *TRI) const argument
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| H A D | AArch64StorePairSuppress.cpp | 150 const MachineOperand *BaseOp; local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 261 getMemOperandWithOffset(const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, const TargetRegisterInfo *TRI) const argument
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 93 const MachineOperand *BaseOp = (RelocOp == Op1) ? Op2 : Op1; local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 1062 const MachineOperand &BaseOp = MI.getOperand(1); local
1077 const MachineOperand &BaseOp = MI.getOperand(1); local
1100 const MachineOperand &BaseOp = MI.getOperand(0); local
1116 const MachineOperand &BaseOp = MI.getOperand(0); local
2943 getMemOperandWithOffset( const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, const TargetRegisterInfo *TRI) const argument
3183 const MachineOperand &BaseOp = MI.getOperand(BasePos); local
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| H A D | HexagonOptAddrMode.cpp | 418 MachineOperand &BaseOp = MID.mayLoad() ? UseMI->getOperand(1) local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 757 getMemOperandWithOffsetWidth( const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, unsigned &Width, const TargetRegisterInfo * ) const argument
798 getMemOperandWithOffset(const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, const TargetRegisterInfo *TRI) const argument
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 5546 const MCOperand &BaseOp = Inst.getOperand(2); local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 3600 unsigned BaseOp = 0; local
3665 unsigned BaseOp = 0; local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 3192 getMemOperandWithOffset( const MachineInstr &MemOp, const MachineOperand *&BaseOp, int64_t &Offset, const TargetRegisterInfo *TRI) const argument
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