Searched defs:RC (Results 1 - 25 of 213) sorted by path

123456789

/freebsd-11-stable/contrib/binutils/opcodes/
H A Dalpha-opc.c211 #define RC macro
[all...]
/freebsd-11-stable/crypto/openssl/crypto/whrlpool/
H A Dwp_block.c461 #define RC (&(Cx.q[256*N])) macro
/freebsd-11-stable/share/mk/
H A Dsys.mk252 RC ?= f77 macro
/freebsd-11-stable/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/lua/
H A Dlvm.c552 #define RC(i) check_exp(getCMode(GET_OPCODE(i)) == OpArgR, base+GETARG_C(i)) macro
/freebsd-11-stable/sys/dev/mthca/
H A Dmthca_qp.c284 enum { RC, UC, UD, RD, RDEE, MLX, NUM_TRANS }; enumerator in enum:__anon7294
/freebsd-11-stable/contrib/llvm-project/clang/lib/AST/
H A DASTContext.cpp553 const RawComment *RC = getRawCommentForDeclNoCache(D); local
579 const RawComment *RC = getRawCommentForAnyRedecl(D, &OriginalDecl); local
H A DDeclTemplate.cpp476 const Expr *RC = TPL->getRequiresClause(); local
H A DRawCommentList.cpp272 void RawCommentList::addComment(const RawComment &RC, argument
/freebsd-11-stable/contrib/llvm-project/clang/lib/Sema/
H A DSemaExpr.cpp14058 const RecordType *RC = CurrentType->getAs<RecordType>(); local
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DCGSCCPassManager.h786 LazyCallGraph::RefSCC *RC = RCWorklist.pop_back_val(); local
H A DLazyCallGraph.h575 friend raw_ostream &operator<<(raw_ostream &OS, const RefSCC &RC) { argument
896 RefSCC *RC = nullptr; member in class:llvm::LazyCallGraph::Edge::postorder_ref_scc_iterator
1202 getRefSCCIndex(RefSCC &RC) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h63 const TargetRegisterClass *RC; member in union:llvm::DstOp::__anon1456
H A DRegisterBankInfo.h603 getRegBankFromRegClass(const TargetRegisterClass &RC, LLT Ty) const { argument
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/MIRParser/
H A DMIParser.h40 const TargetRegisterClass *RC; member in union:llvm::VRegInfo::__anon1458
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineRegisterInfo.h1180 const TargetRegisterClass *RC = MRI->getRegClass(RegUnit); local
H A DRegisterClassInfo.h122 getMinCost(const TargetRegisterClass *RC) argument
130 getLastCostChange(const TargetRegisterClass *RC) argument
[all...]
H A DTargetInstrInfo.h975 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
987 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
H A DTargetLowering.h709 const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy]; local
730 const TargetRegisterClass *RC = RepRegClassForVT[VT.SimpleTy]; local
1986 void addRegisterClass(MVT VT, const TargetRegisterClass *RC) { argument
H A DTargetRegisterInfo.h288 isTypeLegalForClass(const TargetRegisterClass &RC, MVT T) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/IR/
H A DIRBuilder.h1168 auto *RC = dyn_cast<Constant>(R); local
[all...]
H A DInlineAsm.h300 static unsigned getFlagWordForRegClass(unsigned InputFlag, unsigned RC) { argument
351 static bool hasRegClassConstraint(unsigned Flag, unsigned &RC) { argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DCGSCCPassManager.cpp436 RefSCC *RC = &InitialRC; local
[all...]
H A DScalarEvolution.cpp691 const SCEVConstant *RC = cast<SCEVConstant>(RHS); local
745 const SCEVNAryExpr *RC = cast<SCEVNAryExpr>(RHS); local
765 const SCEVUDivExpr *RC = cast<SCEVUDivExpr>(RHS); local
783 const SCEVCastExpr *RC = cast<SCEVCastExpr>(RHS); local
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DAggressiveAntiDepBreaker.h48 const TargetRegisterClass *RC; member in struct:llvm::AggressiveAntiDepState::RegisterReference
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfExpression.cpp136 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(MachineReg); local

Completed in 435 milliseconds

123456789