8165381: Update for x86 SHA512 using AVX2
Summary: Add intrinsics for x86 AVX2 architecture with no SHA instructions.
Reviewed-by: kvn
Contributed-by: smita.kamath@intel.com

8167987: change merge context to clear for mask register usage model
Reviewed-by: kvn

8154122: Intrinsify fused mac operations
Summary: added FMA intrinsics on x86
Reviewed-by: kvn, aph, darcy

8157726: VarHandles/Unsafe should support sub-word atomic ops
Reviewed-by: psandoz, vlivanov, lagergren

8154974: AVX-512 equipped inflate, has_negatives & compress intrinsics
Reviewed-by: kvn
Contributed-by: tomasz.wojtowicz@intel.com

8154975: Update for vectorizedMismatch with AVX512
Reviewed-by: kvn

8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
Reviewed-by: kvn

8153998: Masked vector post loops
Summary: Masked vectorization for post loops to execute in a single iteration in place of fixup scalar loops which used to take many iterations to complete work for user loops.
Reviewed-by: twisti, kvn

8152907: Update for x86 tan and log10 in the math lib
Summary: Optimize Math.tan() and log10() for 64 and 32 bit X86 architecture using Intel LIBM implementation.
Reviewed-by: kvn, twisti
Contributed-by: shravya.rukmannagari@intel.com

8151003: Remove nds->is_valid() checks from assembler_x86.cpp
Reviewed-by: kvn

8152496: Blended code generation
Reviewed-by: kvn, shade

8151002: Make Assembler methods vextract and vinsert match actual instructions
Reviewed-by: kvn, vlivanov, mcberg

8150767: Enables SHA Extensions on x86
Summary: Add x86 intrinsics for SHA-1 and SHA-256.
Reviewed-by: kvn, twisti
Contributed-by: vivek.r.deshpande@intel.com, shravya.rukmannagari@intel.com

8149421: Vectorized Post Loops
Summary: add vectorised post loop for counted loops with vectors.
Reviewed-by: kvn

8143353: update for x86 sin and cos in the math lib
Summary: Optimize Math.sin() and cos() for 64 and 32 bit X86 architecture using Intel LIBM implementation.
Reviewed-by: kvn

8143925: Enhancing CounterMode.crypt() for AES
Summary: Add intrinsic for CounterMode.crypt() to leverage the parallel nature of AES in Counter(CTR) Mode.
Reviewed-by: kvn, ascarpino
Contributed-by: kishor.kharbas@intel.com

8145688: Update for x86 pow in the math lib
Summary: Optimizes Math.pow() for 64 and 32 bit X86 architecture using Intel LIBM implementation.
Reviewed-by: kvn
Contributed-by: vivek.r.deshpande@intel.com

8144771: Use AVX3 instructions for string compare
Reviewed-by: kvn, thartmann
Contributed-by: jan.civlin@intel.com, michael.c.berg@intel.com

8142980: SKX SpecJvm2008 - Derby
Summary: Fix EVEX and AVX512 problems found by testing on 64-bit SKX and KNL EVEX enabled platforms.
Reviewed-by: iveresov, kvn, vlivanov

8140779: Code generation fixes for avx512
Summary: Assembler refactoring. Abstract away instruction attributes.
Reviewed-by: kvn, roland, iveresov
Contributed-by: michael.c.berg@intel.com

8141132: JEP 254: Compact Strings
Summary: Adopt a more space-efficient internal representation for strings.
Reviewed-by: alanb, bdelsart, coleenp, iklam, jiangli, jrose, kevinw, naoto, pliden, roland, smarks, twisti
Contributed-by: Brent Christian <brent.christian@oracle.com>, Vivek Deshpande <vivek.r.deshpande@intel.com>, Tobias Hartmann <tobias.hartmann@oracle.com>, Charlie Hunt <charlie.hunt@oracle.com>, Vladimir Kozlov <vladimir.kozlov@oracle.com>, Roger Riggs <roger.riggs@oracle.com>, Xueming Shen <xueming.shen@oracle.com>, Aleksey Shipilev <aleksey.shipilev@oracle.com>, Sandhya Viswanathan <sandhya.viswanathan@intel.com>

8139340: SuperWord enhancement to support vector conditional move (CMovVD) on Intel AVX cpu
Summary: Emit vector conditional moves
Reviewed-by: kvn
Contributed-by: jan.civlin@intel.com

8139575: Update for x86 log in the math lib
Summary: Add new java.lang.Math() intrinsics from x86
Reviewed-by: kvn, iveresov
Contributed-by: vivek.r.deshpande@intel.com

8136421: JEP 243: Java-Level JVM Compiler Interface
Reviewed-by: ihse, alanb, roland, coleenp, iveresov, kvn, kbarrett

8132207: update for x86 exp in the math lib
Summary: Add new java.lang.Math() intrinsics from x86
Reviewed-by: kvn, iveresov
Contributed-by: vivek.r.deshpande@intel.com

8134553: CRC32C implementations for x86/x64 targets
Reviewed-by: kvn
Contributed-by: tomasz.wojtowicz@intel.com

8132160: support for AVX 512 call frames and stack management
Summary: simplify save/restore frame on x86 systems which support EVEX.
Reviewed-by: kvn, iveresov

8135028: support for vectorizing double precision sqrt
Reviewed-by: kvn, twisti

8081247: AVX 512 extended support
Summary: add more support for EVEX encoding
Reviewed-by: kvn, neliasso

8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
Reviewed-by: kvn, jrose

8081778: Use Intel x64 CPU instructions for RSA acceleration
Summary: Add intrinsics for BigInteger squareToLen and mulAdd methods.
Reviewed-by: kvn, jrose

8076276: Add support for AVX512
Reviewed-by: kvn, roland
Contributed-by: michael.c.berg@intel.com

8068945: Use RBP register as proper frame pointer in JIT compiled code on x86
Summary: Introduce the PreserveFramePointer flag to control if RBP is used as the frame pointer or as a general purpose register.
Reviewed-by: kvn, roland, dlong, enevill, shade

8074981: Integer/FP scalar reduction optimization
Summary: Add scalar reduction optimization to C2 to take advantage of vector instructions in modern x86 CPUs.
Reviewed-by: kvn, twisti
Contributed-by: michael.c.berg@intel.com

8058255: Native jbyte Atomic::cmpxchg for supported x86 platforms
Summary: Use the native cmpxchgb instruction on x86.
Reviewed-by: dholmes, kbarrett, phh
Contributed-by: erik.osterlund@lnu.se

8050147: StoreLoad barrier interferes with stack usages
Reviewed-by: jrose, kvn, drchase

8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
Summary: Add new C2 intrinsic for BigInteger::multiplyToLen() on x86 in 64-bit VM.
Reviewed-by: roland

8052081: Optimize generated by C2 code for Intel's Atom processor
Summary: Allow to execute vectorization and crc32 optimization on Atom. Enable UseFPUForSpilling by default on x86.
Reviewed-by: roland

8031320: Use Intel RTM instructions for locks
Summary: Use RTM for inflated locks and stack locks.
Reviewed-by: iveresov, twisti, roland, dcubed

8031321: Support Intel bit manipulation instructions
Summary: Add support for BMI1 instructions
Reviewed-by: kvn, roland

8026844: Various Math functions needs intrinsification
Reviewed-by: kvn, twisti

7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
Summary: add intrinsics using new instruction to interpreter, C1, C2, for suitable x86; add test
Reviewed-by: kvn, twisti

Merge

8000692: Remove old KERNEL code
Summary: Removed depreciated kernel VM source code from hotspot VM
Reviewed-by: dholmes, acorn

6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
Summary: Use SSE4.2 and AVX2 instructions for encodeArray intrinsic.
Reviewed-by: roland

8005419: Improve intrinsics code performance on x86 by using AVX2
Summary: use 256bit vpxor,vptest instructions in String.compareTo() and equals() intrinsics.
Reviewed-by: twisti

8005544: Use 256bit YMM registers in arraycopy stubs on x86
Summary: Use YMM registers in arraycopy and array_fill stubs.
Reviewed-by: roland, twisti

8005522: use fast-string instructions on x86 for zeroing
Summary: use 'rep stosb' instead of 'rep stosq' when fast-string operations are available.
Reviewed-by: twisti, roland

8003250: SPARC: move MacroAssembler into separate file
Reviewed-by: jrose, kvn

8003240: x86: move MacroAssembler into separate file
Reviewed-by: kvn

8003195: AbstractAssembler should not store code pointers but use the CodeSection directly
Reviewed-by: twisti, kvn
Contributed-by: Bharadwaj Yadavalli <bharadwaj.yadavalli@oracle.com>

7184394: add intrinsics to use AES instructions
Summary: Use new x86 AES instructions for AESCrypt.
Reviewed-by: twisti, kvn, roland
Contributed-by: tom.deneau@amd.com

7054512: Compress class pointers after perm gen removal
Summary: support of compress class pointers in the compilers.
Reviewed-by: kvn, twisti

7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
Summary: Save whole XMM/YMM registers in safepoint interrupt handler.
Reviewed-by: roland, twisti

7196681: NPG: Some JSR 292 tests crash in Windows exception handler
Summary: There was a rogue os::breakpoint() call in log_dependency left over from the jsr292 merge. Also changed verify_oop() calls for metadata to verify_{method,klass}_ptr.
Reviewed-by: kvn, twisti

6964458: Reimplement class meta-data storage to use native memory
Summary: Remove PermGen, allocate meta-data in metaspace linked to class loaders, rewrite GC walking, rewrite and rename metadata to be C++ classes
Reviewed-by: jmasa, stefank, never, coleenp, kvn, brutisso, mgerdin, dholmes, jrose, twisti, roland
Contributed-by: jmasa <jon.masamitsu@oracle.com>, stefank <stefan.karlsson@oracle.com>, mgerdin <mikael.gerdin@oracle.com>, never <tom.rodriguez@oracle.com>

6340864: Implement vectorization optimizations in hotspot-server
Summary: Added asm encoding and mach nodes for vector arithmetic instructions on x86.
Reviewed-by: roland

7023639: JSR 292 method handle invocation needs a fast path for compiled code
6984705: JSR 292 method handle creation should not go through JNI
Summary: remove assembly code for JDK 7 chained method handles
Reviewed-by: jrose, twisti, kvn, mhaupt
Contributed-by: John Rose <john.r.rose@oracle.com>, Christian Thalinger <christian.thalinger@oracle.com>, Michael Haupt <michael.haupt@oracle.com>

7181494: cleanup avx and vectors code
Summary: renamed mach nodes which use scalar AVX instructions, added integer vectors shuffling instructions
Reviewed-by: twisti

7119644: Increase superword's vector size up to 256 bits
Summary: Increase vector size up to 256-bits for YMM AVX registers on x86.
Reviewed-by: never, twisti, roland

7174532: jdk/test/java/lang/Math/WorstCaseTests.java failing on x86
Summary: increase precision on x86 for the steps of the computation of exp and pow.
Reviewed-by: kvn

7133857: exp() and pow() should use the x87 ISA on x86
Summary: use x87 instructions to implement exp() and pow() in interpreter/c1/c2.
Reviewed-by: kvn, never, twisti

7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
Summary: For C2 moved saving EBP after ESP adjustment. For C1 generated 5 byte nop instruction first if needed.
Reviewed-by: never, twisti, azeemj

7121648: Use 3-operands SIMD instructions on x86 with AVX
Summary: Use 3-operands SIMD instructions in C2 generated code for machines with AVX.
Reviewed-by: never

7116452: Add support for AVX instructions
Summary: Added support for AVX extension to the x86 instruction set.
Reviewed-by: never

7003454: order constants in constant table by number of references in code
Reviewed-by: kvn, never, bdelsart

7063629: use cbcond in C2 generated code on T4
Summary: Use new short branch instruction in C2 generated code.
Reviewed-by: never

7056380: VM crashes with SIGSEGV in compiled code
Summary: code was using andq reg, imm instead of addq addr, imm
Reviewed-by: kvn, jrose, twisti

7047697: MethodHandle.invokeExact call for wrong method causes VM failure if run with -Xcomp
Reviewed-by: never, twisti

6939861: JVM should handle more conversion operations
Reviewed-by: twisti, jrose

7009361: JSR 292 Invalid value on stack on solaris-sparc with -Xcomp
Reviewed-by: kvn, twisti

Merge

Merge

7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
Summary: A referent object that is only weakly reachable at the start of concurrent marking but is re-attached to the strongly reachable object graph during marking may not be marked as live. This can cause the reference object to be processed prematurely and leave dangling pointers to the referent object. Implement a read barrier for the java.lang.ref.Reference::referent field by intrinsifying the Reference.get() method, and intercepting accesses though JNI, reflection, and Unsafe, so that when a non-null referent object is read it is also logged in an SATB buffer.
Reviewed-by: kvn, iveresov, never, tonyp, dholmes

7034967: C1: assert(false) failed: error (assembler_sparc.cpp:2043)
Summary: Fix -XX:+VerifyOops
Reviewed-by: kvn, never

6777083: assert(target != __null,"must not be null")
Reviewed-by: iveresov, kvn

7032388: guarantee(VM_Version::supports_cmov()) failed: illegal instruction on i586 after 6919934
Summary: 6919934 added some unguarded cmov instructions which hit a guarantee on older hardware.
Reviewed-by: never, iveresov, kvn, phh

6964776: c2 should ensure the polling page is reachable on 64 bit
Summary: Materialize the pointer to the polling page in a register instead of using rip-relative addressing when the distance from the code cache is larger than disp32.
Reviewed-by: never, kvn

6942326: x86 code in string_indexof() could read beyond reserved heap space
Summary: copy small (<8) strings on stack if str+16 crosses a page boundary and load from stack into XMM. Back up pointer when loading string's tail.
Reviewed-by: never

7016474: string compare intrinsic improvements
Reviewed-by: kvn

7018378: JSR 292: _bound_int_mh produces wrong result on 64-bit SPARC
Reviewed-by: kvn

7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
Summary: Track allocated bytes in Thread's, update on TLAB retirement and direct allocation in Eden and tenured, add JNI methods for ThreadMXBean.
Reviewed-by: coleenp, kvn, dholmes, ysr

6961690: load oops from constant table on SPARC
Summary: oops should be loaded from the constant table of an nmethod instead of materializing them with a long code sequence.
Reviewed-by: never, kvn

6985015: C1 needs to support compressed oops
Summary: This change implements compressed oops for C1 for x64 and sparc. The changes are mostly on the codegen level, with a few exceptions when we do access things outside of the heap that are uncompressed from the IR. Compressed oops are now also enabled with tiered.
Reviewed-by: twisti, kvn, never, phh

6989984: Use standard include model for Hospot
Summary: Replaced MakeDeps and the includeDB files with more standardized solutions.
Reviewed-by: coleenp, kvn, kamg

6997311: SIGFPE in new long division asm code
Summary: use unsigned DIV instruction
Reviewed-by: never

6829194: JSR 292 needs to support compressed oops
Reviewed-by: kvn, jrose

4809552: Optimize Arrays.fill(...)
Reviewed-by: kvn

6973308: Missing zero length check before repne scas in check_klass_subtype_slow_path()
Summary: set Z = 0 (not equal) before repne_scan() to indicate that class was not found when RCX == 0.
Reviewed-by: never, phh

Merge

6930772: JSR 292 needs to support SPARC C1
Summary: C1 for SPARC needs to support JSR 292.
Reviewed-by: never, jrose

6941466: Oracle rebranding changes for Hotspot repositories
Summary: Change all the Sun copyrights to Oracle copyright
Reviewed-by: ohair

6829193: JSR 292 needs to support SPARC
Summary: There are unimplemented portions of the hotspot code for method handles and invokedynamic specific to SPARC.
Reviewed-by: kvn, never, jrose

Merge

6769124: various 64-bit fixes for c1
Reviewed-by: never

6889740: G1: OpenDS fails with "unhandled exception in compiled code"
Summary: Incorrect code was being generated for the store operation in the null case of the aastore bytecode template. The bad code was generated by the store_heap_oop routine which takes a Register as its second argument. Passing NULL_WORD (0) as the second argument causes the value to be converted to Register(0), which is rax. Thus the generated store was "mov (dst), $rax" instead of "mov (dst), $0x0". Changed calls to store_heap_oop that pass NULL_WORD as the second argument to a new routine store_heap_oop_null.
Reviewed-by: kvn, twisti

6827605: new String intrinsics may prevent EA scalar replacement
6875866: Intrinsic for String.indexOf() is broken on x86 with SSE4.2
Summary: Modify String intrinsic methods to pass char[] pointers instead of string oops.
Reviewed-by: never

6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
Summary: These methods can be instrinsified by using bit scan, bit test, and population count instructions.
Reviewed-by: kvn, never

6655638: dynamic languages need method handles
Summary: initial implementation, with known omissions (x86/64, sparc, compiler optim., c-oops, C++ interp.)
Reviewed-by: kvn, twisti, never

6761600: Use sse 4.2 in intrinsics
Summary: Use SSE 4.2 in intrinsics for String.{compareTo/equals/indexOf} and Arrays.equals.
Reviewed-by: kvn, never, jrose

6822204: volatile fences should prefer lock:addl to actual mfence instructions
Reviewed-by: kvn, phh

6814659: separable cleanups and subroutines for 6655638
Summary: preparatory but separable changes for method handles
Reviewed-by: kvn, never

6813212: factor duplicated assembly code for general subclass check (for 6655638)
Summary: Code in interp_masm, stubGenerator, c1_LIRAssembler, and AD files moved into MacroAssembler.
Reviewed-by: kvn

6378821: bitCount() should use POPC on SPARC processors and AMD+10h
Summary: bitCount() should use POPC on SPARC processors where POPC is implemented directly in hardware.
Reviewed-by: kvn, never

6791178: Specialize for zero as the compressed oop vm heap base
Summary: Use zero based compressed oops if java heap is below 32gb and unscaled compressed oops if java heap is below 4gb.
Reviewed-by: never, twisti, jcoomes, coleenp

6797305: Add LoadUB and LoadUI opcode class
Summary: Add a LoadUB (unsigned byte) and LoadUI (unsigned int) opcode class so we have these load optimizations in the first place and do not need to handle them in the matcher.
Reviewed-by: never, kvn

6812831: factor duplicated assembly code for megamorphic invokeinterface (for 6655638)
Summary: Code in vtableStubs and templateTable moved into MacroAssembler.
Reviewed-by: kvn

6812678: macro assembler needs delayed binding of a few constants (for 6655638)
Summary: minor assembler enhancements preparing for method handles
Reviewed-by: kvn

6462850: generate biased locking code in C2 ideal graph
Summary: Inline biased locking code in C2 ideal graph during macro nodes expansion
Reviewed-by: never

6532536: Optimize arraycopy stubs for Intel cpus
Summary: Use SSE2 movdqu in arraycopy stubs on newest Intel's cpus
Reviewed-by: rasbold

Merge

5108146: Merge i486 and amd64 cpu directories
6459804: Want client (c1) compiler for x86_64 (amd64) for faster start-up
Reviewed-by: kvn