Offload CCMP (WPA2) encryption and decryption to athn(4) hardware.

This reduces CPU load during traffic bursts, which is especially noticeable
on boards with relatively slow CPUs such as Alix and APU. For reference,
my rcc-ve boards (Intel Atom C2558) now forward ~2000pps between Ethernet
and wifi with <= 1% CPU interrupt time according to systat. Beforehand, these
boards became noticeably less responsive with fairly high interrupt and spin %.

CCMP offload is used on both PCI and USB devices (thanks kevlo@ for catching
my omission of USB devices in the first iteration of this change!)

Tested by (at least) Kevin Chadwick, tracey@, kevlo@, kili@, Ted Patterson,
David Dahlberg, and Scott Bennett.

ok tracey@ kevlo@

Set athn(4) Tx descriptor fields which specify Tx power used for retries.

tested by myself, jmc@, and Tracey Emery

In athn(4), fix a comment which misidentifies the field where RSSI
values occur. Add macros to access RSSI info in ds_status4 as well.
ok kevlo@

Finish initial 11n support for athn(4).

The heavy lifting was done by damien@ years ago. I didn't even have
to figure out what the hardware expects, the code was already there.

This driver now supports MCS 0-15 in client and hostap mode.
No Tx aggregation and no 40 MHz channels yet.

tested by vgross@, bmercer@, tb@, jmc@, Vadim Vygonets, Peter Kay
ok bmercer@ tb@ phessler@

of course, GPIO handling on AR9271 and AR7010 had to be different
from all other chips... quite nightmarish.

Add __attribute__((aligned(4))) to __packed Tx/Rx descriptors.
This makes gcc generate much more efficient code on architectures
with strong alignment constraints (like sparc64).
We use __packed to tell the compiler to not insert padding between
fields but the start of the descriptors is always 32-bit aligned.
When __packed is used, gcc assumes worst case scenario and generates
complicated code to prevent unaligned accesses.

Inspired by a similar change to ath9k.
Tested on sparc64.

For the record, example to set a field to 1 on a sparc64:
without __attribute__((aligned(4))):
ldub [%g2], %g1
and %g1, 0, %g1
stb %g1, [%g2]
ldub [%g2+1], %g1
and %g1, 0, %g1
stb %g1, [%g2+1]
ldub [%g2+2], %g1
and %g1, 0, %g1
stb %g1, [%g2+2]
ldub [%g2+3], %g1
and %g1, 0, %g1
or %g1, 1, %g1
stb %g1, [%g2+3]

with __attribute__((aligned(4))):
mov 1, %g1
st %g1, [%g2]

athn(4) is going to support a new family of Atheros 802.11n
chips (AR9003), which differs from the currently supported
families (AR5008, AR9001 and AR9002).

The main differences (from a driver point of view) are:

* DMA:
Tx and Rx descriptors have changed.
A single Tx descriptor can now reference up to 4 scatter/gather
DMA segments.
There is now a DMA ring for reporting Tx status with separate
Tx status descriptors (this ring is used to report Tx status for
all the Tx FIFOs).
Rx status descriptors are now put at the beginning of Rx buffers
and do not need to be allocated separately from buffers.
There are two Rx FIFOs (low priority and high priority) instead
of one.

* ROM:
The AR9003 family uses OTP-ROM instead of EEPROM.
Reading the ROM is totally insane since vendors can provide only
the chunks of ROM that differ from a default image (and thus the
default image has to be stored in the driver).
This is referenced as "compressed ROM" in the Linux driver, though
there is no real compression involved, at least for the moment.

* PHY registers:
All PHY registers have changed.
Some registers offsets do not fit on 16 bits anymore, but
since they are 32-bit aligned, we can still make them fit on
16 bits to save .rodata space in initialization tables.

* MAC registers:
Some MAC registers offsets have changed (GPIO, interrupt masks)
which is quite annoying (though ~98% remain the same.)

* Initialization values:
Initialization values are now split in mac/soc/bb/radio blocks
and pre/core/post phases in the Linux driver. I have chosen to
not go that road and merge these blocks in modal and non-modal
initialization values (similar to the other families).
The initialization order remains exactly the same as the Linux
driver though.

To manage these differences, I have split athn.c in two backends:
ar5008.c contains the bits that are specific to the AR5008,
AR9001 and AR9002 families (used by ar5416.c, ar9280.c,
ar9285.c and ar9287.c) and that were previously in athn.c.

ar9003.c contains the bits that are specific to the new
AR9003 family (used by ar9380.c only for now.)

I have introduced a thin hardware abstraction layer (actually
a set of pointers to functions) that is used in athn.c.
My intent is to keep this abstraction layer as thin as possible
and not to create another ugly pile of abstraction layers a la
MadWifi.

I think I've managed to keep things sane, probably at the expense
of duplicating some code in both ar5008.c and ar9003.c, but at
least we do not have to dig through layers and layers of virtual
descriptors to figure out what is mapped to the hardware.

Tested for non-regression on various AR5416 (sparc64+i386), AR9281
and AR9285 (i386 only) adapters.
AR9380 part is not tested (hardware is not available to the general
public yet).

Committed over my AR9285 2.0.

Set athn(4) Tx descriptor fields which specify Tx power used for retries.

tested by myself, jmc@, and Tracey Emery

In athn(4), fix a comment which misidentifies the field where RSSI
values occur. Add macros to access RSSI info in ds_status4 as well.
ok kevlo@

Finish initial 11n support for athn(4).

The heavy lifting was done by damien@ years ago. I didn't even have
to figure out what the hardware expects, the code was already there.

This driver now supports MCS 0-15 in client and hostap mode.
No Tx aggregation and no 40 MHz channels yet.

tested by vgross@, bmercer@, tb@, jmc@, Vadim Vygonets, Peter Kay
ok bmercer@ tb@ phessler@

of course, GPIO handling on AR9271 and AR7010 had to be different
from all other chips... quite nightmarish.

Add __attribute__((aligned(4))) to __packed Tx/Rx descriptors.
This makes gcc generate much more efficient code on architectures
with strong alignment constraints (like sparc64).
We use __packed to tell the compiler to not insert padding between
fields but the start of the descriptors is always 32-bit aligned.
When __packed is used, gcc assumes worst case scenario and generates
complicated code to prevent unaligned accesses.

Inspired by a similar change to ath9k.
Tested on sparc64.

For the record, example to set a field to 1 on a sparc64:
without __attribute__((aligned(4))):
ldub [%g2], %g1
and %g1, 0, %g1
stb %g1, [%g2]
ldub [%g2+1], %g1
and %g1, 0, %g1
stb %g1, [%g2+1]
ldub [%g2+2], %g1
and %g1, 0, %g1
stb %g1, [%g2+2]
ldub [%g2+3], %g1
and %g1, 0, %g1
or %g1, 1, %g1
stb %g1, [%g2+3]

with __attribute__((aligned(4))):
mov 1, %g1
st %g1, [%g2]

athn(4) is going to support a new family of Atheros 802.11n
chips (AR9003), which differs from the currently supported
families (AR5008, AR9001 and AR9002).

The main differences (from a driver point of view) are:

* DMA:
Tx and Rx descriptors have changed.
A single Tx descriptor can now reference up to 4 scatter/gather
DMA segments.
There is now a DMA ring for reporting Tx status with separate
Tx status descriptors (this ring is used to report Tx status for
all the Tx FIFOs).
Rx status descriptors are now put at the beginning of Rx buffers
and do not need to be allocated separately from buffers.
There are two Rx FIFOs (low priority and high priority) instead
of one.

* ROM:
The AR9003 family uses OTP-ROM instead of EEPROM.
Reading the ROM is totally insane since vendors can provide only
the chunks of ROM that differ from a default image (and thus the
default image has to be stored in the driver).
This is referenced as "compressed ROM" in the Linux driver, though
there is no real compression involved, at least for the moment.

* PHY registers:
All PHY registers have changed.
Some registers offsets do not fit on 16 bits anymore, but
since they are 32-bit aligned, we can still make them fit on
16 bits to save .rodata space in initialization tables.

* MAC registers:
Some MAC registers offsets have changed (GPIO, interrupt masks)
which is quite annoying (though ~98% remain the same.)

* Initialization values:
Initialization values are now split in mac/soc/bb/radio blocks
and pre/core/post phases in the Linux driver. I have chosen to
not go that road and merge these blocks in modal and non-modal
initialization values (similar to the other families).
The initialization order remains exactly the same as the Linux
driver though.

To manage these differences, I have split athn.c in two backends:
ar5008.c contains the bits that are specific to the AR5008,
AR9001 and AR9002 families (used by ar5416.c, ar9280.c,
ar9285.c and ar9287.c) and that were previously in athn.c.

ar9003.c contains the bits that are specific to the new
AR9003 family (used by ar9380.c only for now.)

I have introduced a thin hardware abstraction layer (actually
a set of pointers to functions) that is used in athn.c.
My intent is to keep this abstraction layer as thin as possible
and not to create another ugly pile of abstraction layers a la
MadWifi.

I think I've managed to keep things sane, probably at the expense
of duplicating some code in both ar5008.c and ar9003.c, but at
least we do not have to dig through layers and layers of virtual
descriptors to figure out what is mapped to the hardware.

Tested for non-regression on various AR5416 (sparc64+i386), AR9281
and AR9285 (i386 only) adapters.
AR9380 part is not tested (hardware is not available to the general
public yet).

Committed over my AR9285 2.0.

In athn(4), fix a comment which misidentifies the field where RSSI
values occur. Add macros to access RSSI info in ds_status4 as well.
ok kevlo@

Finish initial 11n support for athn(4).

The heavy lifting was done by damien@ years ago. I didn't even have
to figure out what the hardware expects, the code was already there.

This driver now supports MCS 0-15 in client and hostap mode.
No Tx aggregation and no 40 MHz channels yet.

tested by vgross@, bmercer@, tb@, jmc@, Vadim Vygonets, Peter Kay
ok bmercer@ tb@ phessler@

of course, GPIO handling on AR9271 and AR7010 had to be different
from all other chips... quite nightmarish.

Add __attribute__((aligned(4))) to __packed Tx/Rx descriptors.
This makes gcc generate much more efficient code on architectures
with strong alignment constraints (like sparc64).
We use __packed to tell the compiler to not insert padding between
fields but the start of the descriptors is always 32-bit aligned.
When __packed is used, gcc assumes worst case scenario and generates
complicated code to prevent unaligned accesses.

Inspired by a similar change to ath9k.
Tested on sparc64.

For the record, example to set a field to 1 on a sparc64:
without __attribute__((aligned(4))):
ldub [%g2], %g1
and %g1, 0, %g1
stb %g1, [%g2]
ldub [%g2+1], %g1
and %g1, 0, %g1
stb %g1, [%g2+1]
ldub [%g2+2], %g1
and %g1, 0, %g1
stb %g1, [%g2+2]
ldub [%g2+3], %g1
and %g1, 0, %g1
or %g1, 1, %g1
stb %g1, [%g2+3]

with __attribute__((aligned(4))):
mov 1, %g1
st %g1, [%g2]

athn(4) is going to support a new family of Atheros 802.11n
chips (AR9003), which differs from the currently supported
families (AR5008, AR9001 and AR9002).

The main differences (from a driver point of view) are:

* DMA:
Tx and Rx descriptors have changed.
A single Tx descriptor can now reference up to 4 scatter/gather
DMA segments.
There is now a DMA ring for reporting Tx status with separate
Tx status descriptors (this ring is used to report Tx status for
all the Tx FIFOs).
Rx status descriptors are now put at the beginning of Rx buffers
and do not need to be allocated separately from buffers.
There are two Rx FIFOs (low priority and high priority) instead
of one.

* ROM:
The AR9003 family uses OTP-ROM instead of EEPROM.
Reading the ROM is totally insane since vendors can provide only
the chunks of ROM that differ from a default image (and thus the
default image has to be stored in the driver).
This is referenced as "compressed ROM" in the Linux driver, though
there is no real compression involved, at least for the moment.

* PHY registers:
All PHY registers have changed.
Some registers offsets do not fit on 16 bits anymore, but
since they are 32-bit aligned, we can still make them fit on
16 bits to save .rodata space in initialization tables.

* MAC registers:
Some MAC registers offsets have changed (GPIO, interrupt masks)
which is quite annoying (though ~98% remain the same.)

* Initialization values:
Initialization values are now split in mac/soc/bb/radio blocks
and pre/core/post phases in the Linux driver. I have chosen to
not go that road and merge these blocks in modal and non-modal
initialization values (similar to the other families).
The initialization order remains exactly the same as the Linux
driver though.

To manage these differences, I have split athn.c in two backends:
ar5008.c contains the bits that are specific to the AR5008,
AR9001 and AR9002 families (used by ar5416.c, ar9280.c,
ar9285.c and ar9287.c) and that were previously in athn.c.

ar9003.c contains the bits that are specific to the new
AR9003 family (used by ar9380.c only for now.)

I have introduced a thin hardware abstraction layer (actually
a set of pointers to functions) that is used in athn.c.
My intent is to keep this abstraction layer as thin as possible
and not to create another ugly pile of abstraction layers a la
MadWifi.

I think I've managed to keep things sane, probably at the expense
of duplicating some code in both ar5008.c and ar9003.c, but at
least we do not have to dig through layers and layers of virtual
descriptors to figure out what is mapped to the hardware.

Tested for non-regression on various AR5416 (sparc64+i386), AR9281
and AR9285 (i386 only) adapters.
AR9380 part is not tested (hardware is not available to the general
public yet).

Committed over my AR9285 2.0.