Implement wakeup interrupts on amd64. Provide a dummy implementation for
i386 such that we can call the necessary hooks in the suspend/resume code
without adding #ifdefs. Tweak the arm64 implementation such that we can
call the hooks earlier as this is necessary to mask MSI and MSI-X
interrupts on arm64.

ok deraadt@, mlarkin@

delete incorrect comment about sys/cdefs.h

Remove unused spllock().

OK deraadt@ mpi@

intr_barrier(9) for i386.

Make i386_send_ipi() return void

Nobody uses its return value.

Move grab/release of the kernel_lock for softintrs from the ASM stubs to
softintr_dispatch(). Delete traces of long superseded stats code.

ok beck@ mpi@ uebayasi@

It's been a quarter century: we can assume volatile is present with that name.

ok dlg@ mpi@ deraadt@

N: Thou shalt not call hardclock() with biglock held.

i386 disobeys the Nth commandment. Fix this. While here, make i386 and amd64
definitions of iplclock and statclock match.

ok art@, kettenis@

Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.

Discussed and okay drahn@. Okay deraadt@.

Eliminate x86_multicast_ipi() as unused and broken (doesn't handle #cpu>32).
The i386 version was removed some time ago, so kill its declaration too.
ok tedu@ kettenis@

Convert netisr to a normal soft interrupt instead of hanving MD code
for it. This makes the netisr a real C function which will help further
development. No noticable performance change on i386 and amd64.
With input from kettenis@ and miod@ additional OKs mikeb@ and henning@

Make the i386 APIC code closer to the amd64 version. Many whitespace fixes,
some additional code.

ok toby@, oga@

Switch the softinterrupt code on x86 over to mutexes instead of
simplelocks + splhigh().

First part of making it possible to make mpsafe softinterrupts.

"oh yes, definitely" miod@

Introduce splsoftassert(), similar to splassert() but for soft interrupt
levels. This will allow for platforms where soft interrupt levels do not
map to real hardware interrupt levels to have soft ipl values overlapping
hard ipl values without breaking spl asserts.

Always include machine/cpu.h and remove i82489reg.h/i82489var.h.

ok kettenis@

Move i386 to __HAVE_GENERIC_SOFT_INTERRUPTS

ok dlg@, tested by dlg@, oga@, jsg@, deraadt@

Make ipending per-cpu. Should fix PR 5788.

ok weingart@

Remove some left-overs from the TSC based microtime. We don't need
to synchronize the tsc between CPUs anymore. While here, also remove
the slow TLB IPI since it's been dead for a while.

noticed by mickey
toby@ ok

Replace the overdesigned and overcomplicated tlb shootdown code with
very simple and dumb fast tlb IPI handlers that have in the order of
the same amount of instructions as the old code had function calls.

All TLB shootdowns are reorganized so that we always shoot the,
without looking at PG_U and when we're shooting a range (primarily in
pmap_remove), we shoot the range when there are 32 or less pages in
it, otherwise we just nuke the whole TLB (this might need tweaking if
someone is interested in micro-optimization). The IPIs are not handled
through the normal interrupt vectoring code, they are not blockable
and they only shoot one page or a range of pages or the whole tlb.

This gives a 15% reduction in system time on my dual-core laptop
during a kernel compile and an 18% reduction in real time on a quad
machine doing bulk ports build.

Tested by many, in snaps for a week, no slowdowns reported (although not
everyone is seeing such huge wins).

splassert_ctl defaults to 1 now, so dont wrap the checks for
splassert_ctl > 0 in __predict_false().

ok deraadt@

Introduce a smp aware hw.setperf mechanism, it will scale all CPUs or
cores by the same amount, i.e. if you do hw.setperf=50 both cores will
be scaled to the opearting state corresponing to 50%. Tested by many with
est (mainly on core2duo machines like X60 thinkpads). Only enable est
during GENERIC.MP build no one tested powernow.

ok art@

Make the ast on i386 per-process instead of per-cpu. This makes
signal delivery more reliable in some cases when a process switches
cpu.

kettenis@ ok

Remove duplicated defines from intr.h that are already defined in
intrdefs.h that is inlucded first thing in intr.h.

eyeballed for sanity by pedro@

implement reliable microtime on smp (joint work w/ otto):
send a bcast ipi from the cpu0 to all others to timestamp tsc
on every clock intr. this way using local tsc provides accurate
microtime() measurements. thus gettimeofday test passes now.
otto@ deraadt@ ok

remove IPL_IMP and splimp().

nothing uses spllowersoftclock() anymore

Fix profiled kernel builds on i386 by moving splraise/splx code into macros
permitting non-recursive reuse in mcount.

Should be a no-op for normal builds.

Rewrite intlock/intunlock not to pass around interrupt frame directly
without copying which is against C conventions and broke GENERIC.MP
with a gcc3 optimization
From niklas, tested by many

We need __splbarrier to compile kernel, tho it should be
replaced with a real gcc barrier.

ok deraadt@

debranch SMP, have fun

workaround gcc brokenness by outlining spl functions.
finally solves vfs corruption. hint and ok art@, ok deraadt@

i386 changes to move to ELF. asm cleanup. Change MAXDSIZ to 512M for 1Gsep.
DARPA funded work.

Some people say that "__asm __volatile("")" is not enough.
Use "__asm __volatile("":::"memory")" to completly avoid reordering.

Define an IPL_VM and mark IPL_IMP as "not to be used".

define IPL_STATCLOCK

Implement splassert. Even simpler than on the sparc.

Define placeholders for art's splassert() debugging stuff on all arches.
Currently as no-ops everywhere.

ok art@, deraadt@

First round of __P removal in sys

branches: 1.12.2;
SMALL_KERNEL -> outline splx

remover registers. bracket spl regions with asm volatiles

New try at a level based irq system.

Revert niklas's broken ICU interrupt handling changes; deraadt@ ok

Redo the ICU interrupt handling system to better emulate an APIC system.
This is done by representing the current blockings of interrupts with
a priority level instead of an interrupt mask. This makes it possible to
share implementations for spl* functions/macros between both ICU
and APIC (a must when going MP) systems. In this process, assign
soft interrupts their own levels to match the way things will be on
APIC systems where they actually will be real interrupts and not just
bits in a pending mask as they are now.
Heavily inspired by Bill Studenmunds SMP work in NetBSD

Define splvm() for arches who don't already provide it, with the same
definition as splimp().
art@ ok

$OpenBSD$

Change splsoftclock() to raise the spl, instead of lowering it.
Add spllowersoftclock() for the former behaviour. Update comment. (art@ ok)

branches: 1.4.4;


Some people don't have enough RAM in their PCs and expect swapping to
work.

Fix an array bounds problem with the imask[] array.

From NetBSD; let i386 run audio at a high IPL

splstatclock to splhigh; problem pointed out by gopal

sync

delete incorrect comment about sys/cdefs.h

Remove unused spllock().

OK deraadt@ mpi@

intr_barrier(9) for i386.

Make i386_send_ipi() return void

Nobody uses its return value.

Move grab/release of the kernel_lock for softintrs from the ASM stubs to
softintr_dispatch(). Delete traces of long superseded stats code.

ok beck@ mpi@ uebayasi@

It's been a quarter century: we can assume volatile is present with that name.

ok dlg@ mpi@ deraadt@

N: Thou shalt not call hardclock() with biglock held.

i386 disobeys the Nth commandment. Fix this. While here, make i386 and amd64
definitions of iplclock and statclock match.

ok art@, kettenis@

Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.

Discussed and okay drahn@. Okay deraadt@.

Eliminate x86_multicast_ipi() as unused and broken (doesn't handle #cpu>32).
The i386 version was removed some time ago, so kill its declaration too.
ok tedu@ kettenis@

Convert netisr to a normal soft interrupt instead of hanving MD code
for it. This makes the netisr a real C function which will help further
development. No noticable performance change on i386 and amd64.
With input from kettenis@ and miod@ additional OKs mikeb@ and henning@

Make the i386 APIC code closer to the amd64 version. Many whitespace fixes,
some additional code.

ok toby@, oga@

Switch the softinterrupt code on x86 over to mutexes instead of
simplelocks + splhigh().

First part of making it possible to make mpsafe softinterrupts.

"oh yes, definitely" miod@

Introduce splsoftassert(), similar to splassert() but for soft interrupt
levels. This will allow for platforms where soft interrupt levels do not
map to real hardware interrupt levels to have soft ipl values overlapping
hard ipl values without breaking spl asserts.

Always include machine/cpu.h and remove i82489reg.h/i82489var.h.

ok kettenis@

Move i386 to __HAVE_GENERIC_SOFT_INTERRUPTS

ok dlg@, tested by dlg@, oga@, jsg@, deraadt@

Make ipending per-cpu. Should fix PR 5788.

ok weingart@

Remove some left-overs from the TSC based microtime. We don't need
to synchronize the tsc between CPUs anymore. While here, also remove
the slow TLB IPI since it's been dead for a while.

noticed by mickey
toby@ ok

Replace the overdesigned and overcomplicated tlb shootdown code with
very simple and dumb fast tlb IPI handlers that have in the order of
the same amount of instructions as the old code had function calls.

All TLB shootdowns are reorganized so that we always shoot the,
without looking at PG_U and when we're shooting a range (primarily in
pmap_remove), we shoot the range when there are 32 or less pages in
it, otherwise we just nuke the whole TLB (this might need tweaking if
someone is interested in micro-optimization). The IPIs are not handled
through the normal interrupt vectoring code, they are not blockable
and they only shoot one page or a range of pages or the whole tlb.

This gives a 15% reduction in system time on my dual-core laptop
during a kernel compile and an 18% reduction in real time on a quad
machine doing bulk ports build.

Tested by many, in snaps for a week, no slowdowns reported (although not
everyone is seeing such huge wins).

splassert_ctl defaults to 1 now, so dont wrap the checks for
splassert_ctl > 0 in __predict_false().

ok deraadt@

Introduce a smp aware hw.setperf mechanism, it will scale all CPUs or
cores by the same amount, i.e. if you do hw.setperf=50 both cores will
be scaled to the opearting state corresponing to 50%. Tested by many with
est (mainly on core2duo machines like X60 thinkpads). Only enable est
during GENERIC.MP build no one tested powernow.

ok art@

Make the ast on i386 per-process instead of per-cpu. This makes
signal delivery more reliable in some cases when a process switches
cpu.

kettenis@ ok

Remove duplicated defines from intr.h that are already defined in
intrdefs.h that is inlucded first thing in intr.h.

eyeballed for sanity by pedro@

implement reliable microtime on smp (joint work w/ otto):
send a bcast ipi from the cpu0 to all others to timestamp tsc
on every clock intr. this way using local tsc provides accurate
microtime() measurements. thus gettimeofday test passes now.
otto@ deraadt@ ok

remove IPL_IMP and splimp().

nothing uses spllowersoftclock() anymore

Fix profiled kernel builds on i386 by moving splraise/splx code into macros
permitting non-recursive reuse in mcount.

Should be a no-op for normal builds.

Rewrite intlock/intunlock not to pass around interrupt frame directly
without copying which is against C conventions and broke GENERIC.MP
with a gcc3 optimization
From niklas, tested by many

We need __splbarrier to compile kernel, tho it should be
replaced with a real gcc barrier.

ok deraadt@

debranch SMP, have fun

workaround gcc brokenness by outlining spl functions.
finally solves vfs corruption. hint and ok art@, ok deraadt@

i386 changes to move to ELF. asm cleanup. Change MAXDSIZ to 512M for 1Gsep.
DARPA funded work.

Some people say that "__asm __volatile("")" is not enough.
Use "__asm __volatile("":::"memory")" to completly avoid reordering.

Define an IPL_VM and mark IPL_IMP as "not to be used".

define IPL_STATCLOCK

Implement splassert. Even simpler than on the sparc.

Define placeholders for art's splassert() debugging stuff on all arches.
Currently as no-ops everywhere.

ok art@, deraadt@

First round of __P removal in sys

branches: 1.12.2;
SMALL_KERNEL -> outline splx

remover registers. bracket spl regions with asm volatiles

New try at a level based irq system.

Revert niklas's broken ICU interrupt handling changes; deraadt@ ok

Redo the ICU interrupt handling system to better emulate an APIC system.
This is done by representing the current blockings of interrupts with
a priority level instead of an interrupt mask. This makes it possible to
share implementations for spl* functions/macros between both ICU
and APIC (a must when going MP) systems. In this process, assign
soft interrupts their own levels to match the way things will be on
APIC systems where they actually will be real interrupts and not just
bits in a pending mask as they are now.
Heavily inspired by Bill Studenmunds SMP work in NetBSD

Define splvm() for arches who don't already provide it, with the same
definition as splimp().
art@ ok

$OpenBSD$

Change splsoftclock() to raise the spl, instead of lowering it.
Add spllowersoftclock() for the former behaviour. Update comment. (art@ ok)

branches: 1.4.4;


Some people don't have enough RAM in their PCs and expect swapping to
work.

Fix an array bounds problem with the imask[] array.

From NetBSD; let i386 run audio at a high IPL

splstatclock to splhigh; problem pointed out by gopal

sync

Remove unused spllock().

OK deraadt@ mpi@

intr_barrier(9) for i386.

Make i386_send_ipi() return void

Nobody uses its return value.

Move grab/release of the kernel_lock for softintrs from the ASM stubs to
softintr_dispatch(). Delete traces of long superseded stats code.

ok beck@ mpi@ uebayasi@

It's been a quarter century: we can assume volatile is present with that name.

ok dlg@ mpi@ deraadt@

N: Thou shalt not call hardclock() with biglock held.

i386 disobeys the Nth commandment. Fix this. While here, make i386 and amd64
definitions of iplclock and statclock match.

ok art@, kettenis@

Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.

Discussed and okay drahn@. Okay deraadt@.

Eliminate x86_multicast_ipi() as unused and broken (doesn't handle #cpu>32).
The i386 version was removed some time ago, so kill its declaration too.
ok tedu@ kettenis@

Convert netisr to a normal soft interrupt instead of hanving MD code
for it. This makes the netisr a real C function which will help further
development. No noticable performance change on i386 and amd64.
With input from kettenis@ and miod@ additional OKs mikeb@ and henning@

Make the i386 APIC code closer to the amd64 version. Many whitespace fixes,
some additional code.

ok toby@, oga@

Switch the softinterrupt code on x86 over to mutexes instead of
simplelocks + splhigh().

First part of making it possible to make mpsafe softinterrupts.

"oh yes, definitely" miod@

Introduce splsoftassert(), similar to splassert() but for soft interrupt
levels. This will allow for platforms where soft interrupt levels do not
map to real hardware interrupt levels to have soft ipl values overlapping
hard ipl values without breaking spl asserts.

Always include machine/cpu.h and remove i82489reg.h/i82489var.h.

ok kettenis@

Move i386 to __HAVE_GENERIC_SOFT_INTERRUPTS

ok dlg@, tested by dlg@, oga@, jsg@, deraadt@

Make ipending per-cpu. Should fix PR 5788.

ok weingart@

Remove some left-overs from the TSC based microtime. We don't need
to synchronize the tsc between CPUs anymore. While here, also remove
the slow TLB IPI since it's been dead for a while.

noticed by mickey
toby@ ok

Replace the overdesigned and overcomplicated tlb shootdown code with
very simple and dumb fast tlb IPI handlers that have in the order of
the same amount of instructions as the old code had function calls.

All TLB shootdowns are reorganized so that we always shoot the,
without looking at PG_U and when we're shooting a range (primarily in
pmap_remove), we shoot the range when there are 32 or less pages in
it, otherwise we just nuke the whole TLB (this might need tweaking if
someone is interested in micro-optimization). The IPIs are not handled
through the normal interrupt vectoring code, they are not blockable
and they only shoot one page or a range of pages or the whole tlb.

This gives a 15% reduction in system time on my dual-core laptop
during a kernel compile and an 18% reduction in real time on a quad
machine doing bulk ports build.

Tested by many, in snaps for a week, no slowdowns reported (although not
everyone is seeing such huge wins).

splassert_ctl defaults to 1 now, so dont wrap the checks for
splassert_ctl > 0 in __predict_false().

ok deraadt@

Introduce a smp aware hw.setperf mechanism, it will scale all CPUs or
cores by the same amount, i.e. if you do hw.setperf=50 both cores will
be scaled to the opearting state corresponing to 50%. Tested by many with
est (mainly on core2duo machines like X60 thinkpads). Only enable est
during GENERIC.MP build no one tested powernow.

ok art@

Make the ast on i386 per-process instead of per-cpu. This makes
signal delivery more reliable in some cases when a process switches
cpu.

kettenis@ ok

Remove duplicated defines from intr.h that are already defined in
intrdefs.h that is inlucded first thing in intr.h.

eyeballed for sanity by pedro@

implement reliable microtime on smp (joint work w/ otto):
send a bcast ipi from the cpu0 to all others to timestamp tsc
on every clock intr. this way using local tsc provides accurate
microtime() measurements. thus gettimeofday test passes now.
otto@ deraadt@ ok

remove IPL_IMP and splimp().

nothing uses spllowersoftclock() anymore

Fix profiled kernel builds on i386 by moving splraise/splx code into macros
permitting non-recursive reuse in mcount.

Should be a no-op for normal builds.

Rewrite intlock/intunlock not to pass around interrupt frame directly
without copying which is against C conventions and broke GENERIC.MP
with a gcc3 optimization
From niklas, tested by many

We need __splbarrier to compile kernel, tho it should be
replaced with a real gcc barrier.

ok deraadt@

debranch SMP, have fun

workaround gcc brokenness by outlining spl functions.
finally solves vfs corruption. hint and ok art@, ok deraadt@

i386 changes to move to ELF. asm cleanup. Change MAXDSIZ to 512M for 1Gsep.
DARPA funded work.

Some people say that "__asm __volatile("")" is not enough.
Use "__asm __volatile("":::"memory")" to completly avoid reordering.

Define an IPL_VM and mark IPL_IMP as "not to be used".

define IPL_STATCLOCK

Implement splassert. Even simpler than on the sparc.

Define placeholders for art's splassert() debugging stuff on all arches.
Currently as no-ops everywhere.

ok art@, deraadt@

First round of __P removal in sys

branches: 1.12.2;
SMALL_KERNEL -> outline splx

remover registers. bracket spl regions with asm volatiles

New try at a level based irq system.

Revert niklas's broken ICU interrupt handling changes; deraadt@ ok

Redo the ICU interrupt handling system to better emulate an APIC system.
This is done by representing the current blockings of interrupts with
a priority level instead of an interrupt mask. This makes it possible to
share implementations for spl* functions/macros between both ICU
and APIC (a must when going MP) systems. In this process, assign
soft interrupts their own levels to match the way things will be on
APIC systems where they actually will be real interrupts and not just
bits in a pending mask as they are now.
Heavily inspired by Bill Studenmunds SMP work in NetBSD

Define splvm() for arches who don't already provide it, with the same
definition as splimp().
art@ ok

$OpenBSD$

Change splsoftclock() to raise the spl, instead of lowering it.
Add spllowersoftclock() for the former behaviour. Update comment. (art@ ok)

branches: 1.4.4;


Some people don't have enough RAM in their PCs and expect swapping to
work.

Fix an array bounds problem with the imask[] array.

From NetBSD; let i386 run audio at a high IPL

splstatclock to splhigh; problem pointed out by gopal

sync

intr_barrier(9) for i386.

Make i386_send_ipi() return void

Nobody uses its return value.

Move grab/release of the kernel_lock for softintrs from the ASM stubs to
softintr_dispatch(). Delete traces of long superseded stats code.

ok beck@ mpi@ uebayasi@

It's been a quarter century: we can assume volatile is present with that name.

ok dlg@ mpi@ deraadt@

N: Thou shalt not call hardclock() with biglock held.

i386 disobeys the Nth commandment. Fix this. While here, make i386 and amd64
definitions of iplclock and statclock match.

ok art@, kettenis@

Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.

Discussed and okay drahn@. Okay deraadt@.

Eliminate x86_multicast_ipi() as unused and broken (doesn't handle #cpu>32).
The i386 version was removed some time ago, so kill its declaration too.
ok tedu@ kettenis@

Convert netisr to a normal soft interrupt instead of hanving MD code
for it. This makes the netisr a real C function which will help further
development. No noticable performance change on i386 and amd64.
With input from kettenis@ and miod@ additional OKs mikeb@ and henning@

Make the i386 APIC code closer to the amd64 version. Many whitespace fixes,
some additional code.

ok toby@, oga@

Switch the softinterrupt code on x86 over to mutexes instead of
simplelocks + splhigh().

First part of making it possible to make mpsafe softinterrupts.

"oh yes, definitely" miod@

Introduce splsoftassert(), similar to splassert() but for soft interrupt
levels. This will allow for platforms where soft interrupt levels do not
map to real hardware interrupt levels to have soft ipl values overlapping
hard ipl values without breaking spl asserts.

Always include machine/cpu.h and remove i82489reg.h/i82489var.h.

ok kettenis@

Move i386 to __HAVE_GENERIC_SOFT_INTERRUPTS

ok dlg@, tested by dlg@, oga@, jsg@, deraadt@

Make ipending per-cpu. Should fix PR 5788.

ok weingart@

Remove some left-overs from the TSC based microtime. We don't need
to synchronize the tsc between CPUs anymore. While here, also remove
the slow TLB IPI since it's been dead for a while.

noticed by mickey
toby@ ok

Replace the overdesigned and overcomplicated tlb shootdown code with
very simple and dumb fast tlb IPI handlers that have in the order of
the same amount of instructions as the old code had function calls.

All TLB shootdowns are reorganized so that we always shoot the,
without looking at PG_U and when we're shooting a range (primarily in
pmap_remove), we shoot the range when there are 32 or less pages in
it, otherwise we just nuke the whole TLB (this might need tweaking if
someone is interested in micro-optimization). The IPIs are not handled
through the normal interrupt vectoring code, they are not blockable
and they only shoot one page or a range of pages or the whole tlb.

This gives a 15% reduction in system time on my dual-core laptop
during a kernel compile and an 18% reduction in real time on a quad
machine doing bulk ports build.

Tested by many, in snaps for a week, no slowdowns reported (although not
everyone is seeing such huge wins).

splassert_ctl defaults to 1 now, so dont wrap the checks for
splassert_ctl > 0 in __predict_false().

ok deraadt@

Introduce a smp aware hw.setperf mechanism, it will scale all CPUs or
cores by the same amount, i.e. if you do hw.setperf=50 both cores will
be scaled to the opearting state corresponing to 50%. Tested by many with
est (mainly on core2duo machines like X60 thinkpads). Only enable est
during GENERIC.MP build no one tested powernow.

ok art@

Make the ast on i386 per-process instead of per-cpu. This makes
signal delivery more reliable in some cases when a process switches
cpu.

kettenis@ ok

Remove duplicated defines from intr.h that are already defined in
intrdefs.h that is inlucded first thing in intr.h.

eyeballed for sanity by pedro@

implement reliable microtime on smp (joint work w/ otto):
send a bcast ipi from the cpu0 to all others to timestamp tsc
on every clock intr. this way using local tsc provides accurate
microtime() measurements. thus gettimeofday test passes now.
otto@ deraadt@ ok

remove IPL_IMP and splimp().

nothing uses spllowersoftclock() anymore

Fix profiled kernel builds on i386 by moving splraise/splx code into macros
permitting non-recursive reuse in mcount.

Should be a no-op for normal builds.

Rewrite intlock/intunlock not to pass around interrupt frame directly
without copying which is against C conventions and broke GENERIC.MP
with a gcc3 optimization
From niklas, tested by many

We need __splbarrier to compile kernel, tho it should be
replaced with a real gcc barrier.

ok deraadt@

debranch SMP, have fun

workaround gcc brokenness by outlining spl functions.
finally solves vfs corruption. hint and ok art@, ok deraadt@

i386 changes to move to ELF. asm cleanup. Change MAXDSIZ to 512M for 1Gsep.
DARPA funded work.

Some people say that "__asm __volatile("")" is not enough.
Use "__asm __volatile("":::"memory")" to completly avoid reordering.

Define an IPL_VM and mark IPL_IMP as "not to be used".

define IPL_STATCLOCK

Implement splassert. Even simpler than on the sparc.

Define placeholders for art's splassert() debugging stuff on all arches.
Currently as no-ops everywhere.

ok art@, deraadt@

First round of __P removal in sys

branches: 1.12.2;
SMALL_KERNEL -> outline splx

remover registers. bracket spl regions with asm volatiles

New try at a level based irq system.

Revert niklas's broken ICU interrupt handling changes; deraadt@ ok

Redo the ICU interrupt handling system to better emulate an APIC system.
This is done by representing the current blockings of interrupts with
a priority level instead of an interrupt mask. This makes it possible to
share implementations for spl* functions/macros between both ICU
and APIC (a must when going MP) systems. In this process, assign
soft interrupts their own levels to match the way things will be on
APIC systems where they actually will be real interrupts and not just
bits in a pending mask as they are now.
Heavily inspired by Bill Studenmunds SMP work in NetBSD

Define splvm() for arches who don't already provide it, with the same
definition as splimp().
art@ ok

$OpenBSD$

Change splsoftclock() to raise the spl, instead of lowering it.
Add spllowersoftclock() for the former behaviour. Update comment. (art@ ok)

branches: 1.4.4;


Some people don't have enough RAM in their PCs and expect swapping to
work.

Fix an array bounds problem with the imask[] array.

From NetBSD; let i386 run audio at a high IPL

splstatclock to splhigh; problem pointed out by gopal

sync