intr.h revision 1.3 
1/*	$NetBSD: intr.h,v 1.5 1996/05/13 06:11:28 mycroft Exp $	*/
2
3/*
4 * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 *    must display the following acknowledgement:
16 *	This product includes software developed by Charles M. Hannum.
17 * 4. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#ifndef _I386_INTR_H_
33#define _I386_INTR_H_
34
35/* Interrupt priority `levels'; not mutually exclusive. */
36#define	IPL_NONE	0	/* nothing */
37#define	IPL_BIO		1	/* block I/O */
38#define	IPL_NET		2	/* network */
39#define	IPL_TTY		3	/* terminal */
40#define	IPL_IMP		4	/* memory allocation */
41#define	IPL_AUDIO	5	/* audio */
42#define	IPL_CLOCK	6	/* clock */
43#define	IPL_HIGH	7	/* everything */
44
45/* Interrupt sharing types. */
46#define	IST_NONE	0	/* none */
47#define	IST_PULSE	1	/* pulsed */
48#define	IST_EDGE	2	/* edge-triggered */
49#define	IST_LEVEL	3	/* level-triggered */
50
51/* Soft interrupt masks. */
52#define	SIR_CLOCK	31
53#define	SIR_CLOCKMASK	((1 << SIR_CLOCK))
54#define	SIR_NET		30
55#define	SIR_NETMASK	((1 << SIR_NET) | SIR_CLOCKMASK)
56#define	SIR_TTY		29
57#define	SIR_TTYMASK	((1 << SIR_TTY) | SIR_CLOCKMASK)
58#define	SIR_ALLMASK	(SIR_CLOCKMASK | SIR_NETMASK | SIR_TTYMASK)
59
60#ifndef _LOCORE
61
62volatile int cpl, ipending, astpending;
63int imask[7];
64
65extern void Xspllower __P((void));
66
67static __inline int splraise __P((int));
68static __inline int spllower __P((int));
69static __inline void splx __P((int));
70static __inline void softintr __P((int));
71
72/*
73 * Add a mask to cpl, and return the old value of cpl.
74 */
75static __inline int
76splraise(ncpl)
77	register int ncpl;
78{
79	register int ocpl = cpl;
80
81	cpl = ocpl | ncpl;
82	return (ocpl);
83}
84
85/*
86 * Restore a value to cpl (unmasking interrupts).  If any unmasked
87 * interrupts are pending, call Xspllower() to process them.
88 */
89static __inline void
90splx(ncpl)
91	register int ncpl;
92{
93
94	cpl = ncpl;
95	if (ipending & ~ncpl)
96		Xspllower();
97}
98
99/*
100 * Same as splx(), but we return the old value of spl, for the
101 * benefit of some splsoftclock() callers.
102 */
103static __inline int
104spllower(ncpl)
105	register int ncpl;
106{
107	register int ocpl = cpl;
108
109	cpl = ncpl;
110	if (ipending & ~ncpl)
111		Xspllower();
112	return (ocpl);
113}
114
115/*
116 * Hardware interrupt masks
117 */
118#define	splbio()	splraise(imask[IPL_BIO])
119#define	splnet()	splraise(imask[IPL_NET])
120#define	spltty()	splraise(imask[IPL_TTY])
121#define	splaudio()	splraise(imask[IPL_AUDIO])
122#define	splclock()	splraise(imask[IPL_CLOCK])
123#define	splstatclock()	splhigh()
124
125/*
126 * Software interrupt masks
127 *
128 * NOTE: splsoftclock() is used by hardclock() to lower the priority from
129 * clock to softclock before it calls softclock().
130 */
131#define	splsoftclock()	spllower(SIR_CLOCKMASK)
132#define	splsoftnet()	splraise(SIR_NETMASK)
133#define	splsofttty()	splraise(SIR_TTYMASK)
134
135/*
136 * Miscellaneous
137 */
138#define	splimp()	splraise(imask[IPL_IMP])
139#define	splhigh()	splraise(imask[IPL_HIGH])
140#define	spl0()		spllower(0)
141
142/*
143 * Software interrupt registration
144 *
145 * We hand-code this to ensure that it's atomic.
146 */
147static __inline void
148softintr(mask)
149	register int mask;
150{
151
152	__asm __volatile("orl %0,_ipending" : : "ir" (mask));
153}
154
155#define	setsoftast()	(astpending = 1)
156#define	setsoftclock()	softintr(1 << SIR_CLOCK)
157#define	setsoftnet()	softintr(1 << SIR_NET)
158#define	setsofttty()	softintr(1 << SIR_TTY)
159
160#endif /* !_LOCORE */
161
162#endif /* !_I386_INTR_H_ */
163