Arrange to update cached LWP credentials in userret() rather than during
syscall/trap entry, eliminating a test+branch on every syscall/trap.

This wasn't possible in the 3.99.x timeframe when l->l_cred came about
because there wasn't a reliable/timely way to force an ONPROC LWP running on
a remote CPU into the kernel (which is just about the only new thing in
this scheme).

Minor style fixes to asm codes. No binary changes.

copy{in,out}{,str}: Drop needless dcbst.

Data cache is purely physical for 40[53] with 16KB pages, and therefore
no need to flush cache before context switch.

This significantly improves copy{in,out} against small data; for example,
bytebench on DHT becomes:

-Pipe Throughput 12440.0 8826.1 7.1
+Pipe Throughput 12440.0 18364.8 14.8

No performance/ATF regression observed on 405. 403 boots successfully
into multiuser mode, and builds some packages.

Work around clang 13.0.0 bug; copy{in,out}() are miscompiled with -O[12],
by which /sbin/init cannot be executed.

Make ibm4xx kernels compiled by clang.

As clang cannot correctly assemble m[ft]pid:
- for asm sources, use m[ft]spr from/to SPR_PID
- for C sources, use M[FT]PID macros (see include/ibm4xx/spr.h)
This is ugly...

No binary changes for GCC-compiled kernels.

copy{in,out}(): Minor clean up:
- No need to supply count (== 0).
- %r0 can be used as %[ctx] and %[len].

copyin(): Remove one more needless mtpid. No regression for full ATF.

copyin(): Fix comment. No binary changes.

copy{in,out}(): Tiny optimizations for __asm codes.
No regressions for full ATF run.

- Use {l,st}swx instead of loop for remaining bytes.
- Drop needless "mtpid %[x]; isync;".

copy{in,out}(): Add missing clobber registers to __asm codes.

copy{in,out}(): Add missing ``if (count == 0) goto done;''.

copy{in,out}(): Consistently use %[tmp] as scratch register. NFC.

copyin(): Fix copy-paste in comment. No binary changes.

copy{in,out}(): Cosmetic changes to __asm codes. No binary changes.

- Editor-friendly indentation.
- One insn per line.
- Group insns with logical blocks.

s/udaddr/uaddr/g for consistency; we use kaddr for kernel data address.
No binary changes.

For IBM_PPC403, emulate unaligned memory access for userland process.

For booke and ibm4xx, switch to software-based single-stepping for PT_STEP
ptrace(2) command from broken hardware-based implementation.

As described in proposal on port-powerpc@,

http://mail-index.netbsd.org/port-powerpc/2021/02/26/msg003597.html

hardware debug facilities of booke and 4xx use critical interrupts, that
are difficult to handle for this purpose; they are not automatically masked
when entering kernel mode via system call trap or hardware interrupt.
See my proposal above for more details.

Now, hardware debug facilities are exclusively usable by kernel itself.
They are much more functional than PSL_SE MSR bit of oea, and should be
useful to, e.g., support byte-granular watchpoint for DDB in the future.

branches: 1.85.2;
For booke and ibm4xx, emulate m[ft]msr in user mode, in the same
manner as oea.

Now, user process can decide by itself whether floating-point
exception triggers SIGFPE or not via fenv(3).

Treat trap instruction from userland correctly in EXC_PGM handler;
raise SIGTRAP with TRAP_BRKPT instead of SIGILL.

- Drop unused opt_altivec.h.
- Include missing opt_ppcarch.h.

Style and cosmetic changes. No binary changes intended.

Try to sanitize usage of isync and sync instructions.

According to reference manuals of 4xx, isync is "context synchronization",
which satisfies both 1 and 2:

1. instructions preceding it complete in the context that existed before it
2. instructions following it complete in the context that exists after it

Whereas sync (== msync for 440) is "execution synchronization", which
satisfies just 1, not 2. At the same time, sync guarantees "storage
synchronization", by which any previous storage references completes
before any subsequent instructions begin to execute.

Tested on 405 over months.

Return correct signo and si_code to userland when page fault.
Taken from powerpc/trap.c. Found by tests in lib/libc/sys.

Return error code from uvm layer on fault, instead of hard-coded 1.
Found by some tests in tests/lib/libc/sys.

Do not try to recovery from data page fault in interrupt context;
catch up belatedly with powerpc/trap.c rev 1.49 and etc.:

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/powerpc/powerpc/trap.c#rev1.49

Tiny improvements to copyin() and copyout():

- Use lwz/stw instead of 4-byte lswi/stswi for 405 and later, which
support unaligned word load/store by hardware. In many cases, both
source and destination are aligned on word boundaries.

- Use dcbst instead of dcbf to flush cache. The former does not
invalidate the cache line. Copied data should be used soon after.

Cosmetic changes for assembler codes. No binary changes.

Comment out badaddr() and badaddr_read() on ibm4xx for now.

They are not used nor exposed externally in any header file; these
functions may have never been tested so far.

Enable them again when necessary.

Note that badaddr() for oea is used by macppc port, where it is
declared as an external function.

Oops, sort header again. My bad...

Convert mi_userret(9) into powerpc-specific userret().

This is necessary in order to support RAS.

There are some sanity checks in userret() as well.

Sort more headers...

Sort headers.

branches: 1.70.4; 1.70.6;
Detangle some of the PowerPC CPU configuration spaghetti.

branches: 1.69.16;
Remove wrong comment which was copy-and-pasted from somewhere.

Remove needless goto's. No functional changes.

branches: 1.67.2; 1.67.4;
src is too big these days to tolerate superfluous apostrophes. It's
"its", people!

Get rid of MDLWP_USED{FPU,VEC}

branches: 1.65.2; 1.65.4;
Add support for PPC FP emulation to BookE.
Pass a ksiginfo_t to fpu_emulation so it can give more detailed
info on signals.

Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.

Remove white-spaces.

branches: 1.62.2; 1.62.6;
Switch to use new common cpu_ast routine.

Use <sys/foo.h> instead of <machine/foo.h> if such a file exists.
Don't assume <sys/cpu.h> includes <powerpc/subarch/cpu*.h>. Include it
explicitly.

Make startlwp and upcallret common instead of having 3 mostly identical copies.

Remove <machine/atomic.h>; use <sys/atomic.h> instead.
Add <powerpc/cpuset.h> (for mpc85xx pmap).
Add some initial MP code for mpc85xx
Rework ipi code to be common across all ppcs
Change PPC to keep curlwp in %r13 while in the kernel.
Move astpending from cpu_info to mdlwp
Improve cpu_need_resched to be more MP friendly.

branches: 1.58.4;
Add support for BookE Freescale MPC85xx (e500 core) processors.
Add fast softint support for PowerPC (though only booke uses it).
Redo FPU/VEC support and add e500 SPE support.
Rework trap/intrs to use a common trapframe format.
Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.

branches: 1.57.2;
Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.

Remove lwp_uc_pool, replace it with kmem(9), plus add some consistency.
As discussed, a while ago, with ad@.

fix copy{in,out}{,str}() to return the error returned by uvm_fault().
fixes PR 41813.

branches: 1.54.2;
Adapt to spr.h breakup.

branches: 1.53.2;
Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.

Remove uarea swap-out functionality:

- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.

Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).

Discussed on <tech-kern>, reviewed by <ad>.

Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)

Remove all the __P() from sys (excluding sys/dist)
Diff checked with grep and MK1 eyeball.
i386 and amd64 GENERIC and sys still build.

branches: 1.49.2; 1.49.8; 1.49.16;
Merge wrstuden-revivesa into HEAD.

branches: 1.48.6; 1.48.10; 1.48.12; 1.48.16;
Merge vmlocking2 to head.

branches: 1.47.2; 1.47.6;
Use lswi/syswi instead of lwz/stw when doing loads/stores since we don't
know the alignment of data being copied. 403 cores have alignment
restrictions on lwz/stw that 405 cores don't have. lswi/syswi benchmark
at the same speed as lwz/stw on a 405 Walnut.

Fixes problems reported by Juergen Hannken-Illjes on the Explora.

Optimize copyin/copyout to transfer as many words as possible before doing
residual bytes. This improves small transfers. As a result, we can avoid
doing bigcopyin/bigcopyout until len>1024 instead of len>256.

Reviewed by: simonb.

(everybody run, Herb's in the kernel again).

branches: 1.45.2;
Don't set l_usrpri / spc_curpriority here. mi_userret() does it.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.43.8; 1.43.10; 1.43.12; 1.43.14;
Merge some of the less invasive changes from the vmlocking branch:

- kthread, callout, devsw API changes
- select()/poll() improvements
- miscellaneous MT safety improvements

Fix for yamt-idlelwp merge.

merge yamt-idlelwp branch. asked by core@. some ports still needs work.

from doc/BRANCHES:

idle lwp, and some changes depending on it.

1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.

branches: 1.40.2; 1.40.4; 1.40.10;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.

branches: 1.39.2;
Make these compile again.

Merge newlock2 to head.

add support for O_DIRECT (I/O directly to application memory,
bypassing any kernel caching for file data).

branches: 1.36.4; 1.36.6;
Use the LWP cached credentials where sane.

- Hold a reference to the process credentials in each struct lwp.
- Update the reference on syscall and user trap if p_cred has changed.
- Collect accounting flags in the LWP, and collate on LWP exit.

include kauth.h for kauth_cred_geteuid.

integrate kauth.

branches: 1.32.2;
adapt to uvm_fault() interface cleanup: kill the useless 3rd argument

branches: 1.31.2;
Syscall debug tracing is handled by trace_enter() / trace_exit(). Change
trace_is_enabled() to return TRUE if SYSCALL_DEBUG is defined, and g/c
all of the SYSCALL_DEBUG handling from individual system call dispatch
routines.

Clean up fallout proc_is_traced_p() change:
- proc_is_traced_p() -> trace_is_enabled(), to match trace_enter() and
trace_exit().
- trace_is_enabled() becomes a real function.
- Remove unnecessary include files from various files that used to care
about KTRACE and SYSTRACE, but do no more.

branches: 1.29.4; 1.29.6; 1.29.8;
bare asm -> __asm

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.26.2;
Appease the -Wshadow and -Wcast-qual gods.

KNF: put "if (...)" and following statement on separate lines.

branches: 1.24.2;
White space nit.

branches: 1.23.4;
Apply suggested changes from PR port-powerpc/24830 arch/powerpc/ibm4xx:
Bad register constraints in copyin(), copyout(), copyinstr(), copyoutstr(),
and delay().

add kernel part of concurrency support for SA on MP systems
- move per VP data into struct sadata_vp referenced from l->l_savp
* VP id
* lock on VP data
* LWP on VP
* recently blocked LWP on VP
* queue of LWPs woken which ran on this VP before sleep
* faultaddr
* LWP cache for upcalls
* upcall queue
- add current concurrency and requested concurrency variables
- make process exit run LWP on all VPs
- make signal delivery consider all VPs
- make timer events consider all VPs
- add sa_newsavp to allocate new sadata_vp structure
- add sa_increaseconcurrency to prepare new VP
- make sys_sa_setconcurrency request new VP or wakeup idle VP
- make sa_yield lower current concurrency
- set sa_cpu = VP id in upcalls
- maintain cached LWPs per VP

deliver SIGSEGV/SEGV_ACCERR if code execution on stack is attempted,
tested by Juergen Hannken-Illjes
(there are more uninitialized ksi.ksi_code arguments)

Reduce code duplication by adding mi_userret() in sys/userret.h
containing signal posting, kernel-exit handling and sa_upcall processing.

XXX the pc532, sparc, sparc64 and vax ports should have their
XXX userret() code rearranged to use this.

* Shuffle some data structures so, and add a flags word to ksiginfo_t.
Right now the only flag is used to indicate if a ksiginfo_t is a
result of a trap. Add a predicate macro to test for this flag.
* Add initialization macros for ksiginfo_t's.
* Add accssor macro for ksi_trap. Expands to 0 if the ksiginfo_t was
not the result of a trap. This matches the sigcontext trapcode semantics.
* In kpsendsig(), use KSI_TRAP_P() to select the lwp that gets the signal.
Inspired by Matthias Drochner's fix to kpsendsig(), but correctly handles
the case of non-trap-generated signals that have a > 0 si_code.

This patch fixes a signal delivery problem with threaded programs noted by
Matthias Drochner on tech-kern.

As discussed on tech-kern. Reviewed and OK's by Christos.

Define ksi.

Add siginfo support for PowerPC.

add MD part of SA/pthread pagefault handling on powerpc

add support for non-executable mappings (where the hardware allows this)
and make the stack and heap non-executable by default. the changes
fall into two basic catagories:

- pmap and trap-handler changes. these are all MD:
= alpha: we already track per-page execute permission with the (software)
PG_EXEC bit, so just have the trap handler pay attention to it.
= i386: use a new GDT segment for %cs for processes that have no
executable mappings above a certain threshold (currently the
bottom of the stack). track per-page execute permission with
the last unused PTE bit.
= powerpc/ibm4xx: just use the hardware exec bit.
= powerpc/oea: we already track per-page exec bits, but the hardware only
implements non-exec mappings at the segment level. so track the
number of executable mappings in each segment and turn on the no-exec
segment bit iff the count is 0. adjust the trap handler to deal.
= sparc (sun4m): fix our use of the hardware protection bits.
fix the trap handler to recognize text faults.
= sparc64: split the existing unified TSB into data and instruction TSBs,
and only load TTEs into the appropriate TSB(s) for the permissions.
fix the trap handler to check for execute permission.
= not yet implemented: amd64, hppa, sh5

- changes in all the emulations that put a signal trampoline on the stack.
instead, we now put the trampoline into a uvm_aobj and map that into
the process separately.

originally from openbsd, adapted for netbsd by me.

__KERNEL_RCSID()

branches: 1.13.2;
Sprinkle some KNF.

Fix some printf formats.

Perform a rototill of the powerpc code. Mandate use of SPRG0 to store
a pointer to current cpu's cpu_info structure. Use cpu_info for
intstk,intr_depth,still_stk,idle_pcb,curpcb,curlwp,etal even on
non-MULTIPROCESSOR machines. Add common macros GET_CPUINFO and
INIT_CPUINFO to get and initialize the cpu_info struct on startup. Make
ibm4xx use the standard <powerpc/frame.h>. Use IFRAME_xx in ibm4xx
trap_subr.S instead of explicit magic offsets. Move INTSTK and SPILLSTK
to std.<platform>. Change faultbuf to a struct instead of an array.

On MPC6XX cpus, stop using the vector page for temporary space and use
reserved space in cpu_info.

Merge the nathanw_sa branch.

branches: 1.9.2;
Statements after labels.

use a completely separate trap handler for syscall traps.
this reduces syscall overhead by 10% to 20% depending on cpu type.

Clean up some white space niggles.

Peform a rototill over the powerpc-based ports.

Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c
Also move softnet, install_extintr, mapiodev, kvtop. Add common BAT
initialization code.

Add user Altivec support.

Fix calls to OF_call_method in macppc/macppc/machdep.c.

Use ci_fpuproc in cpu_info instead of separate fpuproc.

Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.

apply the fix from the powerpc port. this is almost a copy of powerpc/trap.c
and needs to be refactored.

MD systrace gluons.

branches: 1.3.8;
allow writing to write-only mappings. fixes PR 3493.

branches: 1.2.6;
bcopy -> memcpy, bzero -> memset, bcmp -> memcmp.
Reviewed by Matt Thomas, ok'd by Tsubai Masanari.

branches: 1.1.2;
Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.

IBM 4xx series CPU features:
- New pmap and revised trap handler.
- Support on-chip timers, PCI controller, UARTs
- Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
- Add in-kernel PPC floating point emulation
- New in{,4}_cksum that is between 1.5 and 5 times faster than the
old version depending on CPU type.
General changes:
- Kernel support for generic dbsym-style symbols.

Minor style fixes to asm codes. No binary changes.

copy{in,out}{,str}: Drop needless dcbst.

Data cache is purely physical for 40[53] with 16KB pages, and therefore
no need to flush cache before context switch.

This significantly improves copy{in,out} against small data; for example,
bytebench on DHT becomes:

-Pipe Throughput 12440.0 8826.1 7.1
+Pipe Throughput 12440.0 18364.8 14.8

No performance/ATF regression observed on 405. 403 boots successfully
into multiuser mode, and builds some packages.

Work around clang 13.0.0 bug; copy{in,out}() are miscompiled with -O[12],
by which /sbin/init cannot be executed.

Make ibm4xx kernels compiled by clang.

As clang cannot correctly assemble m[ft]pid:
- for asm sources, use m[ft]spr from/to SPR_PID
- for C sources, use M[FT]PID macros (see include/ibm4xx/spr.h)
This is ugly...

No binary changes for GCC-compiled kernels.

copy{in,out}(): Minor clean up:
- No need to supply count (== 0).
- %r0 can be used as %[ctx] and %[len].

copyin(): Remove one more needless mtpid. No regression for full ATF.

copyin(): Fix comment. No binary changes.

copy{in,out}(): Tiny optimizations for __asm codes.
No regressions for full ATF run.

- Use {l,st}swx instead of loop for remaining bytes.
- Drop needless "mtpid %[x]; isync;".

copy{in,out}(): Add missing clobber registers to __asm codes.

copy{in,out}(): Add missing ``if (count == 0) goto done;''.

copy{in,out}(): Consistently use %[tmp] as scratch register. NFC.

copyin(): Fix copy-paste in comment. No binary changes.

copy{in,out}(): Cosmetic changes to __asm codes. No binary changes.

- Editor-friendly indentation.
- One insn per line.
- Group insns with logical blocks.

s/udaddr/uaddr/g for consistency; we use kaddr for kernel data address.
No binary changes.

For IBM_PPC403, emulate unaligned memory access for userland process.

For booke and ibm4xx, switch to software-based single-stepping for PT_STEP
ptrace(2) command from broken hardware-based implementation.

As described in proposal on port-powerpc@,

http://mail-index.netbsd.org/port-powerpc/2021/02/26/msg003597.html

hardware debug facilities of booke and 4xx use critical interrupts, that
are difficult to handle for this purpose; they are not automatically masked
when entering kernel mode via system call trap or hardware interrupt.
See my proposal above for more details.

Now, hardware debug facilities are exclusively usable by kernel itself.
They are much more functional than PSL_SE MSR bit of oea, and should be
useful to, e.g., support byte-granular watchpoint for DDB in the future.

branches: 1.85.2;
For booke and ibm4xx, emulate m[ft]msr in user mode, in the same
manner as oea.

Now, user process can decide by itself whether floating-point
exception triggers SIGFPE or not via fenv(3).

Treat trap instruction from userland correctly in EXC_PGM handler;
raise SIGTRAP with TRAP_BRKPT instead of SIGILL.

- Drop unused opt_altivec.h.
- Include missing opt_ppcarch.h.

Style and cosmetic changes. No binary changes intended.

Try to sanitize usage of isync and sync instructions.

According to reference manuals of 4xx, isync is "context synchronization",
which satisfies both 1 and 2:

1. instructions preceding it complete in the context that existed before it
2. instructions following it complete in the context that exists after it

Whereas sync (== msync for 440) is "execution synchronization", which
satisfies just 1, not 2. At the same time, sync guarantees "storage
synchronization", by which any previous storage references completes
before any subsequent instructions begin to execute.

Tested on 405 over months.

Return correct signo and si_code to userland when page fault.
Taken from powerpc/trap.c. Found by tests in lib/libc/sys.

Return error code from uvm layer on fault, instead of hard-coded 1.
Found by some tests in tests/lib/libc/sys.

Do not try to recovery from data page fault in interrupt context;
catch up belatedly with powerpc/trap.c rev 1.49 and etc.:

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/powerpc/powerpc/trap.c#rev1.49

Tiny improvements to copyin() and copyout():

- Use lwz/stw instead of 4-byte lswi/stswi for 405 and later, which
support unaligned word load/store by hardware. In many cases, both
source and destination are aligned on word boundaries.

- Use dcbst instead of dcbf to flush cache. The former does not
invalidate the cache line. Copied data should be used soon after.

Cosmetic changes for assembler codes. No binary changes.

Comment out badaddr() and badaddr_read() on ibm4xx for now.

They are not used nor exposed externally in any header file; these
functions may have never been tested so far.

Enable them again when necessary.

Note that badaddr() for oea is used by macppc port, where it is
declared as an external function.

Oops, sort header again. My bad...

Convert mi_userret(9) into powerpc-specific userret().

This is necessary in order to support RAS.

There are some sanity checks in userret() as well.

Sort more headers...

Sort headers.

branches: 1.70.4; 1.70.6;
Detangle some of the PowerPC CPU configuration spaghetti.

branches: 1.69.16;
Remove wrong comment which was copy-and-pasted from somewhere.

Remove needless goto's. No functional changes.

branches: 1.67.2; 1.67.4;
src is too big these days to tolerate superfluous apostrophes. It's
"its", people!

Get rid of MDLWP_USED{FPU,VEC}

branches: 1.65.2; 1.65.4;
Add support for PPC FP emulation to BookE.
Pass a ksiginfo_t to fpu_emulation so it can give more detailed
info on signals.

Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.

Remove white-spaces.

branches: 1.62.2; 1.62.6;
Switch to use new common cpu_ast routine.

Use <sys/foo.h> instead of <machine/foo.h> if such a file exists.
Don't assume <sys/cpu.h> includes <powerpc/subarch/cpu*.h>. Include it
explicitly.

Make startlwp and upcallret common instead of having 3 mostly identical copies.

Remove <machine/atomic.h>; use <sys/atomic.h> instead.
Add <powerpc/cpuset.h> (for mpc85xx pmap).
Add some initial MP code for mpc85xx
Rework ipi code to be common across all ppcs
Change PPC to keep curlwp in %r13 while in the kernel.
Move astpending from cpu_info to mdlwp
Improve cpu_need_resched to be more MP friendly.

branches: 1.58.4;
Add support for BookE Freescale MPC85xx (e500 core) processors.
Add fast softint support for PowerPC (though only booke uses it).
Redo FPU/VEC support and add e500 SPE support.
Rework trap/intrs to use a common trapframe format.
Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.

branches: 1.57.2;
Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.

Remove lwp_uc_pool, replace it with kmem(9), plus add some consistency.
As discussed, a while ago, with ad@.

fix copy{in,out}{,str}() to return the error returned by uvm_fault().
fixes PR 41813.

branches: 1.54.2;
Adapt to spr.h breakup.

branches: 1.53.2;
Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.

Remove uarea swap-out functionality:

- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.

Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).

Discussed on <tech-kern>, reviewed by <ad>.

Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)

Remove all the __P() from sys (excluding sys/dist)
Diff checked with grep and MK1 eyeball.
i386 and amd64 GENERIC and sys still build.

branches: 1.49.2; 1.49.8; 1.49.16;
Merge wrstuden-revivesa into HEAD.

branches: 1.48.6; 1.48.10; 1.48.12; 1.48.16;
Merge vmlocking2 to head.

branches: 1.47.2; 1.47.6;
Use lswi/syswi instead of lwz/stw when doing loads/stores since we don't
know the alignment of data being copied. 403 cores have alignment
restrictions on lwz/stw that 405 cores don't have. lswi/syswi benchmark
at the same speed as lwz/stw on a 405 Walnut.

Fixes problems reported by Juergen Hannken-Illjes on the Explora.

Optimize copyin/copyout to transfer as many words as possible before doing
residual bytes. This improves small transfers. As a result, we can avoid
doing bigcopyin/bigcopyout until len>1024 instead of len>256.

Reviewed by: simonb.

(everybody run, Herb's in the kernel again).

branches: 1.45.2;
Don't set l_usrpri / spc_curpriority here. mi_userret() does it.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.43.8; 1.43.10; 1.43.12; 1.43.14;
Merge some of the less invasive changes from the vmlocking branch:

- kthread, callout, devsw API changes
- select()/poll() improvements
- miscellaneous MT safety improvements

Fix for yamt-idlelwp merge.

merge yamt-idlelwp branch. asked by core@. some ports still needs work.

from doc/BRANCHES:

idle lwp, and some changes depending on it.

1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.

branches: 1.40.2; 1.40.4; 1.40.10;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.

branches: 1.39.2;
Make these compile again.

Merge newlock2 to head.

add support for O_DIRECT (I/O directly to application memory,
bypassing any kernel caching for file data).

branches: 1.36.4; 1.36.6;
Use the LWP cached credentials where sane.

- Hold a reference to the process credentials in each struct lwp.
- Update the reference on syscall and user trap if p_cred has changed.
- Collect accounting flags in the LWP, and collate on LWP exit.

include kauth.h for kauth_cred_geteuid.

integrate kauth.

branches: 1.32.2;
adapt to uvm_fault() interface cleanup: kill the useless 3rd argument

branches: 1.31.2;
Syscall debug tracing is handled by trace_enter() / trace_exit(). Change
trace_is_enabled() to return TRUE if SYSCALL_DEBUG is defined, and g/c
all of the SYSCALL_DEBUG handling from individual system call dispatch
routines.

Clean up fallout proc_is_traced_p() change:
- proc_is_traced_p() -> trace_is_enabled(), to match trace_enter() and
trace_exit().
- trace_is_enabled() becomes a real function.
- Remove unnecessary include files from various files that used to care
about KTRACE and SYSTRACE, but do no more.

branches: 1.29.4; 1.29.6; 1.29.8;
bare asm -> __asm

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.26.2;
Appease the -Wshadow and -Wcast-qual gods.

KNF: put "if (...)" and following statement on separate lines.

branches: 1.24.2;
White space nit.

branches: 1.23.4;
Apply suggested changes from PR port-powerpc/24830 arch/powerpc/ibm4xx:
Bad register constraints in copyin(), copyout(), copyinstr(), copyoutstr(),
and delay().

add kernel part of concurrency support for SA on MP systems
- move per VP data into struct sadata_vp referenced from l->l_savp
* VP id
* lock on VP data
* LWP on VP
* recently blocked LWP on VP
* queue of LWPs woken which ran on this VP before sleep
* faultaddr
* LWP cache for upcalls
* upcall queue
- add current concurrency and requested concurrency variables
- make process exit run LWP on all VPs
- make signal delivery consider all VPs
- make timer events consider all VPs
- add sa_newsavp to allocate new sadata_vp structure
- add sa_increaseconcurrency to prepare new VP
- make sys_sa_setconcurrency request new VP or wakeup idle VP
- make sa_yield lower current concurrency
- set sa_cpu = VP id in upcalls
- maintain cached LWPs per VP

deliver SIGSEGV/SEGV_ACCERR if code execution on stack is attempted,
tested by Juergen Hannken-Illjes
(there are more uninitialized ksi.ksi_code arguments)

Reduce code duplication by adding mi_userret() in sys/userret.h
containing signal posting, kernel-exit handling and sa_upcall processing.

XXX the pc532, sparc, sparc64 and vax ports should have their
XXX userret() code rearranged to use this.

* Shuffle some data structures so, and add a flags word to ksiginfo_t.
Right now the only flag is used to indicate if a ksiginfo_t is a
result of a trap. Add a predicate macro to test for this flag.
* Add initialization macros for ksiginfo_t's.
* Add accssor macro for ksi_trap. Expands to 0 if the ksiginfo_t was
not the result of a trap. This matches the sigcontext trapcode semantics.
* In kpsendsig(), use KSI_TRAP_P() to select the lwp that gets the signal.
Inspired by Matthias Drochner's fix to kpsendsig(), but correctly handles
the case of non-trap-generated signals that have a > 0 si_code.

This patch fixes a signal delivery problem with threaded programs noted by
Matthias Drochner on tech-kern.

As discussed on tech-kern. Reviewed and OK's by Christos.

Define ksi.

Add siginfo support for PowerPC.

add MD part of SA/pthread pagefault handling on powerpc

add support for non-executable mappings (where the hardware allows this)
and make the stack and heap non-executable by default. the changes
fall into two basic catagories:

- pmap and trap-handler changes. these are all MD:
= alpha: we already track per-page execute permission with the (software)
PG_EXEC bit, so just have the trap handler pay attention to it.
= i386: use a new GDT segment for %cs for processes that have no
executable mappings above a certain threshold (currently the
bottom of the stack). track per-page execute permission with
the last unused PTE bit.
= powerpc/ibm4xx: just use the hardware exec bit.
= powerpc/oea: we already track per-page exec bits, but the hardware only
implements non-exec mappings at the segment level. so track the
number of executable mappings in each segment and turn on the no-exec
segment bit iff the count is 0. adjust the trap handler to deal.
= sparc (sun4m): fix our use of the hardware protection bits.
fix the trap handler to recognize text faults.
= sparc64: split the existing unified TSB into data and instruction TSBs,
and only load TTEs into the appropriate TSB(s) for the permissions.
fix the trap handler to check for execute permission.
= not yet implemented: amd64, hppa, sh5

- changes in all the emulations that put a signal trampoline on the stack.
instead, we now put the trampoline into a uvm_aobj and map that into
the process separately.

originally from openbsd, adapted for netbsd by me.

__KERNEL_RCSID()

branches: 1.13.2;
Sprinkle some KNF.

Fix some printf formats.

Perform a rototill of the powerpc code. Mandate use of SPRG0 to store
a pointer to current cpu's cpu_info structure. Use cpu_info for
intstk,intr_depth,still_stk,idle_pcb,curpcb,curlwp,etal even on
non-MULTIPROCESSOR machines. Add common macros GET_CPUINFO and
INIT_CPUINFO to get and initialize the cpu_info struct on startup. Make
ibm4xx use the standard <powerpc/frame.h>. Use IFRAME_xx in ibm4xx
trap_subr.S instead of explicit magic offsets. Move INTSTK and SPILLSTK
to std.<platform>. Change faultbuf to a struct instead of an array.

On MPC6XX cpus, stop using the vector page for temporary space and use
reserved space in cpu_info.

Merge the nathanw_sa branch.

branches: 1.9.2;
Statements after labels.

use a completely separate trap handler for syscall traps.
this reduces syscall overhead by 10% to 20% depending on cpu type.

Clean up some white space niggles.

Peform a rototill over the powerpc-based ports.

Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c
Also move softnet, install_extintr, mapiodev, kvtop. Add common BAT
initialization code.

Add user Altivec support.

Fix calls to OF_call_method in macppc/macppc/machdep.c.

Use ci_fpuproc in cpu_info instead of separate fpuproc.

Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.

apply the fix from the powerpc port. this is almost a copy of powerpc/trap.c
and needs to be refactored.

MD systrace gluons.

branches: 1.3.8;
allow writing to write-only mappings. fixes PR 3493.

branches: 1.2.6;
bcopy -> memcpy, bzero -> memset, bcmp -> memcmp.
Reviewed by Matt Thomas, ok'd by Tsubai Masanari.

branches: 1.1.2;
Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.

IBM 4xx series CPU features:
- New pmap and revised trap handler.
- Support on-chip timers, PCI controller, UARTs
- Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
- Add in-kernel PPC floating point emulation
- New in{,4}_cksum that is between 1.5 and 5 times faster than the
old version depending on CPU type.
General changes:
- Kernel support for generic dbsym-style symbols.

Work around clang 13.0.0 bug; copy{in,out}() are miscompiled with -O[12],
by which /sbin/init cannot be executed.

Make ibm4xx kernels compiled by clang.

As clang cannot correctly assemble m[ft]pid:
- for asm sources, use m[ft]spr from/to SPR_PID
- for C sources, use M[FT]PID macros (see include/ibm4xx/spr.h)
This is ugly...

No binary changes for GCC-compiled kernels.

copy{in,out}(): Minor clean up:
- No need to supply count (== 0).
- %r0 can be used as %[ctx] and %[len].

copyin(): Remove one more needless mtpid. No regression for full ATF.

copyin(): Fix comment. No binary changes.

copy{in,out}(): Tiny optimizations for __asm codes.
No regressions for full ATF run.

- Use {l,st}swx instead of loop for remaining bytes.
- Drop needless "mtpid %[x]; isync;".

copy{in,out}(): Add missing clobber registers to __asm codes.

copy{in,out}(): Add missing ``if (count == 0) goto done;''.

copy{in,out}(): Consistently use %[tmp] as scratch register. NFC.

copyin(): Fix copy-paste in comment. No binary changes.

copy{in,out}(): Cosmetic changes to __asm codes. No binary changes.

- Editor-friendly indentation.
- One insn per line.
- Group insns with logical blocks.

s/udaddr/uaddr/g for consistency; we use kaddr for kernel data address.
No binary changes.

For IBM_PPC403, emulate unaligned memory access for userland process.

For booke and ibm4xx, switch to software-based single-stepping for PT_STEP
ptrace(2) command from broken hardware-based implementation.

As described in proposal on port-powerpc@,

http://mail-index.netbsd.org/port-powerpc/2021/02/26/msg003597.html

hardware debug facilities of booke and 4xx use critical interrupts, that
are difficult to handle for this purpose; they are not automatically masked
when entering kernel mode via system call trap or hardware interrupt.
See my proposal above for more details.

Now, hardware debug facilities are exclusively usable by kernel itself.
They are much more functional than PSL_SE MSR bit of oea, and should be
useful to, e.g., support byte-granular watchpoint for DDB in the future.

branches: 1.85.2;
For booke and ibm4xx, emulate m[ft]msr in user mode, in the same
manner as oea.

Now, user process can decide by itself whether floating-point
exception triggers SIGFPE or not via fenv(3).

Treat trap instruction from userland correctly in EXC_PGM handler;
raise SIGTRAP with TRAP_BRKPT instead of SIGILL.

- Drop unused opt_altivec.h.
- Include missing opt_ppcarch.h.

Style and cosmetic changes. No binary changes intended.

Try to sanitize usage of isync and sync instructions.

According to reference manuals of 4xx, isync is "context synchronization",
which satisfies both 1 and 2:

1. instructions preceding it complete in the context that existed before it
2. instructions following it complete in the context that exists after it

Whereas sync (== msync for 440) is "execution synchronization", which
satisfies just 1, not 2. At the same time, sync guarantees "storage
synchronization", by which any previous storage references completes
before any subsequent instructions begin to execute.

Tested on 405 over months.

Return correct signo and si_code to userland when page fault.
Taken from powerpc/trap.c. Found by tests in lib/libc/sys.

Return error code from uvm layer on fault, instead of hard-coded 1.
Found by some tests in tests/lib/libc/sys.

Do not try to recovery from data page fault in interrupt context;
catch up belatedly with powerpc/trap.c rev 1.49 and etc.:

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/powerpc/powerpc/trap.c#rev1.49

Tiny improvements to copyin() and copyout():

- Use lwz/stw instead of 4-byte lswi/stswi for 405 and later, which
support unaligned word load/store by hardware. In many cases, both
source and destination are aligned on word boundaries.

- Use dcbst instead of dcbf to flush cache. The former does not
invalidate the cache line. Copied data should be used soon after.

Cosmetic changes for assembler codes. No binary changes.

Comment out badaddr() and badaddr_read() on ibm4xx for now.

They are not used nor exposed externally in any header file; these
functions may have never been tested so far.

Enable them again when necessary.

Note that badaddr() for oea is used by macppc port, where it is
declared as an external function.

Oops, sort header again. My bad...

Convert mi_userret(9) into powerpc-specific userret().

This is necessary in order to support RAS.

There are some sanity checks in userret() as well.

Sort more headers...

Sort headers.

branches: 1.70.4; 1.70.6;
Detangle some of the PowerPC CPU configuration spaghetti.

branches: 1.69.16;
Remove wrong comment which was copy-and-pasted from somewhere.

Remove needless goto's. No functional changes.

branches: 1.67.2; 1.67.4;
src is too big these days to tolerate superfluous apostrophes. It's
"its", people!

Get rid of MDLWP_USED{FPU,VEC}

branches: 1.65.2; 1.65.4;
Add support for PPC FP emulation to BookE.
Pass a ksiginfo_t to fpu_emulation so it can give more detailed
info on signals.

Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.

Remove white-spaces.

branches: 1.62.2; 1.62.6;
Switch to use new common cpu_ast routine.

Use <sys/foo.h> instead of <machine/foo.h> if such a file exists.
Don't assume <sys/cpu.h> includes <powerpc/subarch/cpu*.h>. Include it
explicitly.

Make startlwp and upcallret common instead of having 3 mostly identical copies.

Remove <machine/atomic.h>; use <sys/atomic.h> instead.
Add <powerpc/cpuset.h> (for mpc85xx pmap).
Add some initial MP code for mpc85xx
Rework ipi code to be common across all ppcs
Change PPC to keep curlwp in %r13 while in the kernel.
Move astpending from cpu_info to mdlwp
Improve cpu_need_resched to be more MP friendly.

branches: 1.58.4;
Add support for BookE Freescale MPC85xx (e500 core) processors.
Add fast softint support for PowerPC (though only booke uses it).
Redo FPU/VEC support and add e500 SPE support.
Rework trap/intrs to use a common trapframe format.
Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.

branches: 1.57.2;
Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.

Remove lwp_uc_pool, replace it with kmem(9), plus add some consistency.
As discussed, a while ago, with ad@.

fix copy{in,out}{,str}() to return the error returned by uvm_fault().
fixes PR 41813.

branches: 1.54.2;
Adapt to spr.h breakup.

branches: 1.53.2;
Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.

Remove uarea swap-out functionality:

- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.

Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).

Discussed on <tech-kern>, reviewed by <ad>.

Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)

Remove all the __P() from sys (excluding sys/dist)
Diff checked with grep and MK1 eyeball.
i386 and amd64 GENERIC and sys still build.

branches: 1.49.2; 1.49.8; 1.49.16;
Merge wrstuden-revivesa into HEAD.

branches: 1.48.6; 1.48.10; 1.48.12; 1.48.16;
Merge vmlocking2 to head.

branches: 1.47.2; 1.47.6;
Use lswi/syswi instead of lwz/stw when doing loads/stores since we don't
know the alignment of data being copied. 403 cores have alignment
restrictions on lwz/stw that 405 cores don't have. lswi/syswi benchmark
at the same speed as lwz/stw on a 405 Walnut.

Fixes problems reported by Juergen Hannken-Illjes on the Explora.

Optimize copyin/copyout to transfer as many words as possible before doing
residual bytes. This improves small transfers. As a result, we can avoid
doing bigcopyin/bigcopyout until len>1024 instead of len>256.

Reviewed by: simonb.

(everybody run, Herb's in the kernel again).

branches: 1.45.2;
Don't set l_usrpri / spc_curpriority here. mi_userret() does it.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.43.8; 1.43.10; 1.43.12; 1.43.14;
Merge some of the less invasive changes from the vmlocking branch:

- kthread, callout, devsw API changes
- select()/poll() improvements
- miscellaneous MT safety improvements

Fix for yamt-idlelwp merge.

merge yamt-idlelwp branch. asked by core@. some ports still needs work.

from doc/BRANCHES:

idle lwp, and some changes depending on it.

1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.

branches: 1.40.2; 1.40.4; 1.40.10;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.

branches: 1.39.2;
Make these compile again.

Merge newlock2 to head.

add support for O_DIRECT (I/O directly to application memory,
bypassing any kernel caching for file data).

branches: 1.36.4; 1.36.6;
Use the LWP cached credentials where sane.

- Hold a reference to the process credentials in each struct lwp.
- Update the reference on syscall and user trap if p_cred has changed.
- Collect accounting flags in the LWP, and collate on LWP exit.

include kauth.h for kauth_cred_geteuid.

integrate kauth.

branches: 1.32.2;
adapt to uvm_fault() interface cleanup: kill the useless 3rd argument

branches: 1.31.2;
Syscall debug tracing is handled by trace_enter() / trace_exit(). Change
trace_is_enabled() to return TRUE if SYSCALL_DEBUG is defined, and g/c
all of the SYSCALL_DEBUG handling from individual system call dispatch
routines.

Clean up fallout proc_is_traced_p() change:
- proc_is_traced_p() -> trace_is_enabled(), to match trace_enter() and
trace_exit().
- trace_is_enabled() becomes a real function.
- Remove unnecessary include files from various files that used to care
about KTRACE and SYSTRACE, but do no more.

branches: 1.29.4; 1.29.6; 1.29.8;
bare asm -> __asm

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.26.2;
Appease the -Wshadow and -Wcast-qual gods.

KNF: put "if (...)" and following statement on separate lines.

branches: 1.24.2;
White space nit.

branches: 1.23.4;
Apply suggested changes from PR port-powerpc/24830 arch/powerpc/ibm4xx:
Bad register constraints in copyin(), copyout(), copyinstr(), copyoutstr(),
and delay().

add kernel part of concurrency support for SA on MP systems
- move per VP data into struct sadata_vp referenced from l->l_savp
* VP id
* lock on VP data
* LWP on VP
* recently blocked LWP on VP
* queue of LWPs woken which ran on this VP before sleep
* faultaddr
* LWP cache for upcalls
* upcall queue
- add current concurrency and requested concurrency variables
- make process exit run LWP on all VPs
- make signal delivery consider all VPs
- make timer events consider all VPs
- add sa_newsavp to allocate new sadata_vp structure
- add sa_increaseconcurrency to prepare new VP
- make sys_sa_setconcurrency request new VP or wakeup idle VP
- make sa_yield lower current concurrency
- set sa_cpu = VP id in upcalls
- maintain cached LWPs per VP

deliver SIGSEGV/SEGV_ACCERR if code execution on stack is attempted,
tested by Juergen Hannken-Illjes
(there are more uninitialized ksi.ksi_code arguments)

Reduce code duplication by adding mi_userret() in sys/userret.h
containing signal posting, kernel-exit handling and sa_upcall processing.

XXX the pc532, sparc, sparc64 and vax ports should have their
XXX userret() code rearranged to use this.

* Shuffle some data structures so, and add a flags word to ksiginfo_t.
Right now the only flag is used to indicate if a ksiginfo_t is a
result of a trap. Add a predicate macro to test for this flag.
* Add initialization macros for ksiginfo_t's.
* Add accssor macro for ksi_trap. Expands to 0 if the ksiginfo_t was
not the result of a trap. This matches the sigcontext trapcode semantics.
* In kpsendsig(), use KSI_TRAP_P() to select the lwp that gets the signal.
Inspired by Matthias Drochner's fix to kpsendsig(), but correctly handles
the case of non-trap-generated signals that have a > 0 si_code.

This patch fixes a signal delivery problem with threaded programs noted by
Matthias Drochner on tech-kern.

As discussed on tech-kern. Reviewed and OK's by Christos.

Define ksi.

Add siginfo support for PowerPC.

add MD part of SA/pthread pagefault handling on powerpc

add support for non-executable mappings (where the hardware allows this)
and make the stack and heap non-executable by default. the changes
fall into two basic catagories:

- pmap and trap-handler changes. these are all MD:
= alpha: we already track per-page execute permission with the (software)
PG_EXEC bit, so just have the trap handler pay attention to it.
= i386: use a new GDT segment for %cs for processes that have no
executable mappings above a certain threshold (currently the
bottom of the stack). track per-page execute permission with
the last unused PTE bit.
= powerpc/ibm4xx: just use the hardware exec bit.
= powerpc/oea: we already track per-page exec bits, but the hardware only
implements non-exec mappings at the segment level. so track the
number of executable mappings in each segment and turn on the no-exec
segment bit iff the count is 0. adjust the trap handler to deal.
= sparc (sun4m): fix our use of the hardware protection bits.
fix the trap handler to recognize text faults.
= sparc64: split the existing unified TSB into data and instruction TSBs,
and only load TTEs into the appropriate TSB(s) for the permissions.
fix the trap handler to check for execute permission.
= not yet implemented: amd64, hppa, sh5

- changes in all the emulations that put a signal trampoline on the stack.
instead, we now put the trampoline into a uvm_aobj and map that into
the process separately.

originally from openbsd, adapted for netbsd by me.

__KERNEL_RCSID()

branches: 1.13.2;
Sprinkle some KNF.

Fix some printf formats.

Perform a rototill of the powerpc code. Mandate use of SPRG0 to store
a pointer to current cpu's cpu_info structure. Use cpu_info for
intstk,intr_depth,still_stk,idle_pcb,curpcb,curlwp,etal even on
non-MULTIPROCESSOR machines. Add common macros GET_CPUINFO and
INIT_CPUINFO to get and initialize the cpu_info struct on startup. Make
ibm4xx use the standard <powerpc/frame.h>. Use IFRAME_xx in ibm4xx
trap_subr.S instead of explicit magic offsets. Move INTSTK and SPILLSTK
to std.<platform>. Change faultbuf to a struct instead of an array.

On MPC6XX cpus, stop using the vector page for temporary space and use
reserved space in cpu_info.

Merge the nathanw_sa branch.

branches: 1.9.2;
Statements after labels.

use a completely separate trap handler for syscall traps.
this reduces syscall overhead by 10% to 20% depending on cpu type.

Clean up some white space niggles.

Peform a rototill over the powerpc-based ports.

Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c
Also move softnet, install_extintr, mapiodev, kvtop. Add common BAT
initialization code.

Add user Altivec support.

Fix calls to OF_call_method in macppc/macppc/machdep.c.

Use ci_fpuproc in cpu_info instead of separate fpuproc.

Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.

apply the fix from the powerpc port. this is almost a copy of powerpc/trap.c
and needs to be refactored.

MD systrace gluons.

branches: 1.3.8;
allow writing to write-only mappings. fixes PR 3493.

branches: 1.2.6;
bcopy -> memcpy, bzero -> memset, bcmp -> memcmp.
Reviewed by Matt Thomas, ok'd by Tsubai Masanari.

branches: 1.1.2;
Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.

IBM 4xx series CPU features:
- New pmap and revised trap handler.
- Support on-chip timers, PCI controller, UARTs
- Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
- Add in-kernel PPC floating point emulation
- New in{,4}_cksum that is between 1.5 and 5 times faster than the
old version depending on CPU type.
General changes:
- Kernel support for generic dbsym-style symbols.

copyin(): Fix comment. No binary changes.

copy{in,out}(): Tiny optimizations for __asm codes.
No regressions for full ATF run.

- Use {l,st}swx instead of loop for remaining bytes.
- Drop needless "mtpid %[x]; isync;".

copy{in,out}(): Add missing clobber registers to __asm codes.

copy{in,out}(): Add missing ``if (count == 0) goto done;''.

copy{in,out}(): Consistently use %[tmp] as scratch register. NFC.

copyin(): Fix copy-paste in comment. No binary changes.

copy{in,out}(): Cosmetic changes to __asm codes. No binary changes.

- Editor-friendly indentation.
- One insn per line.
- Group insns with logical blocks.

s/udaddr/uaddr/g for consistency; we use kaddr for kernel data address.
No binary changes.

For IBM_PPC403, emulate unaligned memory access for userland process.

For booke and ibm4xx, switch to software-based single-stepping for PT_STEP
ptrace(2) command from broken hardware-based implementation.

As described in proposal on port-powerpc@,

http://mail-index.netbsd.org/port-powerpc/2021/02/26/msg003597.html

hardware debug facilities of booke and 4xx use critical interrupts, that
are difficult to handle for this purpose; they are not automatically masked
when entering kernel mode via system call trap or hardware interrupt.
See my proposal above for more details.

Now, hardware debug facilities are exclusively usable by kernel itself.
They are much more functional than PSL_SE MSR bit of oea, and should be
useful to, e.g., support byte-granular watchpoint for DDB in the future.

branches: 1.85.2;
For booke and ibm4xx, emulate m[ft]msr in user mode, in the same
manner as oea.

Now, user process can decide by itself whether floating-point
exception triggers SIGFPE or not via fenv(3).

Treat trap instruction from userland correctly in EXC_PGM handler;
raise SIGTRAP with TRAP_BRKPT instead of SIGILL.

- Drop unused opt_altivec.h.
- Include missing opt_ppcarch.h.

Style and cosmetic changes. No binary changes intended.

Try to sanitize usage of isync and sync instructions.

According to reference manuals of 4xx, isync is "context synchronization",
which satisfies both 1 and 2:

1. instructions preceding it complete in the context that existed before it
2. instructions following it complete in the context that exists after it

Whereas sync (== msync for 440) is "execution synchronization", which
satisfies just 1, not 2. At the same time, sync guarantees "storage
synchronization", by which any previous storage references completes
before any subsequent instructions begin to execute.

Tested on 405 over months.

Return correct signo and si_code to userland when page fault.
Taken from powerpc/trap.c. Found by tests in lib/libc/sys.

Return error code from uvm layer on fault, instead of hard-coded 1.
Found by some tests in tests/lib/libc/sys.

Do not try to recovery from data page fault in interrupt context;
catch up belatedly with powerpc/trap.c rev 1.49 and etc.:

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/powerpc/powerpc/trap.c#rev1.49

Tiny improvements to copyin() and copyout():

- Use lwz/stw instead of 4-byte lswi/stswi for 405 and later, which
support unaligned word load/store by hardware. In many cases, both
source and destination are aligned on word boundaries.

- Use dcbst instead of dcbf to flush cache. The former does not
invalidate the cache line. Copied data should be used soon after.

Cosmetic changes for assembler codes. No binary changes.

Comment out badaddr() and badaddr_read() on ibm4xx for now.

They are not used nor exposed externally in any header file; these
functions may have never been tested so far.

Enable them again when necessary.

Note that badaddr() for oea is used by macppc port, where it is
declared as an external function.

Oops, sort header again. My bad...

Convert mi_userret(9) into powerpc-specific userret().

This is necessary in order to support RAS.

There are some sanity checks in userret() as well.

Sort more headers...

Sort headers.

branches: 1.70.4; 1.70.6;
Detangle some of the PowerPC CPU configuration spaghetti.

branches: 1.69.16;
Remove wrong comment which was copy-and-pasted from somewhere.

Remove needless goto's. No functional changes.

branches: 1.67.2; 1.67.4;
src is too big these days to tolerate superfluous apostrophes. It's
"its", people!

Get rid of MDLWP_USED{FPU,VEC}

branches: 1.65.2; 1.65.4;
Add support for PPC FP emulation to BookE.
Pass a ksiginfo_t to fpu_emulation so it can give more detailed
info on signals.

Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.

Remove white-spaces.

branches: 1.62.2; 1.62.6;
Switch to use new common cpu_ast routine.

Use <sys/foo.h> instead of <machine/foo.h> if such a file exists.
Don't assume <sys/cpu.h> includes <powerpc/subarch/cpu*.h>. Include it
explicitly.

Make startlwp and upcallret common instead of having 3 mostly identical copies.

Remove <machine/atomic.h>; use <sys/atomic.h> instead.
Add <powerpc/cpuset.h> (for mpc85xx pmap).
Add some initial MP code for mpc85xx
Rework ipi code to be common across all ppcs
Change PPC to keep curlwp in %r13 while in the kernel.
Move astpending from cpu_info to mdlwp
Improve cpu_need_resched to be more MP friendly.

branches: 1.58.4;
Add support for BookE Freescale MPC85xx (e500 core) processors.
Add fast softint support for PowerPC (though only booke uses it).
Redo FPU/VEC support and add e500 SPE support.
Rework trap/intrs to use a common trapframe format.
Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.

branches: 1.57.2;
Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.

Remove lwp_uc_pool, replace it with kmem(9), plus add some consistency.
As discussed, a while ago, with ad@.

fix copy{in,out}{,str}() to return the error returned by uvm_fault().
fixes PR 41813.

branches: 1.54.2;
Adapt to spr.h breakup.

branches: 1.53.2;
Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.

Remove uarea swap-out functionality:

- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.

Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).

Discussed on <tech-kern>, reviewed by <ad>.

Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)

Remove all the __P() from sys (excluding sys/dist)
Diff checked with grep and MK1 eyeball.
i386 and amd64 GENERIC and sys still build.

branches: 1.49.2; 1.49.8; 1.49.16;
Merge wrstuden-revivesa into HEAD.

branches: 1.48.6; 1.48.10; 1.48.12; 1.48.16;
Merge vmlocking2 to head.

branches: 1.47.2; 1.47.6;
Use lswi/syswi instead of lwz/stw when doing loads/stores since we don't
know the alignment of data being copied. 403 cores have alignment
restrictions on lwz/stw that 405 cores don't have. lswi/syswi benchmark
at the same speed as lwz/stw on a 405 Walnut.

Fixes problems reported by Juergen Hannken-Illjes on the Explora.

Optimize copyin/copyout to transfer as many words as possible before doing
residual bytes. This improves small transfers. As a result, we can avoid
doing bigcopyin/bigcopyout until len>1024 instead of len>256.

Reviewed by: simonb.

(everybody run, Herb's in the kernel again).

branches: 1.45.2;
Don't set l_usrpri / spc_curpriority here. mi_userret() does it.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.43.8; 1.43.10; 1.43.12; 1.43.14;
Merge some of the less invasive changes from the vmlocking branch:

- kthread, callout, devsw API changes
- select()/poll() improvements
- miscellaneous MT safety improvements

Fix for yamt-idlelwp merge.

merge yamt-idlelwp branch. asked by core@. some ports still needs work.

from doc/BRANCHES:

idle lwp, and some changes depending on it.

1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.

branches: 1.40.2; 1.40.4; 1.40.10;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.

branches: 1.39.2;
Make these compile again.

Merge newlock2 to head.

add support for O_DIRECT (I/O directly to application memory,
bypassing any kernel caching for file data).

branches: 1.36.4; 1.36.6;
Use the LWP cached credentials where sane.

- Hold a reference to the process credentials in each struct lwp.
- Update the reference on syscall and user trap if p_cred has changed.
- Collect accounting flags in the LWP, and collate on LWP exit.

include kauth.h for kauth_cred_geteuid.

integrate kauth.

branches: 1.32.2;
adapt to uvm_fault() interface cleanup: kill the useless 3rd argument

branches: 1.31.2;
Syscall debug tracing is handled by trace_enter() / trace_exit(). Change
trace_is_enabled() to return TRUE if SYSCALL_DEBUG is defined, and g/c
all of the SYSCALL_DEBUG handling from individual system call dispatch
routines.

Clean up fallout proc_is_traced_p() change:
- proc_is_traced_p() -> trace_is_enabled(), to match trace_enter() and
trace_exit().
- trace_is_enabled() becomes a real function.
- Remove unnecessary include files from various files that used to care
about KTRACE and SYSTRACE, but do no more.

branches: 1.29.4; 1.29.6; 1.29.8;
bare asm -> __asm

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.26.2;
Appease the -Wshadow and -Wcast-qual gods.

KNF: put "if (...)" and following statement on separate lines.

branches: 1.24.2;
White space nit.

branches: 1.23.4;
Apply suggested changes from PR port-powerpc/24830 arch/powerpc/ibm4xx:
Bad register constraints in copyin(), copyout(), copyinstr(), copyoutstr(),
and delay().

add kernel part of concurrency support for SA on MP systems
- move per VP data into struct sadata_vp referenced from l->l_savp
* VP id
* lock on VP data
* LWP on VP
* recently blocked LWP on VP
* queue of LWPs woken which ran on this VP before sleep
* faultaddr
* LWP cache for upcalls
* upcall queue
- add current concurrency and requested concurrency variables
- make process exit run LWP on all VPs
- make signal delivery consider all VPs
- make timer events consider all VPs
- add sa_newsavp to allocate new sadata_vp structure
- add sa_increaseconcurrency to prepare new VP
- make sys_sa_setconcurrency request new VP or wakeup idle VP
- make sa_yield lower current concurrency
- set sa_cpu = VP id in upcalls
- maintain cached LWPs per VP

deliver SIGSEGV/SEGV_ACCERR if code execution on stack is attempted,
tested by Juergen Hannken-Illjes
(there are more uninitialized ksi.ksi_code arguments)

Reduce code duplication by adding mi_userret() in sys/userret.h
containing signal posting, kernel-exit handling and sa_upcall processing.

XXX the pc532, sparc, sparc64 and vax ports should have their
XXX userret() code rearranged to use this.

* Shuffle some data structures so, and add a flags word to ksiginfo_t.
Right now the only flag is used to indicate if a ksiginfo_t is a
result of a trap. Add a predicate macro to test for this flag.
* Add initialization macros for ksiginfo_t's.
* Add accssor macro for ksi_trap. Expands to 0 if the ksiginfo_t was
not the result of a trap. This matches the sigcontext trapcode semantics.
* In kpsendsig(), use KSI_TRAP_P() to select the lwp that gets the signal.
Inspired by Matthias Drochner's fix to kpsendsig(), but correctly handles
the case of non-trap-generated signals that have a > 0 si_code.

This patch fixes a signal delivery problem with threaded programs noted by
Matthias Drochner on tech-kern.

As discussed on tech-kern. Reviewed and OK's by Christos.

Define ksi.

Add siginfo support for PowerPC.

add MD part of SA/pthread pagefault handling on powerpc

add support for non-executable mappings (where the hardware allows this)
and make the stack and heap non-executable by default. the changes
fall into two basic catagories:

- pmap and trap-handler changes. these are all MD:
= alpha: we already track per-page execute permission with the (software)
PG_EXEC bit, so just have the trap handler pay attention to it.
= i386: use a new GDT segment for %cs for processes that have no
executable mappings above a certain threshold (currently the
bottom of the stack). track per-page execute permission with
the last unused PTE bit.
= powerpc/ibm4xx: just use the hardware exec bit.
= powerpc/oea: we already track per-page exec bits, but the hardware only
implements non-exec mappings at the segment level. so track the
number of executable mappings in each segment and turn on the no-exec
segment bit iff the count is 0. adjust the trap handler to deal.
= sparc (sun4m): fix our use of the hardware protection bits.
fix the trap handler to recognize text faults.
= sparc64: split the existing unified TSB into data and instruction TSBs,
and only load TTEs into the appropriate TSB(s) for the permissions.
fix the trap handler to check for execute permission.
= not yet implemented: amd64, hppa, sh5

- changes in all the emulations that put a signal trampoline on the stack.
instead, we now put the trampoline into a uvm_aobj and map that into
the process separately.

originally from openbsd, adapted for netbsd by me.

__KERNEL_RCSID()

branches: 1.13.2;
Sprinkle some KNF.

Fix some printf formats.

Perform a rototill of the powerpc code. Mandate use of SPRG0 to store
a pointer to current cpu's cpu_info structure. Use cpu_info for
intstk,intr_depth,still_stk,idle_pcb,curpcb,curlwp,etal even on
non-MULTIPROCESSOR machines. Add common macros GET_CPUINFO and
INIT_CPUINFO to get and initialize the cpu_info struct on startup. Make
ibm4xx use the standard <powerpc/frame.h>. Use IFRAME_xx in ibm4xx
trap_subr.S instead of explicit magic offsets. Move INTSTK and SPILLSTK
to std.<platform>. Change faultbuf to a struct instead of an array.

On MPC6XX cpus, stop using the vector page for temporary space and use
reserved space in cpu_info.

Merge the nathanw_sa branch.

branches: 1.9.2;
Statements after labels.

use a completely separate trap handler for syscall traps.
this reduces syscall overhead by 10% to 20% depending on cpu type.

Clean up some white space niggles.

Peform a rototill over the powerpc-based ports.

Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c
Also move softnet, install_extintr, mapiodev, kvtop. Add common BAT
initialization code.

Add user Altivec support.

Fix calls to OF_call_method in macppc/macppc/machdep.c.

Use ci_fpuproc in cpu_info instead of separate fpuproc.

Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.

apply the fix from the powerpc port. this is almost a copy of powerpc/trap.c
and needs to be refactored.

MD systrace gluons.

branches: 1.3.8;
allow writing to write-only mappings. fixes PR 3493.

branches: 1.2.6;
bcopy -> memcpy, bzero -> memset, bcmp -> memcmp.
Reviewed by Matt Thomas, ok'd by Tsubai Masanari.

branches: 1.1.2;
Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.

IBM 4xx series CPU features:
- New pmap and revised trap handler.
- Support on-chip timers, PCI controller, UARTs
- Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
- Add in-kernel PPC floating point emulation
- New in{,4}_cksum that is between 1.5 and 5 times faster than the
old version depending on CPU type.
General changes:
- Kernel support for generic dbsym-style symbols.

For IBM_PPC403, emulate unaligned memory access for userland process.

For booke and ibm4xx, switch to software-based single-stepping for PT_STEP
ptrace(2) command from broken hardware-based implementation.

As described in proposal on port-powerpc@,

http://mail-index.netbsd.org/port-powerpc/2021/02/26/msg003597.html

hardware debug facilities of booke and 4xx use critical interrupts, that
are difficult to handle for this purpose; they are not automatically masked
when entering kernel mode via system call trap or hardware interrupt.
See my proposal above for more details.

Now, hardware debug facilities are exclusively usable by kernel itself.
They are much more functional than PSL_SE MSR bit of oea, and should be
useful to, e.g., support byte-granular watchpoint for DDB in the future.

branches: 1.85.2;
For booke and ibm4xx, emulate m[ft]msr in user mode, in the same
manner as oea.

Now, user process can decide by itself whether floating-point
exception triggers SIGFPE or not via fenv(3).

Treat trap instruction from userland correctly in EXC_PGM handler;
raise SIGTRAP with TRAP_BRKPT instead of SIGILL.