trap.c revision 1.80
1/* $NetBSD: trap.c,v 1.80 2020/06/19 07:24:41 rin Exp $ */ 2 3/* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38/* 39 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 40 * Copyright (C) 1995, 1996 TooLs GmbH. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by TooLs GmbH. 54 * 4. The name of TooLs GmbH may not be used to endorse or promote products 55 * derived from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 60 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 62 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 63 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 64 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 65 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 66 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 67 */ 68 69#include <sys/cdefs.h> 70__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.80 2020/06/19 07:24:41 rin Exp $"); 71 72#include "opt_altivec.h" 73#include "opt_ddb.h" 74#include "opt_kgdb.h" 75 76#define __UFETCHSTORE_PRIVATE 77 78#include <sys/param.h> 79#include <sys/cpu.h> 80#include <sys/kauth.h> 81#include <sys/proc.h> 82#include <sys/reboot.h> 83#include <sys/syscall.h> 84#include <sys/systm.h> 85 86#if defined(KGDB) 87#include <sys/kgdb.h> 88#endif 89 90#include <uvm/uvm_extern.h> 91 92#include <dev/cons.h> 93 94#include <machine/fpu.h> 95#include <machine/frame.h> 96#include <machine/pcb.h> 97#include <machine/psl.h> 98#include <machine/trap.h> 99 100#include <powerpc/db_machdep.h> 101#include <powerpc/spr.h> 102#include <powerpc/userret.h> 103 104#include <powerpc/ibm4xx/cpu.h> 105#include <powerpc/ibm4xx/pmap.h> 106#include <powerpc/ibm4xx/spr.h> 107#include <powerpc/ibm4xx/tlb.h> 108 109#include <powerpc/fpu/fpu_extern.h> 110 111/* These definitions should probably be somewhere else XXX */ 112#define FIRSTARG 3 /* first argument is in reg 3 */ 113#define NARGREG 8 /* 8 args are in registers */ 114#define MOREARGS(sp) ((void *)((int)(sp) + 8)) /* more args go here */ 115 116static int fix_unaligned(struct lwp *l, struct trapframe *tf); 117 118void trap(struct trapframe *); /* Called from locore / trap_subr */ 119#if 0 120/* Not currently used nor exposed externally in any header file */ 121int badaddr(void *, size_t); 122int badaddr_read(void *, size_t, int *); 123#endif 124int ctx_setup(int, int); 125 126#ifdef DEBUG 127#define TDB_ALL 0x1 128int trapdebug = /* TDB_ALL */ 0; 129#define DBPRINTF(x, y) if (trapdebug & (x)) printf y 130#else 131#define DBPRINTF(x, y) 132#endif 133 134void 135trap(struct trapframe *tf) 136{ 137 struct lwp *l = curlwp; 138 struct proc *p = l->l_proc; 139 struct pcb *pcb; 140 int type = tf->tf_exc; 141 int ftype, rv; 142 ksiginfo_t ksi; 143 144 KASSERT(l->l_stat == LSONPROC); 145 146 if (tf->tf_srr1 & PSL_PR) { 147 LWP_CACHE_CREDS(l, p); 148 type |= EXC_USER; 149 } 150 151 ftype = VM_PROT_READ; 152 153 DBPRINTF(TDB_ALL, ("trap(%x) at %lx from frame %p &frame %p\n", 154 type, tf->tf_srr0, tf, &tf)); 155 156 switch (type) { 157 case EXC_DEBUG|EXC_USER: 158 { 159 int srr2, srr3; 160 161 __asm volatile("mfspr %0,0x3f0" : 162 "=r" (rv), "=r" (srr2), "=r" (srr3) :); 163 printf("debug reg is %x srr2 %x srr3 %x\n", rv, srr2, 164 srr3); 165 /* XXX fall through or break here?! */ 166 } 167 /* 168 * DEBUG intr -- probably single-step. 169 */ 170 case EXC_TRC|EXC_USER: 171 tf->tf_srr1 &= ~PSL_SE; 172 KSI_INIT_TRAP(&ksi); 173 ksi.ksi_signo = SIGTRAP; 174 ksi.ksi_trap = EXC_TRC; 175 ksi.ksi_addr = (void *)tf->tf_srr0; 176 trapsignal(l, &ksi); 177 break; 178 179 case EXC_DSI: 180 /* FALLTHROUGH */ 181 case EXC_DTMISS: 182 { 183 struct vm_map *map; 184 vaddr_t va; 185 struct faultbuf *fb; 186 187 pcb = lwp_getpcb(l); 188 fb = pcb->pcb_onfault; 189 190 if (curcpu()->ci_idepth >= 0) { 191 rv = EFAULT; 192 goto out; 193 } 194 195 va = tf->tf_dear; 196 if (tf->tf_pid == KERNEL_PID) { 197 map = kernel_map; 198 } else { 199 map = &p->p_vmspace->vm_map; 200 } 201 202 if (tf->tf_esr & (ESR_DST|ESR_DIZ)) 203 ftype = VM_PROT_WRITE; 204 205 DBPRINTF(TDB_ALL, 206 ("trap(EXC_DSI) at %lx %s fault on %p esr %x\n", 207 tf->tf_srr0, 208 (ftype & VM_PROT_WRITE) ? "write" : "read", 209 (void *)va, tf->tf_esr)); 210 211 pcb->pcb_onfault = NULL; 212 rv = uvm_fault(map, trunc_page(va), ftype); 213 pcb->pcb_onfault = fb; 214 if (rv == 0) 215 return; 216out: 217 if (fb != NULL) { 218 tf->tf_pid = KERNEL_PID; 219 tf->tf_srr0 = fb->fb_pc; 220 tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */ 221 tf->tf_cr = fb->fb_cr; 222 tf->tf_fixreg[1] = fb->fb_sp; 223 tf->tf_fixreg[2] = fb->fb_r2; 224 tf->tf_fixreg[3] = rv; 225 memcpy(&tf->tf_fixreg[13], fb->fb_fixreg, 226 sizeof(fb->fb_fixreg)); 227 return; 228 } 229 } 230 goto brain_damage; 231 232 case EXC_DSI|EXC_USER: 233 /* FALLTHROUGH */ 234 case EXC_DTMISS|EXC_USER: 235 if (tf->tf_esr & (ESR_DST|ESR_DIZ)) 236 ftype = VM_PROT_WRITE; 237 238 DBPRINTF(TDB_ALL, 239 ("trap(EXC_DSI|EXC_USER) at %lx %s fault on %lx %x\n", 240 tf->tf_srr0, (ftype & VM_PROT_WRITE) ? "write" : "read", 241 tf->tf_dear, tf->tf_esr)); 242 KASSERT(l == curlwp && (l->l_stat == LSONPROC)); 243// KASSERT(curpcb->pcb_onfault == NULL); 244 rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(tf->tf_dear), 245 ftype); 246 if (rv == 0) { 247 break; 248 } 249 KSI_INIT_TRAP(&ksi); 250 ksi.ksi_trap = EXC_DSI; 251 ksi.ksi_addr = (void *)tf->tf_dear; 252vm_signal: 253 switch (rv) { 254 case EINVAL: 255 ksi.ksi_signo = SIGBUS; 256 ksi.ksi_code = BUS_ADRERR; 257 break; 258 case EACCES: 259 ksi.ksi_signo = SIGSEGV; 260 ksi.ksi_code = SEGV_ACCERR; 261 break; 262 case ENOMEM: 263 ksi.ksi_signo = SIGKILL; 264 printf("UVM: pid %d.%d (%s), uid %d killed: " 265 "out of swap\n", p->p_pid, l->l_lid, p->p_comm, 266 l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1); 267 break; 268 default: 269 ksi.ksi_signo = SIGSEGV; 270 ksi.ksi_code = SEGV_MAPERR; 271 break; 272 } 273 trapsignal(l, &ksi); 274 break; 275 276 case EXC_ITMISS|EXC_USER: 277 case EXC_ISI|EXC_USER: 278 ftype = VM_PROT_EXECUTE; 279 DBPRINTF(TDB_ALL, 280 ("trap(EXC_ISI|EXC_USER) at %lx execute fault tf %p\n", 281 tf->tf_srr0, tf)); 282// KASSERT(curpcb->pcb_onfault == NULL); 283 rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(tf->tf_srr0), 284 ftype); 285 if (rv == 0) { 286 break; 287 } 288 KSI_INIT_TRAP(&ksi); 289 ksi.ksi_trap = EXC_ISI; 290 ksi.ksi_addr = (void *)tf->tf_srr0; 291 goto vm_signal; 292 break; 293 294 case EXC_AST|EXC_USER: 295 cpu_ast(l, curcpu()); 296 break; 297 298 case EXC_ALI|EXC_USER: 299 if (fix_unaligned(l, tf) != 0) { 300 KSI_INIT_TRAP(&ksi); 301 ksi.ksi_signo = SIGBUS; 302 ksi.ksi_trap = EXC_ALI; 303 ksi.ksi_addr = (void *)tf->tf_dear; 304 trapsignal(l, &ksi); 305 } else 306 tf->tf_srr0 += 4; 307 break; 308 309 case EXC_PGM|EXC_USER: 310 /* 311 * Illegal insn: 312 * 313 * let's try to see if its FPU and can be emulated. 314 */ 315 curcpu()->ci_data.cpu_ntrap++; 316 pcb = lwp_getpcb(l); 317 318 if (__predict_false(!fpu_used_p(l))) { 319 memset(&pcb->pcb_fpu, 0, sizeof(pcb->pcb_fpu)); 320 fpu_mark_used(l); 321 } 322 323 if (fpu_emulate(tf, &pcb->pcb_fpu, &ksi)) { 324 if (ksi.ksi_signo == 0) /* was emulated */ 325 break; 326 } else { 327 ksi.ksi_signo = SIGILL; 328 ksi.ksi_code = ILL_ILLOPC; 329 ksi.ksi_trap = EXC_PGM; 330 ksi.ksi_addr = (void *)tf->tf_srr0; 331 } 332 333 trapsignal(l, &ksi); 334 break; 335 336 case EXC_MCHK: 337 { 338 struct faultbuf *fb; 339 340 pcb = lwp_getpcb(l); 341 if ((fb = pcb->pcb_onfault) != NULL) { 342 tf->tf_pid = KERNEL_PID; 343 tf->tf_srr0 = fb->fb_pc; 344 tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */ 345 tf->tf_fixreg[1] = fb->fb_sp; 346 tf->tf_fixreg[2] = fb->fb_r2; 347 tf->tf_fixreg[3] = 1; /* Return TRUE */ 348 tf->tf_cr = fb->fb_cr; 349 memcpy(&tf->tf_fixreg[13], fb->fb_fixreg, 350 sizeof(fb->fb_fixreg)); 351 return; 352 } 353 } 354 goto brain_damage; 355 356 default: 357brain_damage: 358 printf("trap type 0x%x at 0x%lx\n", type, tf->tf_srr0); 359#if defined(DDB) || defined(KGDB) 360 if (kdb_trap(type, tf)) 361 return; 362#endif 363#ifdef TRAP_PANICWAIT 364 printf("Press a key to panic.\n"); 365 cngetc(); 366#endif 367 panic("trap"); 368 } 369 370 /* Invoke powerpc userret code */ 371 userret(l, tf); 372} 373 374int 375ctx_setup(int ctx, int srr1) 376{ 377 volatile struct pmap *pm; 378 379 /* Update PID if we're returning to user mode. */ 380 if (srr1 & PSL_PR) { 381 pm = curproc->p_vmspace->vm_map.pmap; 382 if (!pm->pm_ctx) { 383 ctx_alloc(__UNVOLATILE(pm)); 384 } 385 ctx = pm->pm_ctx; 386 if (srr1 & PSL_SE) { 387 int dbreg, mask = 0x48000000; 388 /* 389 * Set the Internal Debug and 390 * Instruction Completion bits of 391 * the DBCR0 register. 392 * 393 * XXX this is also used by jtag debuggers... 394 */ 395 __asm volatile("mfspr %0,0x3f2;" 396 "or %0,%0,%1;" 397 "mtspr 0x3f2,%0;" : 398 "=&r" (dbreg) : "r" (mask)); 399 } 400 } 401 else if (!ctx) { 402 ctx = KERNEL_PID; 403 } 404 return (ctx); 405} 406 407/* 408 * Used by copyin()/copyout() 409 */ 410extern vaddr_t vmaprange(struct proc *, vaddr_t, vsize_t, int); 411extern void vunmaprange(vaddr_t, vsize_t); 412static int bigcopyin(const void *, void *, size_t ); 413static int bigcopyout(const void *, void *, size_t ); 414 415int 416copyin(const void *udaddr, void *kaddr, size_t len) 417{ 418 struct pmap *pm = curproc->p_vmspace->vm_map.pmap; 419 int rv, msr, pid, tmp, ctx, count = 0; 420 struct faultbuf env; 421 422 /* For bigger buffers use the faster copy */ 423 if (len > 1024) 424 return (bigcopyin(udaddr, kaddr, len)); 425 426 if ((rv = setfault(&env))) { 427 curpcb->pcb_onfault = NULL; 428 return rv; 429 } 430 431 if (!(ctx = pm->pm_ctx)) { 432 /* No context -- assign it one */ 433 ctx_alloc(pm); 434 ctx = pm->pm_ctx; 435 } 436 437 __asm volatile( 438 " mfmsr %[msr];" /* Save MSR */ 439 " li %[pid],0x20;" 440 " andc %[pid],%[msr],%[pid]; mtmsr %[pid];" /* Disable IMMU */ 441 " mfpid %[pid];" /* Save old PID */ 442 " sync; isync;" 443 444 " srwi. %[count],%[len],0x2;" /* How many words? */ 445 " beq- 2f;" /* No words. Go do bytes */ 446 " mtctr %[count];" 447 "1: mtpid %[ctx]; sync;" 448#ifdef PPC_IBM403 449 " lswi %[tmp],%[udaddr],4;" /* Load user word */ 450#else 451 " lwz %[tmp],0(%[udaddr]);" 452#endif 453 " addi %[udaddr],%[udaddr],0x4;" /* next udaddr word */ 454 " sync; isync;" 455 " mtpid %[pid]; sync;" 456#ifdef PPC_IBM403 457 " stswi %[tmp],%[kaddr],4;" /* Store kernel word */ 458#else 459 " stw %[tmp],0(%[kaddr]);" 460#endif 461 " dcbst 0,%[kaddr];" /* flush cache */ 462 " addi %[kaddr],%[kaddr],0x4;" /* next udaddr word */ 463 " sync; isync;" 464 " bdnz 1b;" /* repeat */ 465 466 "2: andi. %[count],%[len],0x3;" /* How many remaining bytes? */ 467 " addi %[count],%[count],0x1;" 468 " mtctr %[count];" 469 "3: bdz 10f;" /* while count */ 470 " mtpid %[ctx]; sync;" 471 " lbz %[tmp],0(%[udaddr]);" /* Load user byte */ 472 " addi %[udaddr],%[udaddr],0x1;" /* next udaddr byte */ 473 " sync; isync;" 474 " mtpid %[pid]; sync;" 475 " stb %[tmp],0(%[kaddr]);" /* Store kernel byte */ 476 " dcbst 0,%[kaddr];" /* flush cache */ 477 " addi %[kaddr],%[kaddr],0x1;" 478 " sync; isync;" 479 " b 3b;" 480 "10:mtpid %[pid]; mtmsr %[msr]; sync; isync;" 481 /* Restore PID and MSR */ 482 : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp) 483 : [udaddr] "b" (udaddr), [ctx] "b" (ctx), [kaddr] "b" (kaddr), 484 [len] "b" (len), [count] "b" (count)); 485 486 curpcb->pcb_onfault = NULL; 487 return 0; 488} 489 490static int 491bigcopyin(const void *udaddr, void *kaddr, size_t len) 492{ 493 const char *up; 494 char *kp = kaddr; 495 struct lwp *l = curlwp; 496 struct proc *p; 497 struct faultbuf env; 498 int error; 499 500 p = l->l_proc; 501 502 /* 503 * Stolen from physio(): 504 */ 505 error = uvm_vslock(p->p_vmspace, __UNCONST(udaddr), len, VM_PROT_READ); 506 if (error) { 507 return error; 508 } 509 up = (char *)vmaprange(p, (vaddr_t)udaddr, len, VM_PROT_READ); 510 511 if ((error = setfault(&env)) == 0) { 512 memcpy(kp, up, len); 513 } 514 515 curpcb->pcb_onfault = NULL; 516 vunmaprange((vaddr_t)up, len); 517 uvm_vsunlock(p->p_vmspace, __UNCONST(udaddr), len); 518 519 return error; 520} 521 522int 523copyout(const void *kaddr, void *udaddr, size_t len) 524{ 525 struct pmap *pm = curproc->p_vmspace->vm_map.pmap; 526 int rv, msr, pid, tmp, ctx, count = 0; 527 struct faultbuf env; 528 529 /* For big copies use more efficient routine */ 530 if (len > 1024) 531 return (bigcopyout(kaddr, udaddr, len)); 532 533 if ((rv = setfault(&env))) { 534 curpcb->pcb_onfault = NULL; 535 return rv; 536 } 537 538 if (!(ctx = pm->pm_ctx)) { 539 /* No context -- assign it one */ 540 ctx_alloc(pm); 541 ctx = pm->pm_ctx; 542 } 543 544 __asm volatile( 545 " mfmsr %[msr];" /* Save MSR */ 546 " li %[pid],0x20;" 547 " andc %[pid],%[msr],%[pid]; mtmsr %[pid];" /* Disable IMMU */ 548 " mfpid %[pid];" /* Save old PID */ 549 " sync; isync;" 550 551 " srwi. %[count],%[len],0x2;" /* How many words? */ 552 " beq- 2f;" /* No words. Go do bytes */ 553 " mtctr %[count];" 554 "1: mtpid %[pid]; sync;" 555#ifdef PPC_IBM403 556 " lswi %[tmp],%[kaddr],4;" /* Load kernel word */ 557#else 558 " lwz %[tmp],0(%[kaddr]);" 559#endif 560 " addi %[kaddr],%[kaddr],0x4;" /* next kaddr word */ 561 " sync; isync;" 562 " mtpid %[ctx]; sync;" 563#ifdef PPC_IBM403 564 " stswi %[tmp],%[udaddr],4;" /* Store user word */ 565#else 566 " stw %[tmp],0(%[udaddr]);" 567#endif 568 " dcbst 0,%[udaddr];" /* flush cache */ 569 " addi %[udaddr],%[udaddr],0x4;" /* next udaddr word */ 570 " sync; isync;" 571 " bdnz 1b;" /* repeat */ 572 573 "2: andi. %[count],%[len],0x3;" /* How many remaining bytes? */ 574 " addi %[count],%[count],0x1;" 575 " mtctr %[count];" 576 "3: bdz 10f;" /* while count */ 577 " mtpid %[pid]; sync;" 578 " lbz %[tmp],0(%[kaddr]);" /* Load kernel byte */ 579 " addi %[kaddr],%[kaddr],0x1;" /* next kaddr byte */ 580 " sync; isync;" 581 " mtpid %[ctx]; sync;" 582 " stb %[tmp],0(%[udaddr]);" /* Store user byte */ 583 " dcbst 0,%[udaddr];" /* flush cache */ 584 " addi %[udaddr],%[udaddr],0x1;" 585 " sync; isync;" 586 " b 3b;" 587 "10:mtpid %[pid]; mtmsr %[msr]; sync; isync;" 588 /* Restore PID and MSR */ 589 : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp) 590 : [udaddr] "b" (udaddr), [ctx] "b" (ctx), [kaddr] "b" (kaddr), 591 [len] "b" (len), [count] "b" (count)); 592 593 curpcb->pcb_onfault = NULL; 594 return 0; 595} 596 597static int 598bigcopyout(const void *kaddr, void *udaddr, size_t len) 599{ 600 char *up; 601 const char *kp = (const char *)kaddr; 602 struct lwp *l = curlwp; 603 struct proc *p; 604 struct faultbuf env; 605 int error; 606 607 p = l->l_proc; 608 609 /* 610 * Stolen from physio(): 611 */ 612 error = uvm_vslock(p->p_vmspace, udaddr, len, VM_PROT_WRITE); 613 if (error) { 614 return error; 615 } 616 up = (char *)vmaprange(p, (vaddr_t)udaddr, len, 617 VM_PROT_READ | VM_PROT_WRITE); 618 619 if ((error = setfault(&env)) == 0) { 620 memcpy(up, kp, len); 621 } 622 623 curpcb->pcb_onfault = NULL; 624 vunmaprange((vaddr_t)up, len); 625 uvm_vsunlock(p->p_vmspace, udaddr, len); 626 627 return error; 628} 629 630/* 631 * kcopy(const void *src, void *dst, size_t len); 632 * 633 * Copy len bytes from src to dst, aborting if we encounter a fatal 634 * page fault. 635 * 636 * kcopy() _must_ save and restore the old fault handler since it is 637 * called by uiomove(), which may be in the path of servicing a non-fatal 638 * page fault. 639 */ 640int 641kcopy(const void *src, void *dst, size_t len) 642{ 643 struct faultbuf env, *oldfault; 644 int rv; 645 646 oldfault = curpcb->pcb_onfault; 647 if ((rv = setfault(&env))) { 648 curpcb->pcb_onfault = oldfault; 649 return rv; 650 } 651 652 memcpy(dst, src, len); 653 654 curpcb->pcb_onfault = oldfault; 655 return 0; 656} 657 658#if 0 659int 660badaddr(void *addr, size_t size) 661{ 662 663 return badaddr_read(addr, size, NULL); 664} 665 666int 667badaddr_read(void *addr, size_t size, int *rptr) 668{ 669 struct faultbuf env; 670 int x; 671 672 /* Get rid of any stale machine checks that have been waiting. */ 673 __asm volatile ("sync; isync"); 674 675 if (setfault(&env)) { 676 curpcb->pcb_onfault = NULL; 677 __asm volatile ("sync"); 678 return 1; 679 } 680 681 __asm volatile ("sync"); 682 683 switch (size) { 684 case 1: 685 x = *(volatile int8_t *)addr; 686 break; 687 case 2: 688 x = *(volatile int16_t *)addr; 689 break; 690 case 4: 691 x = *(volatile int32_t *)addr; 692 break; 693 default: 694 panic("badaddr: invalid size (%d)", size); 695 } 696 697 /* Make sure we took the machine check, if we caused one. */ 698 __asm volatile ("sync; isync"); 699 700 curpcb->pcb_onfault = NULL; 701 __asm volatile ("sync"); /* To be sure. */ 702 703 /* Use the value to avoid reorder. */ 704 if (rptr) 705 *rptr = x; 706 707 return 0; 708} 709#endif 710 711/* 712 * For now, this only deals with the particular unaligned access case 713 * that gcc tends to generate. Eventually it should handle all of the 714 * possibilities that can happen on a 32-bit PowerPC in big-endian mode. 715 */ 716 717static int 718fix_unaligned(struct lwp *l, struct trapframe *tf) 719{ 720 721 return -1; 722} 723 724/* 725 * XXX Extremely lame implementations of _ufetch_* / _ustore_*. IBM 4xx 726 * experts should make versions that are good. 727 */ 728 729#define UFETCH(sz) \ 730int \ 731_ufetch_ ## sz(const uint ## sz ## _t *uaddr, uint ## sz ## _t *valp) \ 732{ \ 733 return copyin(uaddr, valp, sizeof(*valp)); \ 734} 735 736UFETCH(8) 737UFETCH(16) 738UFETCH(32) 739 740#define USTORE(sz) \ 741int \ 742_ustore_ ## sz(uint ## sz ## _t *uaddr, uint ## sz ## _t val) \ 743{ \ 744 return copyout(&val, uaddr, sizeof(val)); \ 745} 746 747USTORE(8) 748USTORE(16) 749USTORE(32) 750