Move the at-shutdown call to resettodr() from cpu_reboot() to kern_reboot().

It's a small step, but it's a step.

The watchdog setup code isn't used (yet), so don't compile in the
octeon_nmi_stack that it uses either.

branches: 1.23.6;
Add some compile time asserts for endianness on boards/systems that
only support a single endianness.

Change cpus_booted back to a simple variable instead of a kcpuset.
octeon_cpu_spinup() was trying to set CPU status immediately on kernel
startup _well_ before the kcpuset was initialised.

Add option to use the early bitbang console. Enable this for now
while debugging MP.
Print out the core mask value passed in by Uboot.

Reserve space for all CPU cores (incorrect logic).
Reserve a full page for each core, not incorrect 4096 (from skrll@).

Call fdtbus_intr_init() during startup.

FDT support for Cavium OCTEON MIPS SoCs. WIP.

Copy "mach reset" logic from arm32 recently added by jmcneill@. The
previous MIPS "mach reset" DDB command was hard-coded for Octeon Cavium
CPUs only.

Add some rudimentary boot args parsing. Can handle "root=" as well
normal -1adsqvxz flags. "root=" is limited to cnmacN devices so far;
should be extended to allow arbitary SD devices (and other devices?).

Don't include now non-existant "opt_cavium.h".

Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)

Now that we don't zero out the second link in the U-boot bootmem
descripter, use that to configure free memory.

Only clear BSS up to "end" symbol, not all the way to mips_round_page(end).
U-Boot puts some data immediately after the BSS section cleared in the ELF
segments, and we don't want to overwrite that.

XXX: Stop using mips_round_page(end) on all MIPS?

Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).

branches: 1.10.14;
add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.

The watchdog setup code isn't used (yet), so don't compile in the
octeon_nmi_stack that it uses either.

Add some compile time asserts for endianness on boards/systems that
only support a single endianness.

Change cpus_booted back to a simple variable instead of a kcpuset.
octeon_cpu_spinup() was trying to set CPU status immediately on kernel
startup _well_ before the kcpuset was initialised.

Add option to use the early bitbang console. Enable this for now
while debugging MP.
Print out the core mask value passed in by Uboot.

Reserve space for all CPU cores (incorrect logic).
Reserve a full page for each core, not incorrect 4096 (from skrll@).

Call fdtbus_intr_init() during startup.

FDT support for Cavium OCTEON MIPS SoCs. WIP.

Copy "mach reset" logic from arm32 recently added by jmcneill@. The
previous MIPS "mach reset" DDB command was hard-coded for Octeon Cavium
CPUs only.

Add some rudimentary boot args parsing. Can handle "root=" as well
normal -1adsqvxz flags. "root=" is limited to cnmacN devices so far;
should be extended to allow arbitary SD devices (and other devices?).

Don't include now non-existant "opt_cavium.h".

Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)

Now that we don't zero out the second link in the U-boot bootmem
descripter, use that to configure free memory.

Only clear BSS up to "end" symbol, not all the way to mips_round_page(end).
U-Boot puts some data immediately after the BSS section cleared in the ELF
segments, and we don't want to overwrite that.

XXX: Stop using mips_round_page(end) on all MIPS?

Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).

branches: 1.10.14;
add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.

Add some compile time asserts for endianness on boards/systems that
only support a single endianness.

Change cpus_booted back to a simple variable instead of a kcpuset.
octeon_cpu_spinup() was trying to set CPU status immediately on kernel
startup _well_ before the kcpuset was initialised.

Add option to use the early bitbang console. Enable this for now
while debugging MP.
Print out the core mask value passed in by Uboot.

Reserve space for all CPU cores (incorrect logic).
Reserve a full page for each core, not incorrect 4096 (from skrll@).

Call fdtbus_intr_init() during startup.

FDT support for Cavium OCTEON MIPS SoCs. WIP.

Copy "mach reset" logic from arm32 recently added by jmcneill@. The
previous MIPS "mach reset" DDB command was hard-coded for Octeon Cavium
CPUs only.

Add some rudimentary boot args parsing. Can handle "root=" as well
normal -1adsqvxz flags. "root=" is limited to cnmacN devices so far;
should be extended to allow arbitary SD devices (and other devices?).

Don't include now non-existant "opt_cavium.h".

Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)

Now that we don't zero out the second link in the U-boot bootmem
descripter, use that to configure free memory.

Only clear BSS up to "end" symbol, not all the way to mips_round_page(end).
U-Boot puts some data immediately after the BSS section cleared in the ELF
segments, and we don't want to overwrite that.

XXX: Stop using mips_round_page(end) on all MIPS?

Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).

branches: 1.10.14;
add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.

Change cpus_booted back to a simple variable instead of a kcpuset.
octeon_cpu_spinup() was trying to set CPU status immediately on kernel
startup _well_ before the kcpuset was initialised.

Add option to use the early bitbang console. Enable this for now
while debugging MP.
Print out the core mask value passed in by Uboot.

Reserve space for all CPU cores (incorrect logic).
Reserve a full page for each core, not incorrect 4096 (from skrll@).

Call fdtbus_intr_init() during startup.

FDT support for Cavium OCTEON MIPS SoCs. WIP.

Copy "mach reset" logic from arm32 recently added by jmcneill@. The
previous MIPS "mach reset" DDB command was hard-coded for Octeon Cavium
CPUs only.

Add some rudimentary boot args parsing. Can handle "root=" as well
normal -1adsqvxz flags. "root=" is limited to cnmacN devices so far;
should be extended to allow arbitary SD devices (and other devices?).

Don't include now non-existant "opt_cavium.h".

Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)

Now that we don't zero out the second link in the U-boot bootmem
descripter, use that to configure free memory.

Only clear BSS up to "end" symbol, not all the way to mips_round_page(end).
U-Boot puts some data immediately after the BSS section cleared in the ELF
segments, and we don't want to overwrite that.

XXX: Stop using mips_round_page(end) on all MIPS?

Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).

branches: 1.10.14;
add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.

Add option to use the early bitbang console. Enable this for now
while debugging MP.
Print out the core mask value passed in by Uboot.

Reserve space for all CPU cores (incorrect logic).
Reserve a full page for each core, not incorrect 4096 (from skrll@).

Call fdtbus_intr_init() during startup.

FDT support for Cavium OCTEON MIPS SoCs. WIP.

Copy "mach reset" logic from arm32 recently added by jmcneill@. The
previous MIPS "mach reset" DDB command was hard-coded for Octeon Cavium
CPUs only.

Add some rudimentary boot args parsing. Can handle "root=" as well
normal -1adsqvxz flags. "root=" is limited to cnmacN devices so far;
should be extended to allow arbitary SD devices (and other devices?).

Don't include now non-existant "opt_cavium.h".

Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)

Now that we don't zero out the second link in the U-boot bootmem
descripter, use that to configure free memory.

Only clear BSS up to "end" symbol, not all the way to mips_round_page(end).
U-Boot puts some data immediately after the BSS section cleared in the ELF
segments, and we don't want to overwrite that.

XXX: Stop using mips_round_page(end) on all MIPS?

Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).

branches: 1.10.14;
add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.

Reserve space for all CPU cores (incorrect logic).
Reserve a full page for each core, not incorrect 4096 (from skrll@).

Call fdtbus_intr_init() during startup.

FDT support for Cavium OCTEON MIPS SoCs. WIP.

Copy "mach reset" logic from arm32 recently added by jmcneill@. The
previous MIPS "mach reset" DDB command was hard-coded for Octeon Cavium
CPUs only.

Add some rudimentary boot args parsing. Can handle "root=" as well
normal -1adsqvxz flags. "root=" is limited to cnmacN devices so far;
should be extended to allow arbitary SD devices (and other devices?).

Don't include now non-existant "opt_cavium.h".

Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)

Now that we don't zero out the second link in the U-boot bootmem
descripter, use that to configure free memory.

Only clear BSS up to "end" symbol, not all the way to mips_round_page(end).
U-Boot puts some data immediately after the BSS section cleared in the ELF
segments, and we don't want to overwrite that.

XXX: Stop using mips_round_page(end) on all MIPS?

Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).

branches: 1.10.14;
add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.

FDT support for Cavium OCTEON MIPS SoCs. WIP.

Copy "mach reset" logic from arm32 recently added by jmcneill@. The
previous MIPS "mach reset" DDB command was hard-coded for Octeon Cavium
CPUs only.

Add some rudimentary boot args parsing. Can handle "root=" as well
normal -1adsqvxz flags. "root=" is limited to cnmacN devices so far;
should be extended to allow arbitary SD devices (and other devices?).

Don't include now non-existant "opt_cavium.h".

Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)

Now that we don't zero out the second link in the U-boot bootmem
descripter, use that to configure free memory.

Only clear BSS up to "end" symbol, not all the way to mips_round_page(end).
U-Boot puts some data immediately after the BSS section cleared in the ELF
segments, and we don't want to overwrite that.

XXX: Stop using mips_round_page(end) on all MIPS?

Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).

branches: 1.10.14;
add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.

Copy "mach reset" logic from arm32 recently added by jmcneill@. The
previous MIPS "mach reset" DDB command was hard-coded for Octeon Cavium
CPUs only.

Add some rudimentary boot args parsing. Can handle "root=" as well
normal -1adsqvxz flags. "root=" is limited to cnmacN devices so far;
should be extended to allow arbitary SD devices (and other devices?).

Don't include now non-existant "opt_cavium.h".

Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)

Now that we don't zero out the second link in the U-boot bootmem
descripter, use that to configure free memory.

Only clear BSS up to "end" symbol, not all the way to mips_round_page(end).
U-Boot puts some data immediately after the BSS section cleared in the ELF
segments, and we don't want to overwrite that.

XXX: Stop using mips_round_page(end) on all MIPS?

Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).

branches: 1.10.14;
add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.

Add some rudimentary boot args parsing. Can handle "root=" as well
normal -1adsqvxz flags. "root=" is limited to cnmacN devices so far;
should be extended to allow arbitary SD devices (and other devices?).

Don't include now non-existant "opt_cavium.h".

Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)

Now that we don't zero out the second link in the U-boot bootmem
descripter, use that to configure free memory.

Only clear BSS up to "end" symbol, not all the way to mips_round_page(end).
U-Boot puts some data immediately after the BSS section cleared in the ELF
segments, and we don't want to overwrite that.

XXX: Stop using mips_round_page(end) on all MIPS?

Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).

branches: 1.10.14;
add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.

Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)

Now that we don't zero out the second link in the U-boot bootmem
descripter, use that to configure free memory.

Only clear BSS up to "end" symbol, not all the way to mips_round_page(end).
U-Boot puts some data immediately after the BSS section cleared in the ELF
segments, and we don't want to overwrite that.

XXX: Stop using mips_round_page(end) on all MIPS?

Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).

branches: 1.10.14;
add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.

Now that we don't zero out the second link in the U-boot bootmem
descripter, use that to configure free memory.

Only clear BSS up to "end" symbol, not all the way to mips_round_page(end).
U-Boot puts some data immediately after the BSS section cleared in the ELF
segments, and we don't want to overwrite that.

XXX: Stop using mips_round_page(end) on all MIPS?

Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).

branches: 1.10.14;
add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.

Only clear BSS up to "end" symbol, not all the way to mips_round_page(end).
U-Boot puts some data immediately after the BSS section cleared in the ELF
segments, and we don't want to overwrite that.

XXX: Stop using mips_round_page(end) on all MIPS?

Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).

branches: 1.10.14;
add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.

Finish rename of all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo" (missed octeon_uart + entries in iobus config).

branches: 1.10.14;
add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.

add an OCTEON_MEMSIZE option to override the uboot provided memory
size. limiting this to 256 avoids an annoying uvm freelist problem on
the 512mb erlite, partly described here:

http://mail-index.netbsd.org/tech-kern/2016/12/20/msg021358.html

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rin Okuyama in PR port-evbmips/51563: wait for console input after halting
the machine.

Trailing whitespace

branches: 1.6.2;
Use pmap_kenter flags to create cached/uncached entries.
#include <mips/locore.h> when appropriate

Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.

branches: 1.4.2;
If booting a MULTIPROCESSOR kernel, use the llsc atomic primitives

Rework cavium support in preparation for MULTIPROCESSOR support

Set cpu model.

Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.