machdep.c revision 1.14
1/* $NetBSD: machdep.c,v 1.14 2020/06/15 07:48:12 simonb Exp $ */ 2 3/* 4 * Copyright 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38/* 39 * Copyright (c) 1992, 1993 40 * The Regents of the University of California. All rights reserved. 41 * 42 * This code is derived from software contributed to Berkeley by 43 * the Systems Programming Group of the University of Utah Computer 44 * Science Department, The Mach Operating System project at 45 * Carnegie-Mellon University and Ralph Campbell. 46 * 47 * Redistribution and use in source and binary forms, with or without 48 * modification, are permitted provided that the following conditions 49 * are met: 50 * 1. Redistributions of source code must retain the above copyright 51 * notice, this list of conditions and the following disclaimer. 52 * 2. Redistributions in binary form must reproduce the above copyright 53 * notice, this list of conditions and the following disclaimer in the 54 * documentation and/or other materials provided with the distribution. 55 * 3. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 72 * from: Utah Hdr: machdep.c 1.63 91/04/24 73 */ 74/* 75 * Copyright (c) 1988 University of Utah. 76 * 77 * This code is derived from software contributed to Berkeley by 78 * the Systems Programming Group of the University of Utah Computer 79 * Science Department, The Mach Operating System project at 80 * Carnegie-Mellon University and Ralph Campbell. 81 * 82 * Redistribution and use in source and binary forms, with or without 83 * modification, are permitted provided that the following conditions 84 * are met: 85 * 1. Redistributions of source code must retain the above copyright 86 * notice, this list of conditions and the following disclaimer. 87 * 2. Redistributions in binary form must reproduce the above copyright 88 * notice, this list of conditions and the following disclaimer in the 89 * documentation and/or other materials provided with the distribution. 90 * 3. All advertising materials mentioning features or use of this software 91 * must display the following acknowledgement: 92 * This product includes software developed by the University of 93 * California, Berkeley and its contributors. 94 * 4. Neither the name of the University nor the names of its contributors 95 * may be used to endorse or promote products derived from this software 96 * without specific prior written permission. 97 * 98 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 99 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 100 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 101 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 102 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 103 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 104 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 105 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 106 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 107 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 108 * SUCH DAMAGE. 109 * 110 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 111 * from: Utah Hdr: machdep.c 1.63 91/04/24 112 */ 113 114#include "opt_multiprocessor.h" 115#include "opt_cavium.h" 116 117#include <sys/cdefs.h> 118__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.14 2020/06/15 07:48:12 simonb Exp $"); 119 120#include <sys/param.h> 121#include <sys/systm.h> 122#include <sys/kernel.h> 123#include <sys/buf.h> 124#include <sys/cpu.h> 125#include <sys/reboot.h> 126#include <sys/mount.h> 127#include <sys/kcore.h> 128#include <sys/boot_flag.h> 129#include <sys/termios.h> 130#include <sys/ksyms.h> 131 132#include <uvm/uvm_extern.h> 133 134#include <dev/cons.h> 135 136#include "ksyms.h" 137 138#if NKSYMS || defined(DDB) || defined(LKM) 139#include <machine/db_machdep.h> 140#include <ddb/db_extern.h> 141#endif 142 143#include <machine/psl.h> 144#include <machine/locore.h> 145 146#include <mips/cavium/autoconf.h> 147#include <mips/cavium/octeonvar.h> 148#include <mips/cavium/include/iobusvar.h> 149#include <mips/cavium/include/bootbusvar.h> 150 151#include <mips/cavium/dev/octeon_uartreg.h> 152#include <mips/cavium/dev/octeon_ciureg.h> 153#include <mips/cavium/dev/octeon_gpioreg.h> 154 155#include <evbmips/cavium/octeon_uboot.h> 156 157static void mach_init_vector(void); 158static void mach_init_bus_space(void); 159static void mach_init_console(void); 160static void mach_init_memory(void); 161 162#include "com.h" 163#if NCOM > 0 164#include <dev/ic/comreg.h> 165#include <dev/ic/comvar.h> 166int comcnrate = 115200; /* XXX should be config option */ 167#endif /* NCOM > 0 */ 168 169/* Maps for VM objects. */ 170struct vm_map *phys_map = NULL; 171 172int netboot; 173 174phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX]; 175int mem_cluster_cnt; 176extern char kernel_text[]; 177extern char edata[]; 178extern char end[]; 179 180void mach_init(uint64_t, uint64_t, uint64_t, uint64_t); 181 182struct octeon_config octeon_configuration; 183struct octeon_btinfo octeon_btinfo; 184 185char octeon_nmi_stack[PAGE_SIZE] __section(".data1") __aligned(PAGE_SIZE); 186 187/* 188 * Do all the stuff that locore normally does before calling main(). 189 */ 190void 191mach_init(uint64_t arg0, uint64_t arg1, uint64_t arg2, uint64_t arg3) 192{ 193 uint64_t btinfo_paddr; 194 195 /* clear the BSS segment */ 196 memset(edata, 0, end - edata); 197 198 KASSERT(MIPS_XKPHYS_P(arg3)); 199 btinfo_paddr = mips3_ld(arg3 + OCTEON_BTINFO_PADDR_OFFSET); 200 201 /* Should be in first 256MB segment */ 202 KASSERT(btinfo_paddr < 256 * 1024 * 1024); 203 memcpy(&octeon_btinfo, 204 (struct octeon_btinfo *)MIPS_PHYS_TO_KSEG0(btinfo_paddr), 205 sizeof(octeon_btinfo)); 206 207 octeon_cal_timer(octeon_btinfo.obt_eclock_hz); 208 209 cpu_setmodel("Cavium Octeon %s", 210 octeon_cpu_model(mips_options.mips_cpu_id)); 211 212 mach_init_vector(); 213 214 uvm_md_init(); 215 216 mach_init_bus_space(); 217 218 mach_init_console(); 219 220 mach_init_memory(); 221 222 /* 223 * Allocate uarea page for lwp0 and set it. 224 */ 225 mips_init_lwp0_uarea(); 226 227 boothowto = RB_AUTOBOOT; 228 boothowto |= AB_VERBOSE; 229 230#if 0 231 curcpu()->ci_nmi_stack = octeon_nmi_stack + sizeof(octeon_nmi_stack) - sizeof(struct kernframe); 232 *(uint64_t *)MIPS_PHYS_TO_KSEG0(0x800) = (intptr_t)octeon_reset_vector; 233 const uint64_t wdog_reg = MIPS_PHYS_TO_XKPHYS_UNCACHED(CIU_WDOG0); 234 uint64_t wdog = mips3_ld(wdog_reg); 235 wdog &= ~(CIU_WDOGX_MODE|CIU_WDOGX_LEN); 236 wdog |= __SHIFTIN(3, CIU_WDOGX_MODE); 237 wdog |= CIU_WDOGX_LEN; // max period 238 mips64_sd_a64(wdog_reg, wdog); 239 printf("Watchdog enabled!\n"); 240#endif 241 242#if defined(DDB) 243 if (boothowto & RB_KDB) 244 Debugger(); 245#endif 246} 247 248void 249consinit(void) 250{ 251 252 /* 253 * Everything related to console initialization is done 254 * in mach_init(). 255 */ 256} 257 258void 259mach_init_vector(void) 260{ 261 262 /* Make sure exception base at 0 (MIPS_COP_0_EBASE) */ 263 __asm __volatile("mtc0 %0, $15, 1" : : "r"(0x80000000) ); 264 265 /* 266 * Set up the exception vectors and CPU-specific function 267 * vectors early on. We need the wbflush() vector set up 268 * before comcnattach() is called (or at least before the 269 * first printf() after that is called). 270 * Also clears the I+D caches. 271 */ 272 mips_vector_init(NULL, true); 273} 274 275void 276mach_init_bus_space(void) 277{ 278 struct octeon_config *mcp = &octeon_configuration; 279 280 octeon_dma_init(mcp); 281 282 iobus_bootstrap(mcp); 283 bootbus_bootstrap(mcp); 284} 285 286void 287mach_init_console(void) 288{ 289#if NCOM > 0 290 struct octeon_config *mcp = &octeon_configuration; 291 int status; 292 extern int octuart_com_cnattach(bus_space_tag_t, int, int); 293 294 /* 295 * Delay to allow firmware putchars to complete. 296 * FIFO depth * character time. 297 * character time = (1000000 / (defaultrate / 10)) 298 */ 299 delay(640000000 / comcnrate); 300 301 status = octuart_com_cnattach( 302 &mcp->mc_iobus_bust, 303 0, /* XXX port 0 */ 304 comcnrate); 305 if (status != 0) 306 panic("can't initialize console!"); /* XXX print to nowhere! */ 307#else 308 panic("octeon: not configured to use serial console"); 309#endif /* NCOM > 0 */ 310} 311 312static void 313mach_init_memory(void) 314{ 315 struct octeon_bootmem_desc *memdesc; 316 struct octeon_bootmem_block_header *block; 317 paddr_t blockaddr; 318 int i; 319 320 mem_cluster_cnt = 0; 321 322 if (octeon_btinfo.obt_phy_mem_desc_addr == 0) 323 panic("bootmem desc is missing"); 324 325 memdesc = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE, 326 octeon_btinfo.obt_phy_mem_desc_addr); 327 printf("u-boot bootmem desc @ 0x%x version %d.%d\n", 328 octeon_btinfo.obt_phy_mem_desc_addr, 329 memdesc->bmd_major_version, memdesc->bmd_minor_version); 330 if (memdesc->bmd_major_version > 3) 331 panic("unhandled bootmem desc version %d.%d", 332 memdesc->bmd_major_version, memdesc->bmd_minor_version); 333 334 blockaddr = memdesc->bmd_head_addr; 335 if (blockaddr == 0) 336 panic("bootmem list is empty"); 337 338 for (i = 0; i < VM_PHYSSEG_MAX && blockaddr != 0; 339 i++, blockaddr = block->bbh_next_block_addr) { 340 block = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE, blockaddr); 341 342 mem_clusters[mem_cluster_cnt].start = blockaddr; 343 mem_clusters[mem_cluster_cnt].size = block->bbh_size; 344 mem_cluster_cnt++; 345 } 346 347 physmem = btoc(octeon_btinfo.obt_dram_size * 1024 * 1024); 348 349#ifdef MULTIPROCESSOR 350 const u_int cores = mipsNN_cp0_ebase_read() & MIPS_EBASE_CPUNUM; 351 mem_clusters[0].start = cores * 4096; 352#endif 353 354 /* 355 * Load the rest of the available pages into the VM system. 356 */ 357 mips_page_physload(mips_trunc_page(kernel_text), mips_round_page(end), 358 mem_clusters, mem_cluster_cnt, NULL, 0); 359 360 /* 361 * Initialize error message buffer (at end of core). 362 */ 363 mips_init_msgbuf(); 364 365 pmap_bootstrap(); 366} 367 368/* 369 * cpu_startup 370 * cpu_reboot 371 */ 372 373int waittime = -1; 374 375/* 376 * Allocate memory for variable-sized tables, 377 */ 378void 379cpu_startup(void) 380{ 381#ifdef MULTIPROCESSOR 382 // Create a kcpuset so we can see on which CPUs the kernel was started. 383 kcpuset_create(&cpus_booted, true); 384#endif 385 386 /* 387 * Do the common startup items. 388 */ 389 cpu_startup_common(); 390 391 /* 392 * Virtual memory is bootstrapped -- notify the bus spaces 393 * that memory allocation is now safe. 394 */ 395 octeon_configuration.mc_mallocsafe = 1; 396} 397 398void 399cpu_reboot(int howto, char *bootstr) 400{ 401 402 /* Take a snapshot before clobbering any registers. */ 403 savectx(curpcb); 404 405 if (cold) { 406 howto |= RB_HALT; 407 goto haltsys; 408 } 409 410 /* If "always halt" was specified as a boot flag, obey. */ 411 if (boothowto & RB_HALT) 412 howto |= RB_HALT; 413 414 boothowto = howto; 415 if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) { 416 waittime = 0; 417 vfs_shutdown(); 418 419 /* 420 * If we've been adjusting the clock, the todr 421 * will be out of synch; adjust it now. 422 */ 423 resettodr(); 424 } 425 426 splhigh(); 427 428 if (howto & RB_DUMP) 429 dumpsys(); 430 431haltsys: 432 doshutdownhooks(); 433 434 if (howto & RB_HALT) { 435 printf("\n"); 436 printf("The operating system has halted.\n"); 437 printf("Please press any key to reboot.\n\n"); 438 cnpollc(1); /* For proper keyboard command handling */ 439 cngetc(); 440 cnpollc(0); 441 } 442 443 printf("%s\n\n", ((howto & RB_HALT) != 0) ? "halted." : "rebooting..."); 444 445 /* 446 * Need a small delay here, otherwise we see the first few characters of 447 * the warning below. 448 */ 449 delay(80000); 450 451 octeon_soft_reset(); 452 453 delay(1000000); 454 455 printf("WARNING: reset failed!\nSpinning..."); 456 457 for (;;) 458 /* spin forever */ ; /* XXX */ 459} 460