Update to support EFI runtime outside the kernel virtual address space
by creating an EFI RT pmap that can be activated / deactivated when
required.

Adds support for EFI RT to ARM_MMU_EXTENDED (ASID) 32-bit Arm machines.

On Arm64 the usage of pmapboot_enter is reduced and the mappings are
created much later in the boot process -- now in cpu_startup_hook.
Backward compatiblity for KVA mapped RT from old bootaa64.efi is
maintained.

Adding support to other platforms should be easier as a result.

-DKERNEL_BASE_VOFFSET= has annoyed me for the last time...

Introduce KERNEL_VOFFSET_RUNTIME which prevents the addition of
-DKERNEL_BASE_VOFFSET= to the command line and use it on the
__HAVE_GENERIC_START kernels which do runtime calculation of the
offset.

branches: 1.67.2;
Move evbarm/fdt/fdt_memory.[ch] to sys/dev/fdt and simplify the api and
some operations. This allows other architectures to use it.

branches: 1.66.2;
Retire arm_[di]sb in favour of the isb() and dsb(sy) macro invocations.

Some KASAN fixes and tweaks

- don't access BSS variables when __md_early
- centralise the INIT_ARM_STACK_{SHIFT,SIZE} defines and create a new
INIT_ARM_TOTAL_STACK
- Only create L1PT entries in kasan_md_shadow_map_page if
arm32_kernel_vm_init hasn't created the L2PTs (and their L1PT entries)
- Add some comments to explain what's going on

Add support for KASAN on ARMv[67]

Thanks to maxv for many pointers and reviews.

Style and share a debug string

Use howmany()

Whitespace

Avoid unbounded stack usage warning

KNF #includes

Remove some unnecessary ones while I'm here.

KNF

grammar in a comment

G/C L1_TABLE_SIZE_REAL

branches: 1.55.4;
Really go back to pre-whitespace change (1.52) arm32_kernel_vm_init

Revert the part of the previous Whitespace commit which clearly was
functional.

This will probably come back with other changes and a proper commit
message.

Whitespace

Make sure the start stacks are covered by the new translation tables.
They *might* get placed after ARM_BOOTSTRAP_LxPT by the linker.

AP startup uses VA sp in cpu_init_secondary_processor

Misc style

Slight update to comment and KNF it while I'm here

Fix typo in VPRINTF

On second/third thoughts we can use the pages before the kernel
everywhere.

Clean up around cpu_ttb and fix a bunch of builds

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

Use __nothing

Provide and use kern_vtopdiff in KERN_{VTOPHYS,PHYSTOV}. A step towards
generic arm.

#ifdef VERBOSE_INIT_ARM some format strings only used in that case.

Define and use VPRINTF

branches: 1.41.2; 1.41.4;
FDTise RapberryPI support. Thanks for jmcneill for a lot of help with this.

The kernel image that the RPI firmware boots is now netbsd.img in the
kernel build directory.

XXX fdtbus_get_reg needs reworking

Now that we can... mark kernel text as non-writable on MMUs that support
it.

Report an error if compiled with MULTIPROCESSOR support but without
__HAVE_CPU_UAREA_ALLOC_IDLELWP

Fix VERBOSE_INIT_ARM build

branches: 1.37.2;
In the ARM_MMU_EXTENDED case make sure the kernel mappings are marked with
XN (eXecute Never) appropriately.

The XN logic is inconsistent and could do with changing to XN always set
and cleared for VM_PROT_EXECUTE (or the inverse) everywhere.

Trailing whitespace.

pmap_directbase is a failed experiment, nuke it.

Support directmapped systems with >1GB that start memory at 0x80000000.

Deal with 2GB of ram or memory ending at or above 4GB.

branches: 1.32.2;
Sprinkle #include "opt_multiprocessor.h"

Remove unnecessary #include

branches: 1.30.2;
Fix build failed with GUMSTIX(pxa2x0). build test only now.

When figuring out the physical size for direct-mapped systems, round up
to L1_SS_SIZE.

Add a kernel for the CUBIETRUCK (CUBIEBOARD3). Allow direct mapping of all
memory (but for now allow the memory mapped above KERNEL_BASE to used for
poolpages).

If using arm32_kvminit, don't bother mapping msgbuf since it's already mapped.

branches: 1.26.2;
Remove unnecessary { } around code block. No functional change.

ARM_MMU_EXTENDED support.

rearrange some printfs.
when using the extended mmu, make sure to disable ttbr0 until there is an
activated pmap.

If we are going to map all of physical memory, we don't need to allocate
l2 page tables for the kernel.

branches: 1.22.2;
Fix typo: VERBOSE_INIT_ARM, not VERBOSE_ARM_INIT. From
Dennis Ferguson in PR#48163.

branches: 1.21.2;
Fix inverted logic for mapping exception vector.

Add a ARM_HAS_VBAR option which forces the use of the VBAR register. This
allows much code to deal with vector_page mappings to be eliminated. On a
BEAGLEBONE kernel, this saves 8KB of text and instructions that never have
to be executed. (The PJ4B has VBAR but doesn't implement the security
extensions it is part of so a method was needed to allow it use VBAR with
relying on the default test for the security extensions.)

Add support for the VBAR (vector base address register) to remap the vectors
into the kernel text segment. This register is available on arm1176 and
all cortex processors since they all have the arm security (trustzone)
extension. We avoid having to specially map either vector page (0x00000000
or 0xffff0000) and use VBAR to both to page0rel in the text segment. These
vector group differs from the normal page0, that since it's in the kernel,
it can branch directly to the exception routine, instead of loading the
address into the PC. This should result in a tiny improvement in speed since
we eliminate a TLB mapping the vector page and a load on every exception.

XXX Add __HAVE_ARM_TRUSTZONE cpp define and use that to eliminate all code
have to do with manipulating the vector page.

Actually use zero_p now that we pass it in.

Add a zero flag to valloc_pages so that we can *not* zero the msgbuf so it
will be preserved across boots.

Correct one of the kernel_size calculations.

if __HAVE_MM_MD_DIRECT_MAPPED_PHYS is defined, make sure mapallmem_p is true.

branches: 1.14.2; 1.14.4;
Compare pointer against NULL not 0.

Make sure when mapping all the kernel, start at KERNEL_BASE, not kernel_base.

Make sure that start.S and machdep.c don't disagree wrt L1 page table
location during bootstrap.

slop wasn't sloppy enough in the kernel_size calculation. Add in the L2
page tables required as well.

Should fix the dockstar boot problem reported by Andy Ruhl on port-arm.

http://mail-index.netbsd.org/port-arm/2012/09/20/msg001471.html

Comments.

Print the message buffer VAs and number of pages. Other minor cosmetics.

Fix two off-by-one loops. Saves a whole two pages.

More VERBOSE_INIT_ARM output tweaks.

Typo in comment.

Print the system vectors in order so I don't get confused.

Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead
but add a second argument to it to indicate whether the TLB/caches need to be
flushed. Default cortex to pmap_needs_fixup = 1. But check the MMFR3 field
to see if the fixed can be skipped.
Use a cf_flag bit 0 to indicate whether the A9 L2 cache should disable (bit 0 = 1)
or enabeld (bit = 0).

With these changes, the A9 MMU can use traverse caches to do MMU tablewalks
Also, make sure all memory has the shareable bit for the A9.

branches: 1.3.2;
Before setting the new TTB wbinv the caches.

Print TTBR/TTBR1/TTBCR registers

Make cpu_reset, most of initarm and the kvm init code common.
Add MP hooks for cpu_need_resced
Add idlestck which is allocated in arm32_kvminit

-DKERNEL_BASE_VOFFSET= has annoyed me for the last time...

Introduce KERNEL_VOFFSET_RUNTIME which prevents the addition of
-DKERNEL_BASE_VOFFSET= to the command line and use it on the
__HAVE_GENERIC_START kernels which do runtime calculation of the
offset.

Move evbarm/fdt/fdt_memory.[ch] to sys/dev/fdt and simplify the api and
some operations. This allows other architectures to use it.

branches: 1.66.2;
Retire arm_[di]sb in favour of the isb() and dsb(sy) macro invocations.

Some KASAN fixes and tweaks

- don't access BSS variables when __md_early
- centralise the INIT_ARM_STACK_{SHIFT,SIZE} defines and create a new
INIT_ARM_TOTAL_STACK
- Only create L1PT entries in kasan_md_shadow_map_page if
arm32_kernel_vm_init hasn't created the L2PTs (and their L1PT entries)
- Add some comments to explain what's going on

Add support for KASAN on ARMv[67]

Thanks to maxv for many pointers and reviews.

Style and share a debug string

Use howmany()

Whitespace

Avoid unbounded stack usage warning

KNF #includes

Remove some unnecessary ones while I'm here.

KNF

grammar in a comment

G/C L1_TABLE_SIZE_REAL

branches: 1.55.4;
Really go back to pre-whitespace change (1.52) arm32_kernel_vm_init

Revert the part of the previous Whitespace commit which clearly was
functional.

This will probably come back with other changes and a proper commit
message.

Whitespace

Make sure the start stacks are covered by the new translation tables.
They *might* get placed after ARM_BOOTSTRAP_LxPT by the linker.

AP startup uses VA sp in cpu_init_secondary_processor

Misc style

Slight update to comment and KNF it while I'm here

Fix typo in VPRINTF

On second/third thoughts we can use the pages before the kernel
everywhere.

Clean up around cpu_ttb and fix a bunch of builds

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

Use __nothing

Provide and use kern_vtopdiff in KERN_{VTOPHYS,PHYSTOV}. A step towards
generic arm.

#ifdef VERBOSE_INIT_ARM some format strings only used in that case.

Define and use VPRINTF

branches: 1.41.2; 1.41.4;
FDTise RapberryPI support. Thanks for jmcneill for a lot of help with this.

The kernel image that the RPI firmware boots is now netbsd.img in the
kernel build directory.

XXX fdtbus_get_reg needs reworking

Now that we can... mark kernel text as non-writable on MMUs that support
it.

Report an error if compiled with MULTIPROCESSOR support but without
__HAVE_CPU_UAREA_ALLOC_IDLELWP

Fix VERBOSE_INIT_ARM build

branches: 1.37.2;
In the ARM_MMU_EXTENDED case make sure the kernel mappings are marked with
XN (eXecute Never) appropriately.

The XN logic is inconsistent and could do with changing to XN always set
and cleared for VM_PROT_EXECUTE (or the inverse) everywhere.

Trailing whitespace.

pmap_directbase is a failed experiment, nuke it.

Support directmapped systems with >1GB that start memory at 0x80000000.

Deal with 2GB of ram or memory ending at or above 4GB.

branches: 1.32.2;
Sprinkle #include "opt_multiprocessor.h"

Remove unnecessary #include

branches: 1.30.2;
Fix build failed with GUMSTIX(pxa2x0). build test only now.

When figuring out the physical size for direct-mapped systems, round up
to L1_SS_SIZE.

Add a kernel for the CUBIETRUCK (CUBIEBOARD3). Allow direct mapping of all
memory (but for now allow the memory mapped above KERNEL_BASE to used for
poolpages).

If using arm32_kvminit, don't bother mapping msgbuf since it's already mapped.

branches: 1.26.2;
Remove unnecessary { } around code block. No functional change.

ARM_MMU_EXTENDED support.

rearrange some printfs.
when using the extended mmu, make sure to disable ttbr0 until there is an
activated pmap.

If we are going to map all of physical memory, we don't need to allocate
l2 page tables for the kernel.

branches: 1.22.2;
Fix typo: VERBOSE_INIT_ARM, not VERBOSE_ARM_INIT. From
Dennis Ferguson in PR#48163.

branches: 1.21.2;
Fix inverted logic for mapping exception vector.

Add a ARM_HAS_VBAR option which forces the use of the VBAR register. This
allows much code to deal with vector_page mappings to be eliminated. On a
BEAGLEBONE kernel, this saves 8KB of text and instructions that never have
to be executed. (The PJ4B has VBAR but doesn't implement the security
extensions it is part of so a method was needed to allow it use VBAR with
relying on the default test for the security extensions.)

Add support for the VBAR (vector base address register) to remap the vectors
into the kernel text segment. This register is available on arm1176 and
all cortex processors since they all have the arm security (trustzone)
extension. We avoid having to specially map either vector page (0x00000000
or 0xffff0000) and use VBAR to both to page0rel in the text segment. These
vector group differs from the normal page0, that since it's in the kernel,
it can branch directly to the exception routine, instead of loading the
address into the PC. This should result in a tiny improvement in speed since
we eliminate a TLB mapping the vector page and a load on every exception.

XXX Add __HAVE_ARM_TRUSTZONE cpp define and use that to eliminate all code
have to do with manipulating the vector page.

Actually use zero_p now that we pass it in.

Add a zero flag to valloc_pages so that we can *not* zero the msgbuf so it
will be preserved across boots.

Correct one of the kernel_size calculations.

if __HAVE_MM_MD_DIRECT_MAPPED_PHYS is defined, make sure mapallmem_p is true.

branches: 1.14.2; 1.14.4;
Compare pointer against NULL not 0.

Make sure when mapping all the kernel, start at KERNEL_BASE, not kernel_base.

Make sure that start.S and machdep.c don't disagree wrt L1 page table
location during bootstrap.

slop wasn't sloppy enough in the kernel_size calculation. Add in the L2
page tables required as well.

Should fix the dockstar boot problem reported by Andy Ruhl on port-arm.

http://mail-index.netbsd.org/port-arm/2012/09/20/msg001471.html

Comments.

Print the message buffer VAs and number of pages. Other minor cosmetics.

Fix two off-by-one loops. Saves a whole two pages.

More VERBOSE_INIT_ARM output tweaks.

Typo in comment.

Print the system vectors in order so I don't get confused.

Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead
but add a second argument to it to indicate whether the TLB/caches need to be
flushed. Default cortex to pmap_needs_fixup = 1. But check the MMFR3 field
to see if the fixed can be skipped.
Use a cf_flag bit 0 to indicate whether the A9 L2 cache should disable (bit 0 = 1)
or enabeld (bit = 0).

With these changes, the A9 MMU can use traverse caches to do MMU tablewalks
Also, make sure all memory has the shareable bit for the A9.

branches: 1.3.2;
Before setting the new TTB wbinv the caches.

Print TTBR/TTBR1/TTBCR registers

Make cpu_reset, most of initarm and the kvm init code common.
Add MP hooks for cpu_need_resced
Add idlestck which is allocated in arm32_kvminit

Move evbarm/fdt/fdt_memory.[ch] to sys/dev/fdt and simplify the api and
some operations. This allows other architectures to use it.

Retire arm_[di]sb in favour of the isb() and dsb(sy) macro invocations.

Some KASAN fixes and tweaks

- don't access BSS variables when __md_early
- centralise the INIT_ARM_STACK_{SHIFT,SIZE} defines and create a new
INIT_ARM_TOTAL_STACK
- Only create L1PT entries in kasan_md_shadow_map_page if
arm32_kernel_vm_init hasn't created the L2PTs (and their L1PT entries)
- Add some comments to explain what's going on

Add support for KASAN on ARMv[67]

Thanks to maxv for many pointers and reviews.

Style and share a debug string

Use howmany()

Whitespace

Avoid unbounded stack usage warning

KNF #includes

Remove some unnecessary ones while I'm here.

KNF

grammar in a comment

G/C L1_TABLE_SIZE_REAL

branches: 1.55.4;
Really go back to pre-whitespace change (1.52) arm32_kernel_vm_init

Revert the part of the previous Whitespace commit which clearly was
functional.

This will probably come back with other changes and a proper commit
message.

Whitespace

Make sure the start stacks are covered by the new translation tables.
They *might* get placed after ARM_BOOTSTRAP_LxPT by the linker.

AP startup uses VA sp in cpu_init_secondary_processor

Misc style

Slight update to comment and KNF it while I'm here

Fix typo in VPRINTF

On second/third thoughts we can use the pages before the kernel
everywhere.

Clean up around cpu_ttb and fix a bunch of builds

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

Use __nothing

Provide and use kern_vtopdiff in KERN_{VTOPHYS,PHYSTOV}. A step towards
generic arm.

#ifdef VERBOSE_INIT_ARM some format strings only used in that case.

Define and use VPRINTF

branches: 1.41.2; 1.41.4;
FDTise RapberryPI support. Thanks for jmcneill for a lot of help with this.

The kernel image that the RPI firmware boots is now netbsd.img in the
kernel build directory.

XXX fdtbus_get_reg needs reworking

Now that we can... mark kernel text as non-writable on MMUs that support
it.

Report an error if compiled with MULTIPROCESSOR support but without
__HAVE_CPU_UAREA_ALLOC_IDLELWP

Fix VERBOSE_INIT_ARM build

branches: 1.37.2;
In the ARM_MMU_EXTENDED case make sure the kernel mappings are marked with
XN (eXecute Never) appropriately.

The XN logic is inconsistent and could do with changing to XN always set
and cleared for VM_PROT_EXECUTE (or the inverse) everywhere.

Trailing whitespace.

pmap_directbase is a failed experiment, nuke it.

Support directmapped systems with >1GB that start memory at 0x80000000.

Deal with 2GB of ram or memory ending at or above 4GB.

branches: 1.32.2;
Sprinkle #include "opt_multiprocessor.h"

Remove unnecessary #include

branches: 1.30.2;
Fix build failed with GUMSTIX(pxa2x0). build test only now.

When figuring out the physical size for direct-mapped systems, round up
to L1_SS_SIZE.

Add a kernel for the CUBIETRUCK (CUBIEBOARD3). Allow direct mapping of all
memory (but for now allow the memory mapped above KERNEL_BASE to used for
poolpages).

If using arm32_kvminit, don't bother mapping msgbuf since it's already mapped.

branches: 1.26.2;
Remove unnecessary { } around code block. No functional change.

ARM_MMU_EXTENDED support.

rearrange some printfs.
when using the extended mmu, make sure to disable ttbr0 until there is an
activated pmap.

If we are going to map all of physical memory, we don't need to allocate
l2 page tables for the kernel.

branches: 1.22.2;
Fix typo: VERBOSE_INIT_ARM, not VERBOSE_ARM_INIT. From
Dennis Ferguson in PR#48163.

branches: 1.21.2;
Fix inverted logic for mapping exception vector.

Add a ARM_HAS_VBAR option which forces the use of the VBAR register. This
allows much code to deal with vector_page mappings to be eliminated. On a
BEAGLEBONE kernel, this saves 8KB of text and instructions that never have
to be executed. (The PJ4B has VBAR but doesn't implement the security
extensions it is part of so a method was needed to allow it use VBAR with
relying on the default test for the security extensions.)

Add support for the VBAR (vector base address register) to remap the vectors
into the kernel text segment. This register is available on arm1176 and
all cortex processors since they all have the arm security (trustzone)
extension. We avoid having to specially map either vector page (0x00000000
or 0xffff0000) and use VBAR to both to page0rel in the text segment. These
vector group differs from the normal page0, that since it's in the kernel,
it can branch directly to the exception routine, instead of loading the
address into the PC. This should result in a tiny improvement in speed since
we eliminate a TLB mapping the vector page and a load on every exception.

XXX Add __HAVE_ARM_TRUSTZONE cpp define and use that to eliminate all code
have to do with manipulating the vector page.

Actually use zero_p now that we pass it in.

Add a zero flag to valloc_pages so that we can *not* zero the msgbuf so it
will be preserved across boots.

Correct one of the kernel_size calculations.

if __HAVE_MM_MD_DIRECT_MAPPED_PHYS is defined, make sure mapallmem_p is true.

branches: 1.14.2; 1.14.4;
Compare pointer against NULL not 0.

Make sure when mapping all the kernel, start at KERNEL_BASE, not kernel_base.

Make sure that start.S and machdep.c don't disagree wrt L1 page table
location during bootstrap.

slop wasn't sloppy enough in the kernel_size calculation. Add in the L2
page tables required as well.

Should fix the dockstar boot problem reported by Andy Ruhl on port-arm.

http://mail-index.netbsd.org/port-arm/2012/09/20/msg001471.html

Comments.

Print the message buffer VAs and number of pages. Other minor cosmetics.

Fix two off-by-one loops. Saves a whole two pages.

More VERBOSE_INIT_ARM output tweaks.

Typo in comment.

Print the system vectors in order so I don't get confused.

Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead
but add a second argument to it to indicate whether the TLB/caches need to be
flushed. Default cortex to pmap_needs_fixup = 1. But check the MMFR3 field
to see if the fixed can be skipped.
Use a cf_flag bit 0 to indicate whether the A9 L2 cache should disable (bit 0 = 1)
or enabeld (bit = 0).

With these changes, the A9 MMU can use traverse caches to do MMU tablewalks
Also, make sure all memory has the shareable bit for the A9.

branches: 1.3.2;
Before setting the new TTB wbinv the caches.

Print TTBR/TTBR1/TTBCR registers

Make cpu_reset, most of initarm and the kvm init code common.
Add MP hooks for cpu_need_resced
Add idlestck which is allocated in arm32_kvminit

Retire arm_[di]sb in favour of the isb() and dsb(sy) macro invocations.

Some KASAN fixes and tweaks

- don't access BSS variables when __md_early
- centralise the INIT_ARM_STACK_{SHIFT,SIZE} defines and create a new
INIT_ARM_TOTAL_STACK
- Only create L1PT entries in kasan_md_shadow_map_page if
arm32_kernel_vm_init hasn't created the L2PTs (and their L1PT entries)
- Add some comments to explain what's going on

Add support for KASAN on ARMv[67]

Thanks to maxv for many pointers and reviews.

Style and share a debug string

Use howmany()

Whitespace

Avoid unbounded stack usage warning

KNF #includes

Remove some unnecessary ones while I'm here.

KNF

grammar in a comment

G/C L1_TABLE_SIZE_REAL

branches: 1.55.4;
Really go back to pre-whitespace change (1.52) arm32_kernel_vm_init

Revert the part of the previous Whitespace commit which clearly was
functional.

This will probably come back with other changes and a proper commit
message.

Whitespace

Make sure the start stacks are covered by the new translation tables.
They *might* get placed after ARM_BOOTSTRAP_LxPT by the linker.

AP startup uses VA sp in cpu_init_secondary_processor

Misc style

Slight update to comment and KNF it while I'm here

Fix typo in VPRINTF

On second/third thoughts we can use the pages before the kernel
everywhere.

Clean up around cpu_ttb and fix a bunch of builds

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

Use __nothing

Provide and use kern_vtopdiff in KERN_{VTOPHYS,PHYSTOV}. A step towards
generic arm.

#ifdef VERBOSE_INIT_ARM some format strings only used in that case.

Define and use VPRINTF

branches: 1.41.2; 1.41.4;
FDTise RapberryPI support. Thanks for jmcneill for a lot of help with this.

The kernel image that the RPI firmware boots is now netbsd.img in the
kernel build directory.

XXX fdtbus_get_reg needs reworking

Now that we can... mark kernel text as non-writable on MMUs that support
it.

Report an error if compiled with MULTIPROCESSOR support but without
__HAVE_CPU_UAREA_ALLOC_IDLELWP

Fix VERBOSE_INIT_ARM build

branches: 1.37.2;
In the ARM_MMU_EXTENDED case make sure the kernel mappings are marked with
XN (eXecute Never) appropriately.

The XN logic is inconsistent and could do with changing to XN always set
and cleared for VM_PROT_EXECUTE (or the inverse) everywhere.

Trailing whitespace.

pmap_directbase is a failed experiment, nuke it.

Support directmapped systems with >1GB that start memory at 0x80000000.

Deal with 2GB of ram or memory ending at or above 4GB.

branches: 1.32.2;
Sprinkle #include "opt_multiprocessor.h"

Remove unnecessary #include

branches: 1.30.2;
Fix build failed with GUMSTIX(pxa2x0). build test only now.

When figuring out the physical size for direct-mapped systems, round up
to L1_SS_SIZE.

Add a kernel for the CUBIETRUCK (CUBIEBOARD3). Allow direct mapping of all
memory (but for now allow the memory mapped above KERNEL_BASE to used for
poolpages).

If using arm32_kvminit, don't bother mapping msgbuf since it's already mapped.

branches: 1.26.2;
Remove unnecessary { } around code block. No functional change.

ARM_MMU_EXTENDED support.

rearrange some printfs.
when using the extended mmu, make sure to disable ttbr0 until there is an
activated pmap.

If we are going to map all of physical memory, we don't need to allocate
l2 page tables for the kernel.

branches: 1.22.2;
Fix typo: VERBOSE_INIT_ARM, not VERBOSE_ARM_INIT. From
Dennis Ferguson in PR#48163.

branches: 1.21.2;
Fix inverted logic for mapping exception vector.

Add a ARM_HAS_VBAR option which forces the use of the VBAR register. This
allows much code to deal with vector_page mappings to be eliminated. On a
BEAGLEBONE kernel, this saves 8KB of text and instructions that never have
to be executed. (The PJ4B has VBAR but doesn't implement the security
extensions it is part of so a method was needed to allow it use VBAR with
relying on the default test for the security extensions.)

Add support for the VBAR (vector base address register) to remap the vectors
into the kernel text segment. This register is available on arm1176 and
all cortex processors since they all have the arm security (trustzone)
extension. We avoid having to specially map either vector page (0x00000000
or 0xffff0000) and use VBAR to both to page0rel in the text segment. These
vector group differs from the normal page0, that since it's in the kernel,
it can branch directly to the exception routine, instead of loading the
address into the PC. This should result in a tiny improvement in speed since
we eliminate a TLB mapping the vector page and a load on every exception.

XXX Add __HAVE_ARM_TRUSTZONE cpp define and use that to eliminate all code
have to do with manipulating the vector page.

Actually use zero_p now that we pass it in.

Add a zero flag to valloc_pages so that we can *not* zero the msgbuf so it
will be preserved across boots.

Correct one of the kernel_size calculations.

if __HAVE_MM_MD_DIRECT_MAPPED_PHYS is defined, make sure mapallmem_p is true.

branches: 1.14.2; 1.14.4;
Compare pointer against NULL not 0.

Make sure when mapping all the kernel, start at KERNEL_BASE, not kernel_base.

Make sure that start.S and machdep.c don't disagree wrt L1 page table
location during bootstrap.

slop wasn't sloppy enough in the kernel_size calculation. Add in the L2
page tables required as well.

Should fix the dockstar boot problem reported by Andy Ruhl on port-arm.

http://mail-index.netbsd.org/port-arm/2012/09/20/msg001471.html

Comments.

Print the message buffer VAs and number of pages. Other minor cosmetics.

Fix two off-by-one loops. Saves a whole two pages.

More VERBOSE_INIT_ARM output tweaks.

Typo in comment.

Print the system vectors in order so I don't get confused.

Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead
but add a second argument to it to indicate whether the TLB/caches need to be
flushed. Default cortex to pmap_needs_fixup = 1. But check the MMFR3 field
to see if the fixed can be skipped.
Use a cf_flag bit 0 to indicate whether the A9 L2 cache should disable (bit 0 = 1)
or enabeld (bit = 0).

With these changes, the A9 MMU can use traverse caches to do MMU tablewalks
Also, make sure all memory has the shareable bit for the A9.

branches: 1.3.2;
Before setting the new TTB wbinv the caches.

Print TTBR/TTBR1/TTBCR registers

Make cpu_reset, most of initarm and the kvm init code common.
Add MP hooks for cpu_need_resced
Add idlestck which is allocated in arm32_kvminit

Some KASAN fixes and tweaks

- don't access BSS variables when __md_early
- centralise the INIT_ARM_STACK_{SHIFT,SIZE} defines and create a new
INIT_ARM_TOTAL_STACK
- Only create L1PT entries in kasan_md_shadow_map_page if
arm32_kernel_vm_init hasn't created the L2PTs (and their L1PT entries)
- Add some comments to explain what's going on

Add support for KASAN on ARMv[67]

Thanks to maxv for many pointers and reviews.

Style and share a debug string

Use howmany()

Whitespace

Avoid unbounded stack usage warning

KNF #includes

Remove some unnecessary ones while I'm here.

KNF

grammar in a comment

G/C L1_TABLE_SIZE_REAL

branches: 1.55.4;
Really go back to pre-whitespace change (1.52) arm32_kernel_vm_init

Revert the part of the previous Whitespace commit which clearly was
functional.

This will probably come back with other changes and a proper commit
message.

Whitespace

Make sure the start stacks are covered by the new translation tables.
They *might* get placed after ARM_BOOTSTRAP_LxPT by the linker.

AP startup uses VA sp in cpu_init_secondary_processor

Misc style

Slight update to comment and KNF it while I'm here

Fix typo in VPRINTF

On second/third thoughts we can use the pages before the kernel
everywhere.

Clean up around cpu_ttb and fix a bunch of builds

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

Use __nothing

Provide and use kern_vtopdiff in KERN_{VTOPHYS,PHYSTOV}. A step towards
generic arm.

#ifdef VERBOSE_INIT_ARM some format strings only used in that case.

Define and use VPRINTF

branches: 1.41.2; 1.41.4;
FDTise RapberryPI support. Thanks for jmcneill for a lot of help with this.

The kernel image that the RPI firmware boots is now netbsd.img in the
kernel build directory.

XXX fdtbus_get_reg needs reworking

Now that we can... mark kernel text as non-writable on MMUs that support
it.

Report an error if compiled with MULTIPROCESSOR support but without
__HAVE_CPU_UAREA_ALLOC_IDLELWP

Fix VERBOSE_INIT_ARM build

branches: 1.37.2;
In the ARM_MMU_EXTENDED case make sure the kernel mappings are marked with
XN (eXecute Never) appropriately.

The XN logic is inconsistent and could do with changing to XN always set
and cleared for VM_PROT_EXECUTE (or the inverse) everywhere.

Trailing whitespace.

pmap_directbase is a failed experiment, nuke it.

Support directmapped systems with >1GB that start memory at 0x80000000.

Deal with 2GB of ram or memory ending at or above 4GB.

branches: 1.32.2;
Sprinkle #include "opt_multiprocessor.h"

Remove unnecessary #include

branches: 1.30.2;
Fix build failed with GUMSTIX(pxa2x0). build test only now.

When figuring out the physical size for direct-mapped systems, round up
to L1_SS_SIZE.

Add a kernel for the CUBIETRUCK (CUBIEBOARD3). Allow direct mapping of all
memory (but for now allow the memory mapped above KERNEL_BASE to used for
poolpages).

If using arm32_kvminit, don't bother mapping msgbuf since it's already mapped.

branches: 1.26.2;
Remove unnecessary { } around code block. No functional change.

ARM_MMU_EXTENDED support.

rearrange some printfs.
when using the extended mmu, make sure to disable ttbr0 until there is an
activated pmap.

If we are going to map all of physical memory, we don't need to allocate
l2 page tables for the kernel.

branches: 1.22.2;
Fix typo: VERBOSE_INIT_ARM, not VERBOSE_ARM_INIT. From
Dennis Ferguson in PR#48163.

branches: 1.21.2;
Fix inverted logic for mapping exception vector.

Add a ARM_HAS_VBAR option which forces the use of the VBAR register. This
allows much code to deal with vector_page mappings to be eliminated. On a
BEAGLEBONE kernel, this saves 8KB of text and instructions that never have
to be executed. (The PJ4B has VBAR but doesn't implement the security
extensions it is part of so a method was needed to allow it use VBAR with
relying on the default test for the security extensions.)

Add support for the VBAR (vector base address register) to remap the vectors
into the kernel text segment. This register is available on arm1176 and
all cortex processors since they all have the arm security (trustzone)
extension. We avoid having to specially map either vector page (0x00000000
or 0xffff0000) and use VBAR to both to page0rel in the text segment. These
vector group differs from the normal page0, that since it's in the kernel,
it can branch directly to the exception routine, instead of loading the
address into the PC. This should result in a tiny improvement in speed since
we eliminate a TLB mapping the vector page and a load on every exception.

XXX Add __HAVE_ARM_TRUSTZONE cpp define and use that to eliminate all code
have to do with manipulating the vector page.

Actually use zero_p now that we pass it in.

Add a zero flag to valloc_pages so that we can *not* zero the msgbuf so it
will be preserved across boots.

Correct one of the kernel_size calculations.

if __HAVE_MM_MD_DIRECT_MAPPED_PHYS is defined, make sure mapallmem_p is true.

branches: 1.14.2; 1.14.4;
Compare pointer against NULL not 0.

Make sure when mapping all the kernel, start at KERNEL_BASE, not kernel_base.

Make sure that start.S and machdep.c don't disagree wrt L1 page table
location during bootstrap.

slop wasn't sloppy enough in the kernel_size calculation. Add in the L2
page tables required as well.

Should fix the dockstar boot problem reported by Andy Ruhl on port-arm.

http://mail-index.netbsd.org/port-arm/2012/09/20/msg001471.html

Comments.

Print the message buffer VAs and number of pages. Other minor cosmetics.

Fix two off-by-one loops. Saves a whole two pages.

More VERBOSE_INIT_ARM output tweaks.

Typo in comment.

Print the system vectors in order so I don't get confused.

Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead
but add a second argument to it to indicate whether the TLB/caches need to be
flushed. Default cortex to pmap_needs_fixup = 1. But check the MMFR3 field
to see if the fixed can be skipped.
Use a cf_flag bit 0 to indicate whether the A9 L2 cache should disable (bit 0 = 1)
or enabeld (bit = 0).

With these changes, the A9 MMU can use traverse caches to do MMU tablewalks
Also, make sure all memory has the shareable bit for the A9.

branches: 1.3.2;
Before setting the new TTB wbinv the caches.

Print TTBR/TTBR1/TTBCR registers

Make cpu_reset, most of initarm and the kvm init code common.
Add MP hooks for cpu_need_resced
Add idlestck which is allocated in arm32_kvminit

Add support for KASAN on ARMv[67]

Thanks to maxv for many pointers and reviews.

Style and share a debug string

Use howmany()

Whitespace

Avoid unbounded stack usage warning

KNF #includes

Remove some unnecessary ones while I'm here.

KNF

grammar in a comment

G/C L1_TABLE_SIZE_REAL

branches: 1.55.4;
Really go back to pre-whitespace change (1.52) arm32_kernel_vm_init

Revert the part of the previous Whitespace commit which clearly was
functional.

This will probably come back with other changes and a proper commit
message.

Whitespace

Make sure the start stacks are covered by the new translation tables.
They *might* get placed after ARM_BOOTSTRAP_LxPT by the linker.

AP startup uses VA sp in cpu_init_secondary_processor

Misc style

Slight update to comment and KNF it while I'm here

Fix typo in VPRINTF

On second/third thoughts we can use the pages before the kernel
everywhere.

Clean up around cpu_ttb and fix a bunch of builds

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

Use __nothing

Provide and use kern_vtopdiff in KERN_{VTOPHYS,PHYSTOV}. A step towards
generic arm.

#ifdef VERBOSE_INIT_ARM some format strings only used in that case.

Define and use VPRINTF

branches: 1.41.2; 1.41.4;
FDTise RapberryPI support. Thanks for jmcneill for a lot of help with this.

The kernel image that the RPI firmware boots is now netbsd.img in the
kernel build directory.

XXX fdtbus_get_reg needs reworking

Now that we can... mark kernel text as non-writable on MMUs that support
it.

Report an error if compiled with MULTIPROCESSOR support but without
__HAVE_CPU_UAREA_ALLOC_IDLELWP

Fix VERBOSE_INIT_ARM build

branches: 1.37.2;
In the ARM_MMU_EXTENDED case make sure the kernel mappings are marked with
XN (eXecute Never) appropriately.

The XN logic is inconsistent and could do with changing to XN always set
and cleared for VM_PROT_EXECUTE (or the inverse) everywhere.

Trailing whitespace.

pmap_directbase is a failed experiment, nuke it.

Support directmapped systems with >1GB that start memory at 0x80000000.

Deal with 2GB of ram or memory ending at or above 4GB.

branches: 1.32.2;
Sprinkle #include "opt_multiprocessor.h"

Remove unnecessary #include

branches: 1.30.2;
Fix build failed with GUMSTIX(pxa2x0). build test only now.

When figuring out the physical size for direct-mapped systems, round up
to L1_SS_SIZE.

Add a kernel for the CUBIETRUCK (CUBIEBOARD3). Allow direct mapping of all
memory (but for now allow the memory mapped above KERNEL_BASE to used for
poolpages).

If using arm32_kvminit, don't bother mapping msgbuf since it's already mapped.

branches: 1.26.2;
Remove unnecessary { } around code block. No functional change.

ARM_MMU_EXTENDED support.

rearrange some printfs.
when using the extended mmu, make sure to disable ttbr0 until there is an
activated pmap.

If we are going to map all of physical memory, we don't need to allocate
l2 page tables for the kernel.

branches: 1.22.2;
Fix typo: VERBOSE_INIT_ARM, not VERBOSE_ARM_INIT. From
Dennis Ferguson in PR#48163.

branches: 1.21.2;
Fix inverted logic for mapping exception vector.

Add a ARM_HAS_VBAR option which forces the use of the VBAR register. This
allows much code to deal with vector_page mappings to be eliminated. On a
BEAGLEBONE kernel, this saves 8KB of text and instructions that never have
to be executed. (The PJ4B has VBAR but doesn't implement the security
extensions it is part of so a method was needed to allow it use VBAR with
relying on the default test for the security extensions.)

Add support for the VBAR (vector base address register) to remap the vectors
into the kernel text segment. This register is available on arm1176 and
all cortex processors since they all have the arm security (trustzone)
extension. We avoid having to specially map either vector page (0x00000000
or 0xffff0000) and use VBAR to both to page0rel in the text segment. These
vector group differs from the normal page0, that since it's in the kernel,
it can branch directly to the exception routine, instead of loading the
address into the PC. This should result in a tiny improvement in speed since
we eliminate a TLB mapping the vector page and a load on every exception.

XXX Add __HAVE_ARM_TRUSTZONE cpp define and use that to eliminate all code
have to do with manipulating the vector page.

Actually use zero_p now that we pass it in.

Add a zero flag to valloc_pages so that we can *not* zero the msgbuf so it
will be preserved across boots.

Correct one of the kernel_size calculations.

if __HAVE_MM_MD_DIRECT_MAPPED_PHYS is defined, make sure mapallmem_p is true.

branches: 1.14.2; 1.14.4;
Compare pointer against NULL not 0.

Make sure when mapping all the kernel, start at KERNEL_BASE, not kernel_base.

Make sure that start.S and machdep.c don't disagree wrt L1 page table
location during bootstrap.

slop wasn't sloppy enough in the kernel_size calculation. Add in the L2
page tables required as well.

Should fix the dockstar boot problem reported by Andy Ruhl on port-arm.

http://mail-index.netbsd.org/port-arm/2012/09/20/msg001471.html

Comments.

Print the message buffer VAs and number of pages. Other minor cosmetics.

Fix two off-by-one loops. Saves a whole two pages.

More VERBOSE_INIT_ARM output tweaks.

Typo in comment.

Print the system vectors in order so I don't get confused.

Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead
but add a second argument to it to indicate whether the TLB/caches need to be
flushed. Default cortex to pmap_needs_fixup = 1. But check the MMFR3 field
to see if the fixed can be skipped.
Use a cf_flag bit 0 to indicate whether the A9 L2 cache should disable (bit 0 = 1)
or enabeld (bit = 0).

With these changes, the A9 MMU can use traverse caches to do MMU tablewalks
Also, make sure all memory has the shareable bit for the A9.

branches: 1.3.2;
Before setting the new TTB wbinv the caches.

Print TTBR/TTBR1/TTBCR registers

Make cpu_reset, most of initarm and the kvm init code common.
Add MP hooks for cpu_need_resced
Add idlestck which is allocated in arm32_kvminit

Style and share a debug string

Use howmany()

Whitespace

Avoid unbounded stack usage warning

KNF #includes

Remove some unnecessary ones while I'm here.

KNF

grammar in a comment

G/C L1_TABLE_SIZE_REAL

branches: 1.55.4;
Really go back to pre-whitespace change (1.52) arm32_kernel_vm_init

Revert the part of the previous Whitespace commit which clearly was
functional.

This will probably come back with other changes and a proper commit
message.

Whitespace

Make sure the start stacks are covered by the new translation tables.
They *might* get placed after ARM_BOOTSTRAP_LxPT by the linker.

AP startup uses VA sp in cpu_init_secondary_processor

Misc style

Slight update to comment and KNF it while I'm here

Fix typo in VPRINTF

On second/third thoughts we can use the pages before the kernel
everywhere.

Clean up around cpu_ttb and fix a bunch of builds

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

Use __nothing

Provide and use kern_vtopdiff in KERN_{VTOPHYS,PHYSTOV}. A step towards
generic arm.

#ifdef VERBOSE_INIT_ARM some format strings only used in that case.

Define and use VPRINTF

branches: 1.41.2; 1.41.4;
FDTise RapberryPI support. Thanks for jmcneill for a lot of help with this.

The kernel image that the RPI firmware boots is now netbsd.img in the
kernel build directory.

XXX fdtbus_get_reg needs reworking

Now that we can... mark kernel text as non-writable on MMUs that support
it.

Report an error if compiled with MULTIPROCESSOR support but without
__HAVE_CPU_UAREA_ALLOC_IDLELWP

Fix VERBOSE_INIT_ARM build

branches: 1.37.2;
In the ARM_MMU_EXTENDED case make sure the kernel mappings are marked with
XN (eXecute Never) appropriately.

The XN logic is inconsistent and could do with changing to XN always set
and cleared for VM_PROT_EXECUTE (or the inverse) everywhere.

Trailing whitespace.

pmap_directbase is a failed experiment, nuke it.

Support directmapped systems with >1GB that start memory at 0x80000000.

Deal with 2GB of ram or memory ending at or above 4GB.

branches: 1.32.2;
Sprinkle #include "opt_multiprocessor.h"

Remove unnecessary #include

branches: 1.30.2;
Fix build failed with GUMSTIX(pxa2x0). build test only now.

When figuring out the physical size for direct-mapped systems, round up
to L1_SS_SIZE.

Add a kernel for the CUBIETRUCK (CUBIEBOARD3). Allow direct mapping of all
memory (but for now allow the memory mapped above KERNEL_BASE to used for
poolpages).

If using arm32_kvminit, don't bother mapping msgbuf since it's already mapped.

branches: 1.26.2;
Remove unnecessary { } around code block. No functional change.

ARM_MMU_EXTENDED support.

rearrange some printfs.
when using the extended mmu, make sure to disable ttbr0 until there is an
activated pmap.

If we are going to map all of physical memory, we don't need to allocate
l2 page tables for the kernel.

branches: 1.22.2;
Fix typo: VERBOSE_INIT_ARM, not VERBOSE_ARM_INIT. From
Dennis Ferguson in PR#48163.

branches: 1.21.2;
Fix inverted logic for mapping exception vector.

Add a ARM_HAS_VBAR option which forces the use of the VBAR register. This
allows much code to deal with vector_page mappings to be eliminated. On a
BEAGLEBONE kernel, this saves 8KB of text and instructions that never have
to be executed. (The PJ4B has VBAR but doesn't implement the security
extensions it is part of so a method was needed to allow it use VBAR with
relying on the default test for the security extensions.)

Add support for the VBAR (vector base address register) to remap the vectors
into the kernel text segment. This register is available on arm1176 and
all cortex processors since they all have the arm security (trustzone)
extension. We avoid having to specially map either vector page (0x00000000
or 0xffff0000) and use VBAR to both to page0rel in the text segment. These
vector group differs from the normal page0, that since it's in the kernel,
it can branch directly to the exception routine, instead of loading the
address into the PC. This should result in a tiny improvement in speed since
we eliminate a TLB mapping the vector page and a load on every exception.

XXX Add __HAVE_ARM_TRUSTZONE cpp define and use that to eliminate all code
have to do with manipulating the vector page.