Copy stable/9 to releng/9.3 as part of the 9.3-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Copy head to stable/9 as part of 9.0-RELEASE release cycle.

Approved by: re (implicit)

Rather than shifting offsets by three, set register offset to 3. All our
bus interface does that's special here now is to use a 64-bit register size.
In theory, uart(4) ought to support a regsz as well as regshft and support
64-bit registers directly.

Also use the UART class's range rather than a hand-coded 1024 for the address
range.

Update the port of FreeBSD to Cavium Octeon to use the Cavium Simple Executive
library:
o) Increase inline unit / large function growth limits for MIPS to accommodate
the needs of the Simple Executive, which uses a shocking amount of inlining.
o) Remove TARGET_OCTEON and use CPU_CNMIPS to do things required by cnMIPS and
the Octeon SoC.
o) Add OCTEON_VENDOR_LANNER to use Lanner's allocation of vendor-specific
board numbers, specifically to support the MR320.
o) Add OCTEON_BOARD_CAPK_0100ND to hard-wire configuration for the CAPK-0100nd,
which improperly uses an evaluation board's board number and breaks board
detection at runtime. This board is sold by Portwell as the CAM-0100.
o) Add support for the RTC available on some Octeon boards.
o) Add support for the Octeon PCI bus. Note that rman_[sg]et_virtual for IO
ports can not work unless building for n64.
o) Clean up the CompactFlash driver to use Simple Executive macros and
structures where possible (it would be advisable to use the Simple Executive
API to set the PIO mode, too, but that is not done presently.) Also use
structures from FreeBSD's ATA layer rather than structures copied from
Linux.
o) Print available Octeon SoC features on boot.
o) Add support for the Octeon timecounter.
o) Use the Simple Executive's routines rather than local copies for doing reads
and writes to 64-bit addresses and use its macros for various device
addresses rather than using local copies.
o) Rename octeon_board_real to octeon_is_simulation to reduce differences with
Cavium-provided code originally written for Linux. Also make it use the
same simplified test that the Simple Executive and Linux both use rather
than our complex one.
o) Add support for the Octeon CIU, which is the main interrupt unit, as a bus
to use normal interrupt allocation and setup routines.
o) Use the Simple Executive's bootmem facility to allocate physical memory for
the kernel, rather than assuming we know which addresses we can steal.
NB: This may reduce the amount of RAM the kernel reports you as having if
you are leaving large temporary allocations made by U-Boot allocated
when starting FreeBSD.
o) Add a port of the Cavium-provided Ethernet driver for Linux. This changes
Ethernet interface naming from rgmxN to octeN. The new driver has vast
improvements over the old one, both in performance and functionality, but
does still have some features which have not been ported entirely and there
may be unimplemented code that can be hit in everyday use. I will make
every effort to correct those as they are reported.
o) Support loading the kernel on non-contiguous cores.
o) Add very conservative support for harvesting randomness from the Octeon
random number device.
o) Turn SMP on by default.
o) Clean up the style of the Octeon kernel configurations a little and make
them compile with -march=octeon.
o) Add support for the Lanner MR320 and the CAPK-0100nd to the Simple
Executive.
o) Modify the Simple Executive to build on FreeBSD and to build without
executive-config.h or cvmx-config.h. In the future we may want to
revert part of these changes and supply executive-config.h and
cvmx-config.h and access to the options contained in those files via
kernel configuration files.
o) Modify the Simple Executive USB routines to support getting and setting
of the USB PID.

Export knowledge of the special bus space we use for the console to
obio. Take advantage of the fact that obio only really supports uart
at the moment to use the uart bus tag always for IOPORT allocations.

# this needs to be redone to conform to FreeBSD standards and allow for
# additional drivers for SoC hardware to attach

Eliminate octeonregs.h. It was a copy of maltaregs.h with
s/malta/octeon/gi done...

Cope with the move and if_timer going way.

Merge from projects/mips to head by hand:

Copy the support files for the Octeon 1 CPU from sys/mips/octeon1 on
the projects/mips side to sys/mips/cavium on the head side to conform
to the other vendor code. This code was contributed by Cavium to the
project and forward ported by Warner Losh, with some additional code
from Randal Stewart.

# I'll fix the building problems the move creates in a future commit.

Rewrite to try to be more sane:
o Introduce a uart bus space so that we don't have to hack dev/uart to do 8
byte reads. This also handles the shift properly, so reset the shift we
want dev/uart doing to 0. In effect, this bus space makes the octeon
registers have an interface to dev/uart that looks just like the old ISA
bus, but does the necessary 64-bit read/write to the bus. We only support
read/write operations. We do all the widths, but likely could get away
with only 64-bit and 8-bit given the restricted nature of use of this bus.
o use bus_space_map to set the .bsh rather than a direct assignment.
o Minor cleanup of uart_cpu_getdev to make it conform more to the other
implementations.
o Add some coments for future work.

# with these changes, we now make it through cninit, but there's still some
# problem that's preventing output, as well as another problem that causes
# us to call panic just after we return from cninit() in platform_start.

The UART device infrasturcture wants these defined. Define them just
like we do in Malta. We may want to look at consolidating things
because *ALL* mips will *ALWAYS* be memory mapped. The only wrinkle
is that the tag may need to be a custom one (see endian issues with
the Atheros port for one example).

Minor formatting changes. Also, elimiante a couple of unused variables.

o Move the driveid.h file
o lots of tweaks to header paths.
o comment out SMP for the moment

# we now make it through the .c make depend, the .s needs more work.

Move the octeon port to its more correct location. Any port for the
OCTEON2 family of processors should live in mips/octeon2. Not enough
is know abotu the former to know if the same port can be used for both
yet.

Import Cavium's FreeBSD port, or the Octeon specific pieces, verbatim.
Yes, this puts things in the wrong place, doesn't compile and is
woefully incomplete. However, it will allow us to more easily track
against the upstream sources without needing to import the entire
Cavium tree under vendor.

This port is based on FreeBSD 7.0 as of April 2007 and the pre-import
MIPS tree (aka mips2), so much work is necessary here.