uart_cpu_octeonusart.c revision 199738
1/*- 2 * Copyright (c) 2009 M. Warner Losh <imp@FreeBSD.org> 3 * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $Id$ 28 */ 29#include "opt_uart.h" 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: projects/mips/sys/mips/octeon1/uart_cpu_octeonusart.c 199738 2009-11-24 07:50:19Z imp $"); 33 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/bus.h> 37#include <sys/cons.h> 38 39#include <machine/bus.h> 40 41#include <dev/uart/uart.h> 42#include <dev/uart/uart_cpu.h> 43 44#include <mips/octeon1/octeonreg.h> 45#include <mips/octeon1/octeon_pcmap_regs.h> 46 47bus_space_tag_t uart_bus_space_io; 48bus_space_tag_t uart_bus_space_mem; 49 50#include <sys/cdefs.h> 51__FBSDID("$FreeBSD: projects/mips/sys/mips/octeon1/uart_cpu_octeonusart.c 199738 2009-11-24 07:50:19Z imp $"); 52 53#include <sys/param.h> 54#include <sys/systm.h> 55#include <sys/bus.h> 56#include <sys/kernel.h> 57#include <sys/malloc.h> 58#include <sys/ktr.h> 59 60#include <vm/vm.h> 61#include <vm/pmap.h> 62#include <vm/vm_kern.h> 63#include <vm/vm_extern.h> 64 65#include <machine/bus.h> 66#include <machine/cache.h> 67 68/* 69 * Specailized uart bus space. We present a 1 apart byte oriented 70 * bus to the outside world, but internally translate to/from the 8-apart 71 * 64-bit word bus that's on the octeon. We only support simple read/write 72 * in this space. Everything else is undefined. 73 */ 74 75static uint8_t 76ou_bs_r_1(void *t, bus_space_handle_t handle, bus_size_t offset) 77{ 78 79 return (oct_read64(handle + (offset << 3))); 80} 81 82static uint16_t 83ou_bs_r_2(void *t, bus_space_handle_t handle, bus_size_t offset) 84{ 85 86 return (oct_read64(handle + (offset << 3))); 87} 88 89static uint32_t 90ou_bs_r_4(void *t, bus_space_handle_t handle, bus_size_t offset) 91{ 92 93 return (oct_read64(handle + (offset << 3))); 94} 95 96static uint64_t 97ou_bs_r_8(void *t, bus_space_handle_t handle, bus_size_t offset) 98{ 99 100 return (oct_read64(handle + (offset << 3))); 101} 102 103static void 104ou_bs_w_1(void *t, bus_space_handle_t bsh, bus_size_t offset, uint8_t value) 105{ 106 107 oct_write64(bsh + (offset << 3), value); 108} 109 110static void 111ou_bs_w_2(void *t, bus_space_handle_t bsh, bus_size_t offset, uint16_t value) 112{ 113 114 oct_write64(bsh + (offset << 3), value); 115} 116 117static void 118ou_bs_w_4(void *t, bus_space_handle_t bsh, bus_size_t offset, uint32_t value) 119{ 120 121 oct_write64(bsh + (offset << 3), value); 122} 123 124static void 125ou_bs_w_8(void *t, bus_space_handle_t bsh, bus_size_t offset, uint64_t value) 126{ 127 128 oct_write64(bsh + (offset << 3), value); 129} 130 131static struct bus_space octeon_uart_tag = { 132 .bs_map = generic_bs_map, 133 .bs_unmap = generic_bs_unmap, 134 .bs_subregion = generic_bs_subregion, 135 .bs_barrier = generic_bs_barrier, 136 .bs_r_1 = ou_bs_r_1, 137 .bs_r_2 = ou_bs_r_2, 138 .bs_r_4 = ou_bs_r_4, 139 .bs_r_8 = ou_bs_r_8, 140 .bs_w_1 = ou_bs_w_1, 141 .bs_w_2 = ou_bs_w_2, 142 .bs_w_4 = ou_bs_w_4, 143 .bs_w_8 = ou_bs_w_8, 144}; 145 146extern struct uart_class uart_oct16550_class; 147 148int 149uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) 150{ 151 152 return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0); 153} 154 155int 156uart_cpu_getdev(int devtype, struct uart_devinfo *di) 157{ 158 struct uart_class *class = &uart_oct16550_class; 159 160 /* 161 * These fields need to be setup corretly for uart_getenv to 162 * work in all cases. 163 */ 164 uart_bus_space_io = NULL; /* No io map for this device */ 165 uart_bus_space_mem = &octeon_uart_tag; 166 di->bas.bst = uart_bus_space_mem; 167 168 /* 169 * If env specification for UART exists it takes precedence: 170 * hw.uart.console="mm:0xf1012000" or similar 171 */ 172 if (uart_getenv(devtype, di, class) == 0) 173 return (0); 174 175 /* 176 * Fallback to UART0 for console. 177 */ 178 di->ops = uart_getops(class); 179 di->bas.chan = 0; 180 if (bus_space_map(di->bas.bst, OCTEON_UART0ADR, OCTEON_UART_SIZE, 181 0, &di->bas.bsh) != 0) 182 return (ENXIO); 183 di->bas.regshft = 0; 184 di->bas.rclk = 0; 185 di->baudrate = 115200; 186 di->databits = 8; 187 di->stopbits = 1; 188 di->parity = UART_PARITY_NONE; 189 190 return (0); 191} 192