Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle.
Prune svn:mergeinfo from the new branch, as nothing has been merged
here.

Additional commits post-branch will follow.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Oops - fix typo.

Add register defines for the QCA955x DDR flush and GPIO control.

add QCA955x PCIe configuration registers.

These are /not/ absolute addresses, as the QCA955x SoC has 2 PCIe RC's
(and 1 PCIe EP.)

Add DDR flush registers for QCA955x.

Add Ethernet PLL values for the QCA955x.

These are the same as the AR934x.

Obtained from: Linux openwrt

Make QCA955X_GMAC_REG_ETH_CFG defined like most other registers like this.

Add an APB base/size for the QCA955X for an upcoming QCA955x specific
APB mux.

It's larger than the AR71xx because it needs to replace the nexus
for some devices (notably wifi) and the wifi driver (if_ath_ahb.c)
reads the SPI data directly at early boot whilst it's memory mapped
in.

I'm eventually going to rip it out and replace it with a firmware
interface similar to what exists for the if_ath_pci.c path -
something early on (likely something new that I'll write) will
suck in the calibration data into a firmware API blob and that'll
be accessed from if_ath_ahb.c.

But, one thing at a time.

Tested:

* QCA955x SoC, AP135 development board

Add QCA955x series register definitions.

There's likely a bunch of register offsets that I have to add the
register window base to before I use them.

Done at: Hackathon
Obtained from: Linux OpenWRT