1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2013
4 * Texas Instruments Incorporated.
5 * Lokesh Vutla	  <lokeshvutla@ti.com>
6 *
7 * Configuration settings for the TI DRA7XX board.
8 * See ti_omap5_common.h for omap5 common settings.
9 */
10
11#ifndef __CONFIG_DRA7XX_EVM_H
12#define __CONFIG_DRA7XX_EVM_H
13
14#include <env/ti/dfu.h>
15
16#define CFG_MAX_MEM_MAPPED		0x80000000
17
18#ifndef CONFIG_QSPI_BOOT
19/* MMC ENV related defines */
20#endif
21
22#if (CONFIG_CONS_INDEX == 1)
23#define CONSOLEDEV			"ttyS0"
24#elif (CONFIG_CONS_INDEX == 3)
25#define CONSOLEDEV			"ttyS2"
26#endif
27#define CFG_SYS_NS16550_COM1		UART1_BASE	/* Base EVM has UART0 */
28#define CFG_SYS_NS16550_COM2		UART2_BASE	/* UART2 */
29#define CFG_SYS_NS16550_COM3		UART3_BASE	/* UART3 */
30
31#ifndef CONFIG_SPL_BUILD
32#define DFUARGS \
33	"dfu_bufsiz=0x10000\0" \
34	DFU_ALT_INFO_MMC \
35	DFU_ALT_INFO_EMMC \
36	DFU_ALT_INFO_RAM \
37	DFU_ALT_INFO_QSPI
38#endif
39
40#ifdef CONFIG_SPL_BUILD
41#ifdef CONFIG_SPL_DFU
42#define DFUARGS \
43	"dfu_bufsiz=0x10000\0" \
44	DFU_ALT_INFO_RAM
45#endif
46#endif
47
48#include <configs/ti_omap5_common.h>
49
50/*
51 * Default to using SPI for environment, etc.
52 * 0x000000 - 0x040000 : QSPI.SPL (256KiB)
53 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
54 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
55 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
56 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
57 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
58 * 0x9E0000 - 0x2000000 : USERLAND
59 */
60#define CFG_SYS_SPI_KERNEL_OFFS	0x1E0000
61#define CFG_SYS_SPI_ARGS_OFFS	0x140000
62#define CFG_SYS_SPI_ARGS_SIZE	0x80000
63
64/* SPI SPL */
65
66/* NAND support */
67#ifdef CONFIG_MTD_RAW_NAND
68/* NAND: device related configs */
69/* NAND: driver related configs */
70#define CFG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
71					 10, 11, 12, 13, 14, 15, 16, 17, \
72					 18, 19, 20, 21, 22, 23, 24, 25, \
73					 26, 27, 28, 29, 30, 31, 32, 33, \
74					 34, 35, 36, 37, 38, 39, 40, 41, \
75					 42, 43, 44, 45, 46, 47, 48, 49, \
76					 50, 51, 52, 53, 54, 55, 56, 57, }
77#define CFG_SYS_NAND_ECCSIZE		512
78#define CFG_SYS_NAND_ECCBYTES	14
79#endif /* !CONFIG_MTD_RAW_NAND */
80
81/* Parallel NOR Support */
82#if defined(CONFIG_NOR)
83/* NOR: device related configs */
84#define CFG_SYS_FLASH_SIZE		(64 * 1024 * 1024) /* 64 MB */
85#define CFG_SYS_FLASH_BASE		(0x08000000)
86/* Reduce SPL size by removing unlikey targets */
87#endif  /* NOR support */
88
89#endif /* __CONFIG_DRA7XX_EVM_H */
90