1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2021, Xilinx. Inc.
4 */
5
6#include <common.h>
7#include <dm.h>
8#include <dm/device_compat.h>
9#include <log.h>
10#include <malloc.h>
11#include <misc.h>
12#include <power-domain-uclass.h>
13#include <linux/bitops.h>
14
15#include <zynqmp_firmware.h>
16
17static int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
18				  const u32 qos, const enum zynqmp_pm_request_ack ack)
19{
20	return xilinx_pm_request(PM_REQUEST_NODE, node, capabilities,
21				   qos, ack, NULL);
22}
23
24static int zynqmp_power_domain_request(struct power_domain *power_domain)
25{
26	int ret = 0;
27
28	dev_dbg(power_domain->dev, "Request for id: %ld\n", power_domain->id);
29
30	if (IS_ENABLED(CONFIG_ARCH_ZYNQMP)) {
31		ret = zynqmp_pmufw_node(power_domain->id);
32		if (ret == -ENODEV)
33			ret = 0;
34	}
35
36	return ret;
37}
38
39static int zynqmp_power_domain_free(struct power_domain *power_domain)
40{
41	/* nop now */
42	return 0;
43}
44
45static int zynqmp_power_domain_on(struct power_domain *power_domain)
46{
47	dev_dbg(power_domain->dev, "Domain ON for id: %ld\n", power_domain->id);
48
49	return zynqmp_pm_request_node(power_domain->id,
50				      ZYNQMP_PM_CAPABILITY_ACCESS,
51				      ZYNQMP_PM_MAX_QOS,
52				      ZYNQMP_PM_REQUEST_ACK_BLOCKING);
53}
54
55static int zynqmp_power_domain_off(struct power_domain *power_domain)
56{
57	/* nop now */
58	return 0;
59}
60
61struct power_domain_ops zynqmp_power_domain_ops = {
62	.request = zynqmp_power_domain_request,
63	.rfree = zynqmp_power_domain_free,
64	.on = zynqmp_power_domain_on,
65	.off = zynqmp_power_domain_off,
66};
67
68static int zynqmp_power_domain_probe(struct udevice *dev)
69{
70	return 0;
71}
72
73U_BOOT_DRIVER(zynqmp_power_domain) = {
74	.name = "zynqmp_power_domain",
75	.id = UCLASS_POWER_DOMAIN,
76	.probe = zynqmp_power_domain_probe,
77	.ops = &zynqmp_power_domain_ops,
78};
79