1menu "i.MX8M DDR controllers" 2 depends on ARCH_IMX8M 3 4config IMX8M_DRAM 5 bool "imx8m dram" 6 select IMX_SNPS_DDR_PHY 7 8config IMX8M_LPDDR4 9 bool "imx8m lpddr4" 10 select IMX8M_DRAM 11 help 12 Select the i.MX8M LPDDR4 driver support on i.MX8M SOC. 13 14config IMX8M_DDR4 15 bool "imx8m ddr4" 16 select IMX8M_DRAM 17 help 18 Select the i.MX8M DDR4 driver support on i.MX8M SOC. 19 20config IMX8M_DDR3L 21 bool "imx8m ddr3l" 22 select IMX8M_DRAM 23 help 24 Select the i.MX8M DDR3L driver support on i.MX8M SOC. 25 26config SAVED_DRAM_TIMING_BASE 27 hex "Define the base address for saved dram timing" 28 help 29 after DRAM is trained, need to save the dram related timming 30 info into memory for low power use. OCRAM_S is used for this 31 purpose on i.MX8MM. 32 default 0x180000 33 34config IMX8M_DRAM_INLINE_ECC 35 bool "imx8mp inline ECC" 36 depends on IMX8MP && IMX8M_LPDDR4 37 help 38 Select this config if you want to use inline ecc feature for 39 imx8mp-evk board. 40 41config IMX8M_VDD_SOC_850MV 42 bool "imx8mp change the vdd_soc voltage to 850mv" 43 depends on IMX8MP 44 45config IMX8M_LPDDR4_FREQ0_2400MTS 46 bool "imx8m PDDR4 freq0 change from 4000MTS to 2400MTS" 47 48endmenu 49