1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * (C) Copyright 2000-2003 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. 7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 8 */ 9 10#include <config.h> 11#include <common.h> 12#include <init.h> 13#include <asm/global_data.h> 14#include <asm/immap.h> 15#include <asm/io.h> 16#include <linux/delay.h> 17 18DECLARE_GLOBAL_DATA_PTR; 19 20int checkboard(void) 21{ 22 puts("Board: "); 23 puts("Freescale FireEngine 5373 EVB\n"); 24 return 0; 25}; 26 27int dram_init(void) 28{ 29 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); 30 u32 dramsize, i; 31 32 dramsize = CFG_SYS_SDRAM_SIZE * 0x100000; 33 34 for (i = 0x13; i < 0x20; i++) { 35 if (dramsize == (1 << i)) 36 break; 37 } 38 i--; 39 40 out_be32(&sdram->cs0, CFG_SYS_SDRAM_BASE | i); 41 out_be32(&sdram->cfg1, CFG_SYS_SDRAM_CFG1); 42 out_be32(&sdram->cfg2, CFG_SYS_SDRAM_CFG2); 43 44 /* Issue PALL */ 45 out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 2); 46 47 /* Issue LEMR */ 48 out_be32(&sdram->mode, CFG_SYS_SDRAM_EMOD); 49 out_be32(&sdram->mode, CFG_SYS_SDRAM_MODE | 0x04000000); 50 51 udelay(500); 52 53 /* Issue PALL */ 54 out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 2); 55 56 /* Perform two refresh cycles */ 57 out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 4); 58 out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 4); 59 60 out_be32(&sdram->mode, CFG_SYS_SDRAM_MODE); 61 62 out_be32(&sdram->ctrl, 63 (CFG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00); 64 65 udelay(100); 66 67 gd->ram_size = dramsize; 68 69 return 0; 70}; 71 72int testdram(void) 73{ 74 /* TODO: XXX XXX XXX */ 75 printf("DRAM test not implemented!\n"); 76 77 return (0); 78} 79