1/* SPDX-License-Identifier: GPL-2.0+ */
2
3#ifndef _MPC83XX_GPIO_H_
4#define _MPC83XX_GPIO_H_
5
6/*
7 * The MCP83xx's 1-2 GPIO controllers each with 32 bits.
8 */
9#if defined(CONFIG_ARCH_MPC8313) || defined(CONFIG_ARCH_MPC8308)
10#define MPC83XX_GPIO_CTRLRS 1
11#elif defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC837X)
12#define MPC83XX_GPIO_CTRLRS 2
13#else
14#define MPC83XX_GPIO_CTRLRS 0
15#endif
16
17#define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS)
18
19struct mpc8xxx_gpio_plat {
20       ulong addr;
21       unsigned long size;
22       uint ngpios;
23};
24
25struct qe_gpio_plat {
26	ulong addr;
27	unsigned long size;
28};
29
30#ifndef DM_GPIO
31void mpc83xx_gpio_init_f(void);
32void mpc83xx_gpio_init_r(void);
33#endif	/* DM_GPIO */
34
35#endif	/* MPC83XX_GPIO_H_ */
36